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/openbmc/linux/Documentation/devicetree/bindings/dma/ti/
H A Dk3-udma.yaml56 for source thread IDs (rx): 0 - 0x7fff
57 for destination thread IDs (tx): 0x8000 - 0xffff
153 ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>;
159 reg = <0x0 0x31150000 0x0 0x100>,
160 <0x0 0x34000000 0x0 0x100000>,
161 <0x0 0x35000000 0x0 0x100000>;
172 ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
173 <0x2>; /* TX_CHAN */
174 ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
175 <0x5>; /* RX_CHAN */
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j7200-main.dtsi10 #clock-cells = <0>;
18 reg = <0x00 0x70000000 0x00 0x100000>;
21 ranges = <0x00 0x00 0x70000000 0x100000>;
23 atf-sram@0 {
24 reg = <0x00 0x20000>;
30 reg = <0x00 0x00100000 0x00 0x1c000>;
33 ranges = <0x00 0x00 0x00100000 0x1c000>;
38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
39 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
45 reg = <0x4044 0x10>;
[all …]
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-j784s4-main.dtsi11 reg = <0x00 0x70000000 0x00 0x800000>;
14 ranges = <0x00 0x00 0x70000000 0x800000>;
16 atf-sram@0 {
17 reg = <0x00 0x20000>;
21 reg = <0x1f0000 0x10000>;
25 reg = <0x200000 0x200000>;
36 reg = <0x00 0x01800000 0x00 0x200000>, /* GICD */
37 <0x00 0x01900000 0x00 0x100000>, /* GICR */
38 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
39 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
H A Dk3-j721s2-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x0 0x70000000 0x0 0x400000>;
25 ranges = <0x0 0x0 0x70000000 0x400000>;
27 atf-sram@0 {
28 reg = <0x0 0x20000>;
32 reg = <0x1f0000 0x10000>;
36 reg = <0x200000 0x200000>;
42 reg = <0x00 0x00104000 0x00 0x18000>;
45 ranges = <0x00 0x00 0x00104000 0x18000>;
[all …]
H A Dk3-j721e-main.dtsi15 #clock-cells = <0>;
17 clock-frequency = <0>;
21 #clock-cells = <0>;
23 clock-frequency = <0>;
30 reg = <0x0 0x70000000 0x0 0x800000>;
33 ranges = <0x0 0x0 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x0 0x20000>;
42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
45 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]