Home
last modified time | relevance | path

Searched +full:0 +full:x30a70000 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/include/debug/
H A Dimx-uart.h9 #define IMX1_UART1_BASE_ADDR 0x00206000
10 #define IMX1_UART2_BASE_ADDR 0x00207000
14 #define IMX25_UART1_BASE_ADDR 0x43f90000
15 #define IMX25_UART2_BASE_ADDR 0x43f94000
16 #define IMX25_UART3_BASE_ADDR 0x5000c000
17 #define IMX25_UART4_BASE_ADDR 0x50008000
18 #define IMX25_UART5_BASE_ADDR 0x5002c000
22 #define IMX27_UART1_BASE_ADDR 0x1000a000
23 #define IMX27_UART2_BASE_ADDR 0x1000b000
24 #define IMX27_UART3_BASE_ADDR 0x1000c000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8mq-mipi-csi2.yaml65 maximum: 0xff
77 port@0:
106 - port@0
129 reg = <0x30a70000 0x1000>;
145 fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;
151 #size-cells = <0>;
153 port@0 {
154 reg = <0>;
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dimx-regs.h11 #define ROM_VERSION_A0 0x800
12 #define ROM_VERSION_B0 0x83C
14 #define M4_BOOTROM_BASE_ADDR 0x007E0000
16 #define SAI1_BASE_ADDR 0x30010000
17 #define SAI6_BASE_ADDR 0x30030000
18 #define SAI5_BASE_ADDR 0x30040000
19 #define SAI4_BASE_ADDR 0x30050000
20 #define SPBA2_BASE_ADDR 0x300F0000
21 #define AIPS1_BASE_ADDR 0x301F0000
22 #define GPIO1_BASE_ADDR 0X30200000
[all …]
/openbmc/qemu/include/hw/arm/
H A Dfsl-imx7.h100 FSL_IMX7_MMDC_ADDR = 0x80000000,
103 FSL_IMX7_QSPI1_MEM_ADDR = 0x60000000,
106 FSL_IMX7_PCIE1_MEM_ADDR = 0x40000000,
109 FSL_IMX7_QSPI1_RX_BUF_ADDR = 0x34000000,
113 FSL_IMX7_PCIE_REG_ADDR = 0x33800000,
116 FSL_IMX7_DMA_APBH_ADDR = 0x33000000,
117 FSL_IMX7_DMA_APBH_SIZE = 0x8000,
120 FSL_IMX7_GPV6_ADDR = 0x32600000,
121 FSL_IMX7_GPV5_ADDR = 0x32500000,
122 FSL_IMX7_GPV4_ADDR = 0x32400000,
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx7s.dtsi94 #size-cells = <0>;
96 cpu0: cpu@0 {
99 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
124 #phy-cells = <0>;
131 #phy-cells = <0>;
150 #size-cells = <0>;
152 port@0 {
153 reg = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi56 #size-cells = <0>;
63 arm,psci-suspend-param = <0x0010000>;
71 cpu0: cpu@0 {
74 reg = <0>;
94 opp-supported-hw = <0xf>, <0xf>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
116 #phy-cells = <0>;
124 #phy-cells = <0>;
143 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq.dtsi47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #size-cells = <0>;
105 A53_0: cpu@0 {
[all …]