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/openbmc/u-boot/board/freescale/ls1088a/
H A DKconfig18 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP
19 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
24 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP
25 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
49 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP
50 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
55 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP
56 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
/openbmc/u-boot/drivers/dma/
H A DMCD_tasks.c66 0x00000000,
67 0x00000000,
68 (u32) MCD_varTab0, /* Task 0 Variable Table */
69 (u32) MCD_funcDescTab0, /* Task 0 Fn Desc. Table & Flags */
70 0x00000000,
71 0x00000000,
72 (u32) MCD_contextSave0, /* Task 0 context save space */
73 0x00000000,
74 0x00000000,
75 0x00000000,
[all …]
/openbmc/u-boot/board/freescale/ls2080aqds/
H A DKconfig19 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
20 default 0x580400000 if SYS_LS_PPA_FW_IN_XIP
21 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
26 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
27 default 0x580680000 if SYS_LS_PPA_FW_IN_XIP
28 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
/openbmc/u-boot/board/freescale/ls2080ardb/
H A DKconfig20 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
21 default 0x580400000 if SYS_LS_PPA_FW_IN_XIP
22 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
27 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
28 default 0x580680000 if SYS_LS_PPA_FW_IN_XIP
29 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dintel,keembay-phy-usb.yaml27 const: 0
40 reg = <0x20400000 0x1c>,
41 <0x20480000 0xd0>;
43 #phy-cells = <0>;
/openbmc/qemu/hw/arm/
H A Dmps2.c130 memory_region_init_alias(mr, NULL, name, orig, 0, in make_ram_alias()
166 * 0x21000000 .. 0x21ffffff : PSRAM (16MB) in mps2_common_init()
168 * 0x00000000 .. 0x003fffff : ZBT SSRAM1 in mps2_common_init()
169 * 0x00400000 .. 0x007fffff : mirror of ZBT SSRAM1 in mps2_common_init()
170 * 0x20000000 .. 0x203fffff : ZBT SSRAM 2&3 in mps2_common_init()
171 * 0x20400000 .. 0x207fffff : mirror of ZBT SSRAM 2&3 in mps2_common_init()
173 * 0x01000000 .. 0x01003fff : block RAM (16K) in mps2_common_init()
174 * 0x01004000 .. 0x01007fff : mirror of above in mps2_common_init()
175 * 0x01008000 .. 0x0100bfff : mirror of above in mps2_common_init()
176 * 0x0100c000 .. 0x0100ffff : mirror of above in mps2_common_init()
[all …]
/openbmc/linux/arch/sh/boards/mach-rsk/
H A Dsetup.c30 .offset = 0x00000000,
31 .size = 0x00040000,
36 .size = 0x001c0000,
51 .start = 0x20000000,
52 .end = 0x20400000,
72 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); in rsk_devices_setup()
/openbmc/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgv100.c47 nvkm_wo32(chan->inst, 0x008, lower_32_bits(userd)); in gv100_chan_ramfc_write()
48 nvkm_wo32(chan->inst, 0x00c, upper_32_bits(userd)); in gv100_chan_ramfc_write()
49 nvkm_wo32(chan->inst, 0x010, 0x0000face); in gv100_chan_ramfc_write()
50 nvkm_wo32(chan->inst, 0x030, 0x7ffff902); in gv100_chan_ramfc_write()
51 nvkm_wo32(chan->inst, 0x048, lower_32_bits(offset)); in gv100_chan_ramfc_write()
52 nvkm_wo32(chan->inst, 0x04c, upper_32_bits(offset) | (limit2 << 16)); in gv100_chan_ramfc_write()
53 nvkm_wo32(chan->inst, 0x084, 0x20400000); in gv100_chan_ramfc_write()
54 nvkm_wo32(chan->inst, 0x094, 0x30000000 | devm); in gv100_chan_ramfc_write()
55 nvkm_wo32(chan->inst, 0x0e4, priv ? 0x00000020 : 0x00000000); in gv100_chan_ramfc_write()
56 nvkm_wo32(chan->inst, 0x0e8, chan->id); in gv100_chan_ramfc_write()
[all …]
H A Dga100.c46 nvkm_wr32(runl->fifo->engine.subdev.device, runl->chan + (chan->id * 4), 0x00000003); in ga100_chan_stop()
54 const int gfid = 0; in ga100_chan_start()
56 nvkm_wr32(device, runl->chan + (chan->id * 4), 0x00000002); in ga100_chan_start()
57 nvkm_wr32(device, runl->addr + 0x0090, (gfid << 16) | chan->id); /* INTERNAL_DOORBELL. */ in ga100_chan_start()
65 nvkm_wr32(runl->fifo->engine.subdev.device, runl->chan + (chan->id * 4), 0xffffffff); in ga100_chan_unbind()
74 nvkm_wo32(chan->inst, 0x010, 0x0000face); in ga100_chan_ramfc_write()
75 nvkm_wo32(chan->inst, 0x030, 0x7ffff902); in ga100_chan_ramfc_write()
76 nvkm_wo32(chan->inst, 0x048, lower_32_bits(offset)); in ga100_chan_ramfc_write()
77 nvkm_wo32(chan->inst, 0x04c, upper_32_bits(offset) | (limit2 << 16)); in ga100_chan_ramfc_write()
78 nvkm_wo32(chan->inst, 0x084, 0x20400000); in ga100_chan_ramfc_write()
[all …]
H A Dgk104.c44 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000800, 0x00000800); in gk104_chan_stop()
52 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000400, 0x00000400); in gk104_chan_start()
60 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x00000000); in gk104_chan_unbind()
68 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x80000000 | chan->inst->addr >> 12); in gk104_chan_bind_inst()
77 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x000f0000, runl->id << 16); in gk104_chan_bind()
88 nvkm_wo32(chan->inst, 0x08, lower_32_bits(userd)); in gk104_chan_ramfc_write()
89 nvkm_wo32(chan->inst, 0x0c, upper_32_bits(userd)); in gk104_chan_ramfc_write()
90 nvkm_wo32(chan->inst, 0x10, 0x0000face); in gk104_chan_ramfc_write()
91 nvkm_wo32(chan->inst, 0x30, 0xfffff902); in gk104_chan_ramfc_write()
92 nvkm_wo32(chan->inst, 0x48, lower_32_bits(offset)); in gk104_chan_ramfc_write()
[all …]
H A Dgf100.c43 nvkm_wr32(chan->cgrp->runl->fifo->engine.subdev.device, 0x002634, chan->id); in gf100_chan_preempt()
51 nvkm_mask(device, 0x003004 + (chan->id * 8), 0x00000001, 0x00000000); in gf100_chan_stop()
59 nvkm_wr32(device, 0x003004 + (chan->id * 8), 0x001f0001); in gf100_chan_start()
73 nvkm_wr32(device, 0x003000 + (chan->id * 8), 0x00000000); in gf100_chan_unbind()
81 nvkm_wr32(device, 0x003000 + (chan->id * 8), 0xc0000000 | chan->inst->addr >> 12); in gf100_chan_bind()
91 nvkm_wo32(chan->inst, 0x08, lower_32_bits(userd)); in gf100_chan_ramfc_write()
92 nvkm_wo32(chan->inst, 0x0c, upper_32_bits(userd)); in gf100_chan_ramfc_write()
93 nvkm_wo32(chan->inst, 0x10, 0x0000face); in gf100_chan_ramfc_write()
94 nvkm_wo32(chan->inst, 0x30, 0xfffff902); in gf100_chan_ramfc_write()
95 nvkm_wo32(chan->inst, 0x48, lower_32_bits(offset)); in gf100_chan_ramfc_write()
[all …]
/openbmc/linux/drivers/dma/bestcomm/
H A Dbestcomm.c59 for (i=0; i<BCOM_MAX_TASKS; i++) in bcom_task_alloc()
61 bcom_eng->tdt[i].stop = 0xfffffffful; /* dummy addr */ in bcom_task_alloc()
68 if (tasknum < 0) in bcom_task_alloc()
95 memset_io(tsk->bd, 0x00, bd_count * bd_size); in bcom_task_alloc()
112 bcom_eng->tdt[tasknum].stop = 0; in bcom_task_alloc()
125 bcom_eng->tdt[tsk->tasknum].start = 0; in bcom_task_free()
126 bcom_eng->tdt[tsk->tasknum].stop = 0; in bcom_task_free()
151 if ((task < 0) || (task >= BCOM_MAX_TASKS)) { in bcom_load_image()
186 memset_io(var, 0x00, BCOM_VAR_SIZE); in bcom_load_image()
187 memset_io(inc, 0x00, BCOM_INC_SIZE); in bcom_load_image()
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/openbmc/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]