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Searched +full:0 +full:x20040000 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Dlpc1857-eeprom.txt21 reg = <0x4000e000 0x1000>,
22 <0x20040000 0x4000>;
/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.h11 #define MSM_DSI_VER_MAJOR_V2 0x02
12 #define MSM_DSI_VER_MAJOR_6G 0x03
13 #define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
14 #define MSM_DSI_6G_VER_MINOR_V1_0_2 0x10000002
15 #define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
16 #define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
17 #define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
18 #define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
19 #define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
20 #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-dynamic-funnel.yaml64 '^port(@[0-7])?$':
91 reg = <0x20040000 0x1000>;
105 #size-cells = <0>;
107 port@0 {
108 reg = <0>;
/openbmc/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi40 reg = <0x20018000 0x4000>;
41 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
51 reg = <0x2001c000 0x4000>;
52 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
63 reg = <0x20078000 0x4000>;
76 #clock-cells = <0>;
82 reg = <0x10138000 0x1000>;
89 reg = <0x1013c000 0x100>;
94 reg = <0x1013c200 0x20>;
95 interrupts = <GIC_PPI 11 0x304>;
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0>;
61 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
109 reg = <0 0x80000000 0 0x40000000>;
117 /* Chipselect 2 is physically at 0x18000000 */
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc18xx.dtsi19 #define LPC_PIN(port, pin) (0x##port * 32 + pin)
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0x0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
53 #clock-cells = <0>;
54 clock-frequency = <0>;
60 #clock-cells = <0>;
61 clock-frequency = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi12 reg = <0x0 0x2a810000 0x0 0x10000>;
16 ranges = <0 0x0 0x2a820000 0x20000>;
21 reg = <0x10000 0x10000>;
27 reg = <0x0 0x2b1f0000 0x0 0x1000>;
38 reg = <0x0 0x2b400000 0x0 0x10000>;
50 reg = <0x0 0x2b500000 0x0 0x10000>;
61 reg = <0x0 0x2b600000 0x0 0x10000>;
67 power-domains = <&scpi_devpd 0>;
72 reg = <0x0 0x2c010000 0 0x1000>,
73 <0x0 0x2c02f000 0 0x2000>,
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi29 #size-cells = <0>;
34 reg = <0xf00>;
43 cpu_opp_table: opp-table-0 {
85 #clock-cells = <0>;
90 reg = <0x10080000 0x2000>;
93 ranges = <0 0x10080000 0x2000>;
98 reg = <0x10210000 0x100>;
107 pinctrl-0 = <&uart2m0_xfer>;
113 reg = <0x10220000 0x100>;
122 pinctrl-0 = <&uart1_xfer>;
[all …]
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_dfs.c58 printf("\n write reg 0x%08x = 0x%08x", addr, val); in dfs_reg_write()
76 } while (reg); /* Wait for '0' */ in wait_refresh_op_complete()
117 u32 cs = 0; in ddr3_dfs_high_2_low()
123 freq_par = ddr3_get_freq_parameter(freq, 0); in ddr3_dfs_high_2_low()
133 /* [0] - DfsDllNextState - Disable */ in ddr3_dfs_high_2_low()
135 dfs_reg_write(REG_DFS_ADDR, reg); /* 0x1528 - DFS register */ in ddr3_dfs_high_2_low()
142 /* [0] - RetryMask - Disable */ in ddr3_dfs_high_2_low()
144 /* 0x14B0 - Dunit MMask Register */ in ddr3_dfs_high_2_low()
150 dfs_reg_write(REG_DFS_ADDR, reg); /* 0x1528 - DFS register */ in ddr3_dfs_high_2_low()
158 reg = (0x9 & REG_SDRAM_OPERATION_CWA_RC_MASK) << in ddr3_dfs_high_2_low()
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dphy.c23 } while (0)
33 return 0; in _rtl8821ae_phy_calculate_bit_shift()
60 rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x3); in rtl8812ae_fixspur()
61 /* 0x8AC[11:10] = 2'b11*/ in rtl8812ae_fixspur()
63 rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x2); in rtl8812ae_fixspur()
64 /* 0x8AC[11:10] = 2'b10*/ in rtl8812ae_fixspur()
71 rtl_set_bbreg(hw, RRFMOD, 0x300, 0x3); in rtl8812ae_fixspur()
72 /*0x8AC[9:8] = 2'b11*/ in rtl8812ae_fixspur()
74 /* 0x8C4[30] = 1*/ in rtl8812ae_fixspur()
78 /*0x8C4[30] = 1*/ in rtl8812ae_fixspur()
[all …]