Searched +full:0 +full:x20034000 (Results 1 – 6 of 6) sorted by relevance
16 - pinctrl-0, pinctrl-name:22 reg = <0x20034000 0x4000>;27 pinctrl-0 = <&hdmi_ctl>;31 #size-cells = <0>;32 hdmi_in_lcdc: endpoint@0 {33 reg = <0>;
30 DATA 4 0xB8002050 0x0000D84331 DATA 4 0xB8002054 0x2225252132 DATA 4 0xB8002058 0x22220A0035 DATA 4 0xB8001004 0x0076E83A36 DATA 4 0xB8001010 0x0000020437 DATA 4 0xB8001000 0x9221000038 DATA 4 0x80000f00 0x1234432139 DATA 4 0xB8001000 0xB221000040 DATA 1 0x82000000 0xda41 DATA 1 0x83000000 0xda[all …]
16 options with option 0 being used as a GPIO.81 "gpio@[0-9a-f]+$":101 minimum: 0124 - minimum: 0128 - minimum: 0132 - minimum: 0135 Mux 0 means GPIO and mux 1 to N means156 reg = <0x20034000 0x100>;181 reg = <0x20064000 0x400>;184 pinctrl-0 = <&uart2_xfer>;
6 muxing options with option 0 being the use as a GPIO.61 The MUX 0 means gpio and MUX 1 to N mean the specific device function.81 reg = <0x20034000 0x100>;108 reg = <0x20064000 0x400>;116 pinctrl-0 = <&uart2_xfer>;129 gpio0: gpio0@0x2000a000 {131 reg = <0x2000a000 0x100>;142 gpio1: gpio1@0x2003c000 {144 reg = <0x2003c000 0x100>;
18 #size-cells = <0>;21 cpu0: cpu@0 {25 reg = <0x0>;42 reg = <0x1>;53 reg = <0x10080000 0x10000>;56 ranges = <0 0x10080000 0x10000>;58 smp-sram@0 {60 reg = <0x0 0x50>;66 reg = <0x1010c000 0x19c>;81 #size-cells = <0>;[all …]
34 #size-cells = <0>;40 reg = <0xf00>;53 reg = <0xf01>;84 #clock-cells = <0>;89 reg = <0x10080000 0x2000>;92 ranges = <0 0x10080000 0x2000>;94 smp-sram@0 {96 reg = <0x00 0x10>;102 reg = <0x10090000 0x10000>;122 reg = <0x10108000 0x800>;[all …]