| /openbmc/linux/Documentation/devicetree/bindings/arm/rockchip/ |
| H A D | pmu.yaml | 64 reg = <0x20004000 0x100>;
|
| /openbmc/linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | nic_reg.h | 13 #define NIC_PF_CFG (0x0000)
14 #define NIC_PF_STATUS (0x0010)
15 #define NIC_PF_INTR_TIMER_CFG (0x0030)
16 #define NIC_PF_BIST_STATUS (0x0040)
17 #define NIC_PF_SOFT_RESET (0x0050)
18 #define NIC_PF_TCP_TIMER (0x0060)
19 #define NIC_PF_BP_CFG (0x0080)
20 #define NIC_PF_RRM_CFG (0x0088)
21 #define NIC_PF_CQM_CFG (0x00A0)
22 #define NIC_PF_CNM_CF (0x00A8)
[all …]
|
| /openbmc/linux/lib/crypto/ |
| H A D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3xxx.dtsi | 40 reg = <0x20018000 0x4000>;
41 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
51 reg = <0x2001c000 0x4000>;
52 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
63 reg = <0x20078000 0x4000>;
76 #clock-cells = <0>;
82 reg = <0x10138000 0x1000>;
89 reg = <0x1013c000 0x100>;
94 reg = <0x1013c200 0x20>;
95 interrupts = <GIC_PPI 11 0x304>;
[all …]
|
| H A D | rk3128.dtsi | 39 reg = <0x60000000 0x40000000>;
52 #size-cells = <0>;
55 cpu0:cpu@0x000 {
58 reg = <0x000>;
68 cpu1:cpu@0x001 {
71 reg = <0x001>;
74 cpu2:cpu@0x002 {
77 reg = <0x002>;
80 cpu3:cpu@0x003 {
83 reg = <0x003>;
[all …]
|
| /openbmc/linux/drivers/gpu/drm/i915/gt/ |
| H A D | gen9_renderstate.c | 11 0x000007a8,
12 0x000007b4,
13 0x000007bc,
14 0x000007cc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
|
| H A D | gen8_renderstate.c | 11 0x00000798,
12 0x000007a4,
13 0x000007ac,
14 0x000007bc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
|
| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 35 #clock-cells = <0>;
41 reg = <0x10090000 0x10000>;
52 reg = <0x10104000 0x800>;
64 reg = <0x10138000 0x1000>;
71 reg = <0x1013c000 0x100>;
76 reg = <0x1013c200 0x20>;
90 reg = <0x1013c600 0x20>;
99 reg = <0x1013d000 0x1000>,
100 <0x1013c100 0x0100>;
105 reg = <0x10124000 0x400>;
[all …]
|
| /openbmc/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 19 #define CRU_BASE 0x20000000
20 #define GRF_BASE 0x20008000
21 #define DDR_PHY_BASE 0x2000a000
22 #define DDR_PCTL_BASE 0x20004000
23 #define CPU_AXI_BUS_BASE 0x10128000
43 const struct rk3036_ddr_timing ddr_timing = {0x18c,
44 {0x18c, 0xc8, 0x1f4, 0x27, 0x4e,
45 0x4, 0x8b, 0x06, 0x03, 0x0, 0x06, 0x05, 0x0f, 0x15, 0x06, 0x04, 0x04,
46 0x06, 0x04, 0x200, 0x03, 0x0a, 0x40, 0x2710, 0x01, 0x05, 0x05, 0x03,
47 0x0c, 0x28, 0x100, 0x0, 0x04, 0x0},
[all …]
|
| /openbmc/qemu/hw/riscv/ |
| H A D | microchip_pfsoc.c | 11 * 0) CLINT (Core Level Interruptor)
62 #define RESET_VECTOR 0x20220000
68 #define GEM_REVISION 0x0107010c
89 [MICROCHIP_PFSOC_RSVD0] = { 0x0, 0x100 },
90 [MICROCHIP_PFSOC_DEBUG] = { 0x100, 0xf00 },
91 [MICROCHIP_PFSOC_E51_DTIM] = { 0x1000000, 0x2000 },
92 [MICROCHIP_PFSOC_BUSERR_UNIT0] = { 0x1700000, 0x1000 },
93 [MICROCHIP_PFSOC_BUSERR_UNIT1] = { 0x1701000, 0x1000 },
94 [MICROCHIP_PFSOC_BUSERR_UNIT2] = { 0x1702000, 0x1000 },
95 [MICROCHIP_PFSOC_BUSERR_UNIT3] = { 0x1703000, 0x1000 },
[all …]
|
| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
| H A D | base.c | 60 int nr = 0; in nvkm_device_list()
73 .bios = { 0x00000001, nvkm_bios_new },
79 .bios = { 0x00000001, nvkm_bios_new },
80 .bus = { 0x00000001, nv04_bus_new },
81 .clk = { 0x00000001, nv04_clk_new },
82 .devinit = { 0x00000001, nv04_devinit_new },
83 .fb = { 0x00000001, nv04_fb_new },
84 .i2c = { 0x00000001, nv04_i2c_new },
85 .imem = { 0x00000001, nv04_instmem_new },
86 .mc = { 0x00000001, nv04_mc_new },
[all …]
|