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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-sdx65.yaml53 reg = <0x100000 0x1f7400>;
H A Dqcom,sdx75-gcc.yaml55 reg = <0x80000 0x1f7400>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdx75.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
45 clocks = <&cpufreq_hw 0>;
49 qcom,freq-domain = <&cpufreq_hw 0>;
70 reg = <0x0 0x100>;
71 clocks = <&cpufreq_hw 0>;
75 qcom,freq-domain = <&cpufreq_hw 0>;
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