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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/umc/
H A Dumc_6_7_0_sh_mask.h29 …C_UMC0_MCUMC_STATUST0__ErrorCode__SHIFT 0x0
30 …_UMC0_MCUMC_STATUST0__ErrorCodeExt__SHIFT 0x10
31 …_UMC0_MCUMC_STATUST0__RESERV22__SHIFT 0x16
32 …_UMC0_MCUMC_STATUST0__AddrLsb__SHIFT 0x18
33 …_UMC0_MCUMC_STATUST0__RESERV30__SHIFT 0x1e
34 …_UMC0_MCUMC_STATUST0__ErrCoreId__SHIFT 0x20
35 …_UMC0_MCUMC_STATUST0__RESERV38__SHIFT 0x26
36 …_UMC0_MCUMC_STATUST0__Scrub__SHIFT 0x28
37 …_UMC0_MCUMC_STATUST0__RESERV41__SHIFT 0x29
38 …_UMC0_MCUMC_STATUST0__Poison__SHIFT 0x2b
[all …]
/openbmc/linux/lib/raid6/
H A Dloongarch_simd.c16 * The vector algorithms are currently priority 0, which means the generic
52 for (d = 0; d < bytes; d += NSIZE*4) { in raid6_lsx_gen_syndrome()
54 asm volatile("vld $vr0, %0" : : "m"(dptr[z0][d+0*NSIZE])); in raid6_lsx_gen_syndrome()
55 asm volatile("vld $vr1, %0" : : "m"(dptr[z0][d+1*NSIZE])); in raid6_lsx_gen_syndrome()
56 asm volatile("vld $vr2, %0" : : "m"(dptr[z0][d+2*NSIZE])); in raid6_lsx_gen_syndrome()
57 asm volatile("vld $vr3, %0" : : "m"(dptr[z0][d+3*NSIZE])); in raid6_lsx_gen_syndrome()
58 asm volatile("vori.b $vr4, $vr0, 0"); in raid6_lsx_gen_syndrome()
59 asm volatile("vori.b $vr5, $vr1, 0"); in raid6_lsx_gen_syndrome()
60 asm volatile("vori.b $vr6, $vr2, 0"); in raid6_lsx_gen_syndrome()
61 asm volatile("vori.b $vr7, $vr3, 0"); in raid6_lsx_gen_syndrome()
[all …]
H A Dneon.uc44 * The MASK() operation returns 0xFF in any byte for which the high
45 * bit is 1, 0x00 for any byte for which the high bit is 0.
64 const unative_t x1d = vdupq_n_u8(0x1d);
70 for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
72 for ( z = z0-1 ; z >= 0 ; z-- ) {
78 w2$$ = vandq_u8(w2$$, x1d);
95 const unative_t x1d = vdupq_n_u8(0x1d);
101 for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
112 w2$$ = vandq_u8(w2$$, x1d);
121 w2$$ = PMUL(w2$$, x1d);
[all …]
/openbmc/linux/crypto/
H A Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
120 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
132 val = mpi_alloc(0); in dh_is_pubkey_valid()
159 if (ret != 0) in dh_is_pubkey_valid()
[all …]
H A Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
201 "\xDF\x8E\x8A\xE5\x9D\x73\x3D\x9F\x33\xB3\x01\x62\x4A\xFD\x1D\x51"
211 "\x59\x0B\x95\x72\xA2\xC2\xA9\xC4\x06\x05\x9D\xC2\xAB\x2F\x1D\xAF"
218 "\x36\x3F\xF7\x18\x9D\xA8\xE9\x0B\x1D\x34\x1F\x71\xD0\x9B\x76\xA8"
219 "\xA9\x43\xE1\x1D\x10\xB2\x4D\x24\x9F\x2D\xEA\xFE\xF8\x0C\x18\x26",
224 "\x5e\x32\x39\x6d\xc1\x1d\x7d\x50\x3b\x9f\x7a\xad\xf0\x2e\x25\x53"
241 "\x7F\xE2\x53\x72\x98\xCA\x2A\x8F\x59\x46\xF8\xE5\xFD\x09\x1D\xBD"
303 "\xC6\x67\xFF\x1D\x1E\x3C\x1D\xC1\xB5\x5F\x6C\xC0\xB2\x07\x3A\x6D"
330 "\xA6\xFF\x46\x83\x97\xDE\xE9\xE2\x17\x03\x06\x14\xE2\xD7\xB1\x1D"
[all …]
/openbmc/phosphor-host-ipmid/scripts/
H A Dentity-example.md30 # Container Entity Id and Container Entity Instance = (0x13, 0x81)
31 # Contained Entity Id and Contained Entity Instance = (0x0A, 0x1),
32 # (0x0A, 0x3), (0x0A, 0x5), (0x0A, 0x7)
34 0x01:
37 containerEntityId: 0x13
38 containerEntityInstance: 0x81
46 entityId1: 0x0A
47 entityInstance1: 0x1
48 entityId2: 0x0A
49 entityInstance2: 0x3
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Datheros.c11 #define AR803x_PHY_DEBUG_ADDR_REG 0x1d
12 #define AR803x_PHY_DEBUG_DATA_REG 0x1e
14 #define AR803x_DEBUG_REG_5 0x5
15 #define AR803x_RGMII_TX_CLK_DLY 0x100
17 #define AR803x_DEBUG_REG_0 0x0
18 #define AR803x_RGMII_RX_CLK_DLY 0x8000
22 phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200); in ar8021_config()
23 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in ar8021_config()
24 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); in ar8021_config()
27 return 0; in ar8021_config()
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Dstv0900_init.h24 { 0, 11101 }, /*C/N=-0dB*/
83 { -5, 0xCAA1 }, /*-5dBm*/
84 { -10, 0xC229 }, /*-10dBm*/
85 { -15, 0xBB08 }, /*-15dBm*/
86 { -20, 0xB4BC }, /*-20dBm*/
87 { -25, 0xAD5A }, /*-25dBm*/
88 { -30, 0xA298 }, /*-30dBm*/
89 { -35, 0x98A8 }, /*-35dBm*/
90 { -40, 0x8389 }, /*-40dBm*/
91 { -45, 0x59BE }, /*-45dBm*/
[all …]
H A Ditd1000.c31 } while (0)
35 } while (0)
39 } while (0)
46 .addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1 in itd1000_write_regs()
56 buf[0] = reg; in itd1000_write_regs()
59 /* itd_dbg("wr %02x: %02x\n", reg, v[0]); */ in itd1000_write_regs()
65 return 0; in itd1000_write_regs()
72 { .addr = state->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 }, in itd1000_read_reg()
77 itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1); in itd1000_read_reg()
100 { 0, 0x8, 0x3 },
[all …]
/openbmc/linux/drivers/media/usb/gspca/
H A Dov534.c29 #define OV534_REG_ADDRESS 0xf1 /* sensor address */
30 #define OV534_REG_SUBADDR 0xf2
31 #define OV534_REG_WRITE 0xf3
32 #define OV534_REG_READ 0xf4
33 #define OV534_REG_OPERATION 0xf5
34 #define OV534_REG_STATUS 0xf6
36 #define OV534_OP_WRITE_3 0x37
37 #define OV534_OP_WRITE_2 0x33
38 #define OV534_OP_READ_2 0xf9
96 .priv = 0},
[all …]
H A Dov534_9.c20 #define OV534_REG_ADDRESS 0xf1 /* sensor address */
21 #define OV534_REG_SUBADDR 0xf2
22 #define OV534_REG_WRITE 0xf3
23 #define OV534_REG_READ 0xf4
24 #define OV534_REG_OPERATION 0xf5
25 #define OV534_REG_STATUS 0xf6
27 #define OV534_OP_WRITE_3 0x37
28 #define OV534_OP_WRITE_2 0x33
29 #define OV534_OP_READ_2 0xf9
54 #define QVGA_MODE 0
[all …]
/openbmc/qemu/tests/tcg/ppc64/
H A Dbcdsub.c9 #define CRF_SO (1 << 0)
10 #define UNDEF 0
28 int cr = 0; \
41 BCDSUB(0, 0, 1, PS) \
42 "mfocrf %0, 0b10\n\t" \
54 } while (0)
58 * sign = (PS) ? 0b1111 : 0b1100
59 * CR6 = 0b0010
64 TEST(0x9999999999999999, 0x999999999999999c, in test_bcdsub_eq()
65 0x9999999999999999, 0x999999999999999c, in test_bcdsub_eq()
[all …]
/openbmc/openbmc/meta-amd/meta-daytonax/recipes-phosphor/configuration/daytonax-yaml-config/
H A Ddaytonax-ipmi-sensors.yaml2 sensorType: 0x01
3 entityID: 0x03
5 sensorReadingType: 0x01
7 scale: 0
8 offsetB: 0
9 bExp: 0
10 rExp: 0
18 0xFF:
22 sensorType: 0x01
23 entityID: 0x03
[all …]
/openbmc/qemu/tests/tcg/s390x/
H A Dcvd.c39 __uint128_t m = (((__uint128_t)0x9223372036854775) << 16) | 0x8070; in main()
41 assert(cvd(0) == 0xc); in main()
42 assert(cvd(1) == 0x1c); in main()
43 assert(cvd(25594) == 0x25594c); in main()
44 assert(cvd(-1) == 0x1d); in main()
45 assert(cvd(0x7fffffff) == 0x2147483647c); in main()
46 assert(cvd(-0x80000000) == 0x2147483648d); in main()
48 assert(cvdy(0) == 0xc); in main()
49 assert(cvdy(1) == 0x1c); in main()
50 assert(cvdy(25594) == 0x25594c); in main()
[all …]
H A Dcvb.c19 #define FAIL 0x1234567887654321
20 #define OK32(x) (0x1234567800000000 | (uint32_t)(x))
54 __uint128_t m = (((__uint128_t)0x9223372036854775) << 16) | 0x8070; in main()
58 memset(&act, 0, sizeof(act)); in main()
61 assert(err == 0); in main()
63 assert(err == 0); in main()
65 assert(cvb(0xc) == OK32(0) && signum == -1); in main()
66 assert(cvb(0x1c) == OK32(1) && signum == -1); in main()
67 assert(cvb(0x25594c) == OK32(25594) && signum == -1); in main()
68 assert(cvb(0x1d) == OK32(-1) && signum == -1); in main()
[all …]
/openbmc/qemu/target/ppc/translate/
H A Dvsx-ops.c.inc1 GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
2 GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),
3 GEN_HANDLER_E(mtvsrwz, 0x1F, 0x13, 0x07, 0x0000F800, PPC_NONE, PPC2_VSX207),
5 GEN_HANDLER_E(mfvsrd, 0x1F, 0x13, 0x01, 0x0000F800, PPC_NONE, PPC2_VSX207),
6 GEN_HANDLER_E(mtvsrd, 0x1F, 0x13, 0x05, 0x0000F800, PPC_NONE, PPC2_VSX207),
7 GEN_HANDLER_E(mfvsrld, 0X1F, 0x13, 0x09, 0x0000F800, PPC_NONE, PPC2_ISA300),
8 GEN_HANDLER_E(mtvsrdd, 0X1F, 0x13, 0x0D, 0x0, PPC_NONE, PPC2_ISA300),
9 GEN_HANDLER_E(mtvsrws, 0x1F, 0x13, 0x0C, 0x0000F800, PPC_NONE, PPC2_ISA300),
13 GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 0, PPC_NONE, fl2), \
14 GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0, PPC_NONE, fl2)
[all …]
/openbmc/linux/crypto/asymmetric_keys/
H A Dselftest.c42 "\xe0\xc3\xc1\x79\xc2\xb3\xeb\xc0\x1e\x6d\x3e\x54\x1d\xbd\xb7\x92"
45 "\x66\xdf\xbf\x1d\x76\x78\x02\x31\xe8\xe5\x07\xf8\xb7\x82\x5c\x0d"
65 "\x4c\x53\x3a\xa2\xb5\x84\x1d\x4b\x65\x7e\xdc\xf7\xdb\x36\x7d\xbe"
72 "\x21\x02\x03\x01\x00\x01\xa3\x5d\x30\x5b\x30\x0c\x06\x03\x55\x1d"
73 "\x13\x01\x01\xff\x04\x02\x30\x00\x30\x0b\x06\x03\x55\x1d\x0f\x04"
74 "\x04\x03\x02\x07\x80\x30\x1d\x06\x03\x55\x1d\x0e\x04\x16\x04\x14"
76 "\x51\x8f\xe3\xdb\x30\x1f\x06\x03\x55\x1d\x23\x04\x18\x30\x16\x80"
148 "\xcc\x12\x63\xd4\xd6\xac\x9b\x1d\x14\x77\x8d\x1c\x57\xd5\x27\xc6"
162 "\xb8\x7a\x89\xc5\x9e\xd9\x97\xdf\xd7\xe7\xc6\x1d\xc0\x20\x6c\xb8"
165 "\xa7\x4a\x7e\x62\x1d\xc4\x50\x39\x35\x4e\x28\xcb\x4a\xfb\x9d\xdb"
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dt2081qds.dts104 #size-cells = <0>;
105 reg = <0x54 1>;
106 mux-mask = <0xe0>;
108 t2081mdio0: mdio@0 {
110 #size-cells = <0>;
111 reg = <0>;
114 reg = <0x1>;
120 #size-cells = <0>;
121 reg = <0x20>;
124 reg = <0x2>;
[all …]
/openbmc/linux/drivers/infiniband/hw/qib/
H A Dqib_6120_regs.h35 #define QIB_6120_Revision_OFFS 0x0
36 #define QIB_6120_Revision_R_Simulator_LSB 0x3F
37 #define QIB_6120_Revision_R_Simulator_RMASK 0x1
38 #define QIB_6120_Revision_Reserved_LSB 0x28
39 #define QIB_6120_Revision_Reserved_RMASK 0x7FFFFF
40 #define QIB_6120_Revision_BoardID_LSB 0x20
41 #define QIB_6120_Revision_BoardID_RMASK 0xFF
42 #define QIB_6120_Revision_R_SW_LSB 0x18
43 #define QIB_6120_Revision_R_SW_RMASK 0xFF
44 #define QIB_6120_Revision_R_Arch_LSB 0x10
[all …]
H A Dqib_7322_regs.h35 #define QIB_7322_Revision_OFFS 0x0
36 #define QIB_7322_Revision_DEF 0x0000000002010601
37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F
38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F
39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1
40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E
41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E
42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1
43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28
44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D
[all …]
/openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/configuration/entity-manager/
H A Dblacklist.json3 0, number
7 "0x08", "0x09", "0x0A", "0x0B", "0x0C", "0x0D", "0x0E", "0x0F", string
8 "0x10", "0x11", "0x12", "0x13", "0x14", "0x15", "0x16", "0x17",
9 "0x18", "0x19", "0x1A", "0x1B", "0x1C", "0x1D", "0x1E", "0x1F",
10 "0x20", "0x21", "0x22", "0x23", "0x24", "0x25", "0x26", "0x27",
11 "0x28", "0x29", "0x2A", "0x2B", "0x2C", "0x2D", "0x2E", "0x2F",
12 "0x30", "0x31", "0x32", "0x33", "0x34", "0x35", "0x36", "0x37",
13 "0x38", "0x39", "0x3A", "0x3B", "0x3C", "0x3D", "0x3E", "0x3F",
14 "0x40", "0x41", "0x42", "0x43", "0x44", "0x45", "0x46", "0x47",
15 "0x48", "0x49", "0x4A", "0x4B", "0x4C", "0x4D", "0x4E", "0x4F",
[all …]
/openbmc/dbus-sensors/src/tests/
H A Dtest_MCTPEndpoint.cpp41 {"Bus", "0"}, in TEST()
52 {"Bus", "0"}, in TEST()
62 {"Address", "0x1d"}, in TEST()
72 {"Address", "0x1d"}, in TEST()
83 {"Address", "0x1d"}, in TEST()
84 {"Bus", "0"}, in TEST()
/openbmc/linux/arch/x86/kernel/cpu/microcode/
H A Damd_shas.c3 { 0x8001227, {
4 0x99,0xc0,0x9b,0x2b,0xcc,0x9f,0x52,0x1b,
5 0x1a,0x5f,0x1d,0x83,0xa1,0x6c,0xc4,0x46,
6 0xe2,0x6c,0xda,0x73,0xfb,0x2d,0x23,0xa8,
7 0x77,0xdc,0x15,0x31,0x33,0x4a,0x46,0x18,
10 { 0x8001250, {
11 0xc0,0x0b,0x6b,0x19,0xfd,0x5c,0x39,0x60,
12 0xd5,0xc3,0x57,0x46,0x54,0xe4,0xd1,0xaa,
13 0xa8,0xf7,0x1f,0xa8,0x6a,0x60,0x3e,0xe3,
14 0x27,0x39,0x8e,0x53,0x30,0xf8,0x49,0x19,
[all …]
/openbmc/openbmc/meta-facebook/meta-yosemite4/recipes-phosphor/configuration/entity-manager/
H A Dblacklist.json3 0, number
13 "addresses": [ "0x51", "0x54", "0x70" ] string
17 "addresses": [ "0x51", "0x54", "0x71" ] string
22 …"addresses": [ "0x10", "0x12", "0x20", "0x21", "0x22", "0x23", "0x40", "0x41", "0x48", "0x49", "0x… string
26 "addresses": [ "0x48", "0x50", "0x54", "0x6F", "0x70" ] string
31 …resses": [ "0x1D","0x1F", "0x20", "0x22" ,"0x2F", "0x36", "0x37", "0x40", "0x41", "0x42", "0x43", … string
35 "addresses": [ "0x10","0x1F", "0x3C", "0x50" ,"0x72" ] string
39 "addresses": [ "0x70" ] string
43 "addresses": [ "0x70" ] string
47 "addresses": [ "0x70" ] string
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_1_0_sh_mask.h27 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS__SHIFT 0x0
28 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_EN__SHIFT 0x1
29 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON__SHIFT 0x2
30 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_DIV2_CLOCK_ON__SHIFT 0x3
31 …_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS_MASK 0x00000001L
32 …_TX_CLOCK_CNTL__DPCS_SYMCLK_EN_MASK 0x00000002L
33 …_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON_MASK 0x00000004L
34 …_TX_CLOCK_CNTL__DPCS_SYMCLK_DIV2_CLOCK_ON_MASK 0x00000008L
36 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_REQ__SHIFT 0xc
37 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_PENDING__SHIFT 0xd
[all …]

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