Searched +full:0 +full:x18300000 (Results 1 – 5 of 5) sorted by relevance
12 * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF14 * - BOOT ROM stack is at 0x0091FFB816 * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to17 * fit between 0x00907000 and 0x00918000.20 * and some padding thus 'our' max size is really 0x00908000 - 0x0091800023 #define CONFIG_SPL_TEXT_BASE 0x0090800024 #define CONFIG_SPL_MAX_SIZE 0x1000025 #define CONFIG_SPL_STACK 0x0091FFB831 #define CONFIG_SPL_PAD_TO 0x1100041 #define CONFIG_SPL_SATA_BOOT_DEVICE 0[all …]
59 minimum: 082 reg = <0x18300000 0x100000>;83 interrupts = <0 170 0>;96 qcom,ee = <0>;
34 reg = <0x60000000 0x10000000>;67 reg = <0x18300000 0x1000>;71 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;87 #sound-dai-cells = <0>;88 reg = <0x12>;93 reg = <0x41>;98 reg = <0x43>;103 reg = <0x51>;108 pinctrl-0 = <&mmc_pins>;126 pinctrl-0 = <&scif_clk_pins>;[all …]
17 #define AR5312_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */18 #define AR5312_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */19 #define AR5312_IRQ_ENET1 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */20 #define AR5312_IRQ_WLAN1 (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */21 #define AR5312_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */26 #define AR5312_MISC_IRQ_TIMER 041 * actually use 1 of them (i.e. Only MAC 0 is actually connected to an enet44 #define AR5312_WLAN0_BASE 0x1800000045 #define AR5312_ENET0_BASE 0x1810000046 #define AR5312_ENET1_BASE 0x18200000[all …]
23 #size-cells = <0>;25 cpu0: cpu@0 {29 reg = <0>;54 polling-delay-passive = <0>;55 polling-delay = <0>;56 thermal-sensors = <&tsens 0>;74 polling-delay-passive = <0>;75 polling-delay = <0>;94 polling-delay-passive = <0>;95 polling-delay = <0>;[all …]