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/openbmc/linux/fs/ntfs/
H A Dunistr.c26 static const u8 legal_ansi_char_array[0x40] = {
27 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
28 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
30 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
31 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
33 0x17, 0x07, 0x18, 0x17, 0x17, 0x17, 0x17, 0x17,
34 0x17, 0x17, 0x18, 0x16, 0x16, 0x17, 0x07, 0x00,
36 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
37 0x17, 0x17, 0x04, 0x16, 0x18, 0x16, 0x18, 0x18,
51 * identical, or 'false' (0) if they are not identical. If @ic is IGNORE_CASE,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,pmic-typec.yaml95 #size-cells = <0>;
99 reg = <0x1500>,
100 <0x1700>;
102 interrupts = <0x2 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
103 <0x2 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
104 <0x2 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
105 <0x2 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
106 <0x2 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
107 <0x2 0x15 0x05 IRQ_TYPE_EDGE_RISING>,
108 <0x2 0x15 0x06 IRQ_TYPE_EDGE_BOTH>,
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-jerry.dts25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
/openbmc/linux/drivers/net/ieee802154/
H A Dat86rf230.h15 #define RG_TRX_STATUS (0x01)
16 #define SR_TRX_STATUS 0x01, 0x1f, 0
17 #define SR_RESERVED_01_3 0x01, 0x20, 5
18 #define SR_CCA_STATUS 0x01, 0x40, 6
19 #define SR_CCA_DONE 0x01, 0x80, 7
20 #define RG_TRX_STATE (0x02)
21 #define SR_TRX_CMD 0x02, 0x1f, 0
22 #define SR_TRAC_STATUS 0x02, 0xe0, 5
23 #define RG_TRX_CTRL_0 (0x03)
24 #define SR_CLKM_CTRL 0x03, 0x07, 0
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/openbmc/linux/crypto/
H A Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
316 "\xD6\xB0\xE2\x62\x8F\x74\x26\xC2\x0C\xD3\x9A\x17\x47\xE6\x8E\xAB"
330 "\xA6\xFF\x46\x83\x97\xDE\xE9\xE2\x17\x03\x06\x14\xE2\xD7\xB1\x1D"
353 "\x73\x87\x95\x05\x07\xBE\x45\x07\x17\x7E\x4A\x69\x22\xF3\xDB\x05"
357 "\x3E\xDB\xA7\x9B\x82\xBB\x73\x81\xFC\xE8\x77\x4B\x15\xBE\x17\x73"
423 "\xD6\xB0\xE2\x62\x8F\x74\x26\xC2\x0C\xD3\x9A\x17\x47\xE6\x8E\xAB"
492 "\x24\x3A\xC9\xCF\x6D\x8D\x17\x50\x94\x52\xD3\xE7\x0F\x2F\x7E\x94"
533 "\x54\x14\x76\x8B\xB6\xBB\xFB\x88\x78\x31\x59\x28\xD2\xB1\x75\x17"
541 "\x40\x37\xBB\xC2\xCD\x7F\x71\x77\x17\xDF\x6A\x4C\x31\x24\x7F\xB9"
[all …]
/openbmc/qemu/target/ppc/translate/
H A Dfp-ops.c.inc2 GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type)
4 GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT),
5 GEN_HANDLER_E(fctiwu, 0x3F, 0x0E, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
6 GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT),
7 GEN_HANDLER_E(fctiwuz, 0x3F, 0x0F, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
8 GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT),
9 GEN_HANDLER_E(fcfid, 0x3F, 0x0E, 0x1A, 0x001F0000, PPC_NONE, PPC2_FP_CVT_S64),
10 GEN_HANDLER_E(fcfids, 0x3B, 0x0E, 0x1A, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
11 GEN_HANDLER_E(fcfidu, 0x3F, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
12 GEN_HANDLER_E(fcfidus, 0x3B, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
[all …]
/openbmc/linux/lib/crypto/
H A Dcurve25519-fiat32.c18 * entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77
41 h[0] = a0&((1<<26)-1); /* 26 used, 32-26 left. 26 */ in fe_frombytes_impl()
104 t = -!!t; /* all set if nonzero, 0 if 0 */ in cmovznz32()
110 { const u32 x17 = in1[9]; in fe_freeze() local
119 { const u32 x2 = in1[0]; in fe_freeze()
120 { u32 x20; u8/*bool*/ x21 = subborrow_u26(0x0, x2, 0x3ffffed, &x20); in fe_freeze()
121 { u32 x23; u8/*bool*/ x24 = subborrow_u25(x21, x4, 0x1ffffff, &x23); in fe_freeze()
122 { u32 x26; u8/*bool*/ x27 = subborrow_u26(x24, x6, 0x3ffffff, &x26); in fe_freeze()
123 { u32 x29; u8/*bool*/ x30 = subborrow_u25(x27, x8, 0x1ffffff, &x29); in fe_freeze()
124 { u32 x32; u8/*bool*/ x33 = subborrow_u26(x30, x10, 0x3ffffff, &x32); in fe_freeze()
[all …]
/openbmc/linux/drivers/gpu/drm/panel/
H A Dpanel-raydium-rm67191.c25 #define COL_FMT_16BPP 0x55
26 #define COL_FMT_18BPP 0x66
27 #define COL_FMT_24BPP 0x77
30 #define WRMAUCCTR 0xFE
43 {0xFE, 0x0B},
44 {0x28, 0x40},
45 {0x29, 0x4F},
46 {0xFE, 0x0E},
47 {0x4B, 0x00},
48 {0x4C, 0x0F},
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Ditd1000.c31 } while (0)
35 } while (0)
39 } while (0)
46 .addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1 in itd1000_write_regs()
56 buf[0] = reg; in itd1000_write_regs()
59 /* itd_dbg("wr %02x: %02x\n", reg, v[0]); */ in itd1000_write_regs()
65 return 0; in itd1000_write_regs()
72 { .addr = state->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 }, in itd1000_read_reg()
77 itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1); in itd1000_read_reg()
100 { 0, 0x8, 0x3 },
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/
H A D0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch4 Subject: [PATCH] FF-A v15: arm64: smccc: add support for SMCCCv1.2 x0-x17
7 add support for x0-x17 registers used by the SMC calls
9 In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
10 Results are returned in x0-x17.
61 + /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */
70 + ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
72 + \instr #0
77 + /* Store the registers x0 - x17 into the result structure */
86 + stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
135 return 0;
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Dclocks_omap3.h37 #define CLSEL1_EMU_VAL ((CORE_M3X2 << 16) | (PER_M6X2 << 24) | (0x0A50))
41 #define MPU_M_12_ES1 0x0FE
42 #define MPU_N_12_ES1 0x07
43 #define MPU_FSEL_12_ES1 0x05
44 #define MPU_M2_12_ES1 0x01
46 #define MPU_M_12_ES2 0x0FA
47 #define MPU_N_12_ES2 0x05
48 #define MPU_FSEL_12_ES2 0x07
49 #define MPU_M2_ES2 0x01
51 #define MPU_M_12 0x085
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/ivsrcid/
H A Divsrcid_vislands30.h30 #define VISLANDS30_IV_SRCID_D1_V_UPDATE_INT 7 // 0x07
31 #define VISLANDS30_IV_EXTID_D1_V_UPDATE_INT 0
33 #define VISLANDS30_IV_SRCID_D1_GRPH_PFLIP 8 // 0x08
34 #define VISLANDS30_IV_EXTID_D1_GRPH_PFLIP 0
36 #define VISLANDS30_IV_SRCID_D2_V_UPDATE_INT 9 // 0x09
37 #define VISLANDS30_IV_EXTID_D2_V_UPDATE_INT 0
39 #define VISLANDS30_IV_SRCID_D2_GRPH_PFLIP 10 // 0x0a
40 #define VISLANDS30_IV_EXTID_D2_GRPH_PFLIP 0
42 #define VISLANDS30_IV_SRCID_D3_V_UPDATE_INT 11 // 0x0b
43 #define VISLANDS30_IV_EXTID_D3_V_UPDATE_INT 0
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_sh_mask.h29 …NTL__READ_TIMEOUT__SHIFT 0x0
30 …TL__REPORT_LAST_RDERR__SHIFT 0x1f
31 …D_TIMEOUT_MASK 0x000000FFL
32 …ORT_LAST_RDERR_MASK 0x80000000L
34 …KEW_CNTL__SKEW_TOP_THRESHOLD__SHIFT 0x0
35 …KEW_CNTL__SKEW_COUNT__SHIFT 0x6
36 …__SKEW_TOP_THRESHOLD_MASK 0x0000003FL
37 …__SKEW_COUNT_MASK 0x00000FC0L
39 …TATUS2__ME0PIPE1_CMDFIFO_AVAIL__SHIFT 0x0
40 …TATUS2__ME0PIPE1_CF_RQ_PENDING__SHIFT 0x4
[all …]
H A Dgc_9_0_sh_mask.h25 …DC_CNT__DRAMRD_CMDMEM_SEC_COUNT__SHIFT 0x0
26 …DC_CNT__DRAMRD_CMDMEM_DED_COUNT__SHIFT 0x2
27 …DC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT 0x4
28 …DC_CNT__DRAMWR_CMDMEM_DED_COUNT__SHIFT 0x6
29 …DC_CNT__DRAMWR_DATAMEM_SEC_COUNT__SHIFT 0x8
30 …DC_CNT__DRAMWR_DATAMEM_DED_COUNT__SHIFT 0xa
31 …DC_CNT__RRET_TAGMEM_SEC_COUNT__SHIFT 0xc
32 …DC_CNT__RRET_TAGMEM_DED_COUNT__SHIFT 0xe
33 …C_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 0x10
34 …C_CNT__WRET_TAGMEM_DED_COUNT__SHIFT 0x12
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
H A Dgfx_8_1_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
H A Dgfx_7_2_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4fw_version.h38 #define T4FW_VERSION_MAJOR 0x01
39 #define T4FW_VERSION_MINOR 0x17
40 #define T4FW_VERSION_MICRO 0x03
41 #define T4FW_VERSION_BUILD 0x00
43 #define T4FW_MIN_VERSION_MAJOR 0x01
44 #define T4FW_MIN_VERSION_MINOR 0x04
45 #define T4FW_MIN_VERSION_MICRO 0x00
47 #define T5FW_VERSION_MAJOR 0x01
48 #define T5FW_VERSION_MINOR 0x17
49 #define T5FW_VERSION_MICRO 0x03
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtl818x/rtl8180/
H A Drtl8225se.c24 0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
25 0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
26 0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
27 0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
28 0x0183, 0x0163, 0x0143, 0x0123, 0x0103
32 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
33 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
34 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
35 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
36 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Dmeson-gxl.c18 * - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that
43 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_startup()
46 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_startup()
49 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0000); in meson_gxl_startup()
52 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x0400); in meson_gxl_startup()
57 ret = phy_write(phydev, MDIO_DEVAD_NONE, 0x14, 0x8D80); in meson_gxl_startup()
62 wol = phy_read(phydev, MDIO_DEVAD_NONE, 0x15); in meson_gxl_startup()
63 if (wol < 0) in meson_gxl_startup()
67 if (lpa < 0) in meson_gxl_startup()
71 if (exp < 0) in meson_gxl_startup()
[all …]
/openbmc/linux/arch/arm64/kernel/
H A Dentry-ftrace.S26 * live (x18 holds the Shadow Call Stack pointer), and x9-x17 are safe to
51 bic x11, x30, 0x7
59 ldr x17, [x11, #FTRACE_OPS_DIRECT_CALL] // op->direct_call
60 cbnz x17, ftrace_caller_direct
130 ldr x17, [sp, #FREGS_DIRECT_TRAMP]
131 cbnz x17, ftrace_caller_direct_late
146 * Head to a direct trampoline in x17 after having run other tracers.
163 * Head to a direct trampoline in x17.
165 * We use `BR X17` as this can safely land on a `BTI C` or `PACIASP` in
168 br x17
[all …]
H A Dsmccc-call.S12 \instr #0
54 /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */
63 ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
65 \instr #0
70 /* Store the registers x0 - x17 into the result structure */
79 stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
/openbmc/u-boot/arch/mips/include/asm/
H A Dcacheops.h18 __asm__ __volatile__("cache %0, 0(%1)" : : "i"(op), "r"(addr)); in mips_cache()
22 #define MIPS32_WHICH_ICACHE 0x0
23 #define MIPS32_FETCH_AND_LOCK 0x7
32 for (i = 0; i < lines; i++) { in icache_lock()
33 asm volatile (" cache %0, %1(%2)" in icache_lock()
46 #define INDEX_INVALIDATE_I 0x00
47 #define INDEX_WRITEBACK_INV_D 0x01
48 #define INDEX_LOAD_TAG_I 0x04
49 #define INDEX_LOAD_TAG_D 0x05
50 #define INDEX_STORE_TAG_I 0x08
[all …]
/openbmc/linux/drivers/scsi/
H A Datp870u.c133 for (c = 0; c < 2; c++) { in atp870u_intr_handle()
134 j = atp_readb_io(dev, c, 0x1f); in atp870u_intr_handle()
135 if ((j & 0x80) != 0) in atp870u_intr_handle()
137 dev->in_int[c] = 0; in atp870u_intr_handle()
139 if ((j & 0x80) == 0) in atp870u_intr_handle()
145 cmdp = atp_readb_io(dev, c, 0x10); in atp870u_intr_handle()
146 if (dev->working[c] != 0) { in atp870u_intr_handle()
148 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0) in atp870u_intr_handle()
149 atp_writeb_io(dev, c, 0x16, in atp870u_intr_handle()
150 (atp_readb_io(dev, c, 0x16) | 0x80)); in atp870u_intr_handle()
[all …]

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