Searched +full:0 +full:x12810000 (Results 1 – 5 of 5) sorted by relevance
51 reg = <0x12810000 0x1000>;52 interrupts = <0 83 0>;
68 reg = <0x03810000 0x0c>;79 reg = <0x03830000 0x100>;88 samsung,idma-addr = <0x03000000>;95 reg = <0x10000000 0x100>;100 reg = <0x10500000 0x2000>;105 reg = <0x12570000 0x14>;110 reg = <0x10023c40 0x20>;111 #power-domain-cells = <0>;117 reg = <0x10023c60 0x20>;118 #power-domain-cells = <0>;[all …]
153 cluster_a15_opp_table: opp-table-0 {270 reg = <0x10d20000 0x1000>;271 ranges = <0x0 0x10d20000 0x6000>;276 reg = <0x4000 0x1000>;281 reg = <0x5000 0x1000>;287 reg = <0x10010000 0x30000>;293 reg = <0x03810000 0x0c>;303 reg = <0x11000000 0x10000>;316 #size-cells = <0>;317 reg = <0x12200000 0x2000>;[all …]
39 #size-cells = <0>;88 /* Cluster 0 */89 cpucl0_0: cpu@0 {92 reg = <0x0 0x000>;96 i-cache-size = <0xc000>;99 d-cache-size = <0x8000>;108 reg = <0x0 0x001>;112 i-cache-size = <0xc000>;115 d-cache-size = <0x8000>;124 reg = <0x0 0x002>;[all …]
23 /* Register Offset definitions for CMU_CMU (0x11c10000) */24 #define PLL_LOCKTIME_PLL_SHARED0 0x025 #define PLL_LOCKTIME_PLL_SHARED1 0x426 #define PLL_LOCKTIME_PLL_SHARED2 0x827 #define PLL_LOCKTIME_PLL_SHARED3 0xc28 #define PLL_CON0_PLL_SHARED0 0x10029 #define PLL_CON0_PLL_SHARED1 0x12030 #define PLL_CON0_PLL_SHARED2 0x14031 #define PLL_CON0_PLL_SHARED3 0x16032 #define MUX_CMU_CIS0_CLKMUX 0x1000[all …]