Searched +full:0 +full:x12680000 (Results 1 – 4 of 4) sorted by relevance
88 reg = <0x12680000 0x1000>;
199 #size-cells = <0>;212 cpu0: cpu@0 {215 reg = <0>;259 xusbxti: clock-0 {261 clock-frequency = <0>;262 #clock-cells = <0>;268 clock-frequency = <0>;269 #clock-cells = <0>;275 clock-frequency = <0>;276 #clock-cells = <0>;[all …]
68 reg = <0x03810000 0x0c>;79 reg = <0x03830000 0x100>;88 samsung,idma-addr = <0x03000000>;95 reg = <0x10000000 0x100>;100 reg = <0x10500000 0x2000>;105 reg = <0x12570000 0x14>;110 reg = <0x10023c40 0x20>;111 #power-domain-cells = <0>;117 reg = <0x10023c60 0x20>;118 #power-domain-cells = <0>;[all …]
41 #define EXYNOS4210_CHIPID_ADDR 0x1000000044 #define EXYNOS4210_PWM_BASE_ADDR 0x139D000047 #define EXYNOS4210_RTC_BASE_ADDR 0x1007000050 #define EXYNOS4210_MCT_BASE_ADDR 0x1005000053 #define EXYNOS4210_I2C_SHIFT 0x0001000054 #define EXYNOS4210_I2C_BASE_ADDR 0x1386000060 #define EXYNOS4210_UART0_BASE_ADDR 0x1380000061 #define EXYNOS4210_UART1_BASE_ADDR 0x1381000062 #define EXYNOS4210_UART2_BASE_ADDR 0x1382000063 #define EXYNOS4210_UART3_BASE_ADDR 0x13830000[all …]