Searched +full:0 +full:x11d20000 (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt8183-pinctrl.yaml | 126 When E1=0/E0=0, the strength is 0.125mA. 127 When E1=0/E0=1, the strength is 0.25mA. 128 When E1=1/E0=0, the strength is 0.5mA. 132 0: (E1, E0, EN) = (0, 0, 0) 133 1: (E1, E0, EN) = (0, 0, 1) 134 2: (E1, E0, EN) = (0, 1, 0) 135 3: (E1, E0, EN) = (0, 1, 1) 136 4: (E1, E0, EN) = (1, 0, 0) 137 5: (E1, E0, EN) = (1, 0, 1) 138 6: (E1, E0, EN) = (1, 1, 0) [all …]
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H A D | mediatek,mt7981-pinctrl.yaml | 85 "wa_aice1" "wa_aice" 0, 1 86 "wa_aice2" "wa_aice" 0, 1 87 "wm_uart_0" "uart" 0, 1 88 "dfd" "dfd" 0, 1, 4, 5 388 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 396 enum: [0, 1, 2, 3] 400 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' [all …]
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/openbmc/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos850.dtsi | 52 #clock-cells = <0>; 57 #size-cells = <0>; 91 cpu0: cpu@0 { 94 reg = <0x0>; 100 reg = <0x1>; 106 reg = <0x2>; 112 reg = <0x3>; 118 reg = <0x100>; 124 reg = <0x101>; 130 reg = <0x102>; [all …]
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/openbmc/linux/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt8183.c | 13 * iocfg[0]:0x10005000, iocfg[1]:0x11F20000, iocfg[2]:0x11E80000, 14 * iocfg[3]:0x11E70000, iocfg[4]:0x11E90000, iocfg[5]:0x11D30000, 15 * iocfg[6]:0x11D20000, iocfg[7]:0x11C50000, iocfg[8]:0x11F30000. 21 _x_bits, 32, 0) 28 PIN_FIELD(0, 192, 0x300, 0x10, 0, 4), 32 PIN_FIELD(0, 192, 0x0, 0x10, 0, 1), 36 PIN_FIELD(0, 192, 0x200, 0x10, 0, 1), 40 PIN_FIELD(0, 192, 0x100, 0x10, 0, 1), 44 PINS_FIELD_BASE(0, 3, 6, 0x000, 0x10, 3, 1), 45 PINS_FIELD_BASE(4, 7, 6, 0x000, 0x10, 5, 1), [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8192.dtsi | 34 #clock-cells = <0>; 43 #clock-cells = <0>; 50 #clock-cells = <0>; 57 #size-cells = <0>; 59 cpu0: cpu@0 { 62 reg = <0x000>; 73 performance-domains = <&performance 0>; 80 reg = <0x100>; 91 performance-domains = <&performance 0>; 98 reg = <0x200>; [all …]
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H A D | mt8183.dtsi | 293 #size-cells = <0>; 327 cpu0: cpu@0 { 330 reg = <0x000>; 353 reg = <0x001>; 376 reg = <0x002>; 399 reg = <0x003>; 422 reg = <0x100>; 445 reg = <0x101>; 468 reg = <0x102>; 491 reg = <0x103>; [all …]
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