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/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7100.dtsi18 #size-cells = <0>;
20 U74_0: cpu@0 {
22 reg = <0>;
110 #clock-cells = <0>;
112 clock-frequency = <0>;
117 #clock-cells = <0>;
119 clock-frequency = <0>;
124 #clock-cells = <0>;
126 clock-frequency = <0>;
131 #clock-cells = <0>;
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml12 Out of the SoC's many pins only the ones named PAD_GPIO[0] to PAD_GPIO[63]
13 and PAD_FUNC_SHARE[0] to PAD_FUNC_SHARE[141] can be multiplexed and have
18 Signal group 0, 1, ... or 6
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
27 | -------|-- GPIO1 --------| |--- PAD_FUNC_SHARE[0]
44 Note that signal group 0 doesn't map any of the GPIOs to pins, and only
45 signal group 1 maps the GPIOs to the pins named PAD_GPIO[0] to PAD_GPIO[63].
89 enum: [0, 1, 2, 3, 4, 5, 6]
103 '-[0-9]+$':
176 reg = <0x0 0x11910000 0x0 0x10000>,
[all …]