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12

/openbmc/u-boot/board/altera/cyclone5-socdk/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x08020000,
23 0x08000000,
24 0x00018020,
[all …]
/openbmc/u-boot/board/terasic/de10-nano/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
/openbmc/u-boot/board/terasic/de0-nano-soc/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
/openbmc/u-boot/board/samtec/vining_fpga/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
/openbmc/u-boot/board/devboards/dbm-soc1/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
/openbmc/u-boot/board/terasic/sockit/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
/openbmc/u-boot/board/is1/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
/openbmc/u-boot/board/ebv/socrates/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
/openbmc/u-boot/board/sr1500/qts/
H A Diocsr_config.h15 0x00100000,
16 0x40000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x000E0180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
/openbmc/u-boot/board/terasic/de1-soc/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
/openbmc/u-boot/board/altera/arria5-socdk/qts/
H A Diocsr_config.h15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000000,
19 0x00000000,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000060,
24 0x00018060,
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dsec_boot.S14 ldr r2, =0x02073000 @ r2: target address
28 * This workaround code is relocated to the address 0x02073000
30 * (Base Address - 0x02020000, Limit Address - 0x020740000).
43 * Resume address - 0x2073008
44 * Resume flag - 0x207300C
47 * Switch address - 0x2073018
50 * Hotplug address - 0x207301C
53 * C2 address - 0x2073024
56 * CPU0 state - 0x2073028
57 * CPU1 state - 0x207302C
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dcpu.h10 #define DEVICE_NOT_AVAILABLE 0
13 #define EXYNOS4_ADDR_BASE 0x10000000
16 #define EXYNOS4_I2C_SPACING 0x10000
18 #define EXYNOS4_GPIO_PART3_BASE 0x03860000
19 #define EXYNOS4_PRO_ID 0x10000000
20 #define EXYNOS4_SYSREG_BASE 0x10010000
21 #define EXYNOS4_POWER_BASE 0x10020000
22 #define EXYNOS4_SWRESET 0x10020400
23 #define EXYNOS4_CLOCK_BASE 0x10030000
24 #define EXYNOS4_SYSTIMER_BASE 0x10050000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-sifive.yaml62 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]
77 reg = <0x10040000 0x1000>, <0x20000000 0x10000000>;
82 #size-cells = <0>;
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157a-microgea-stm32mp1.dtsi13 reg = <0xc0000000 0x10000000>;
23 reg = <0x10000000 0x40000>;
29 reg = <0x10040000 0x1000>;
35 reg = <0x10041000 0x1000>;
41 reg = <0x10042000 0x4000>;
47 reg = <0x30000000 0x40000>;
53 reg = <0x38000000 0x10000>;
100 pinctrl-0 = <&fmc_pins_a>;
104 nand-controller@4,0 {
107 nand@0 {
[all …]
H A Dstm32mp157a-icore-stm32mp1.dtsi13 reg = <0xc0000000 0x20000000>;
23 reg = <0x10000000 0x40000>;
29 reg = <0x10040000 0x1000>;
35 reg = <0x10041000 0x1000>;
41 reg = <0x10042000 0x4000>;
47 reg = <0x30000000 0x40000>;
53 reg = <0x38000000 0x10000>;
159 pinctrl-0 = <&i2c2_pins_a>;
176 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
H A Dstm32mp15xx-osd32.dtsi19 reg = <0x10000000 0x40000>;
25 reg = <0x10040000 0x1000>;
31 reg = <0x10041000 0x1000>;
37 reg = <0x10042000 0x4000>;
43 reg = <0x30000000 0x40000>;
49 reg = <0x38000000 0x10000>;
57 pinctrl-0 = <&i2c4_pins_a>;
66 reg = <0x33>;
67 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
84 regulator-initial-mode = <0>;
[all …]
H A Dstm32mp15xx-dhcor-som.dtsi20 reg = <0xc0000000 0x40000000>;
30 reg = <0x10000000 0x40000>;
36 reg = <0x10040000 0x1000>;
42 reg = <0x10041000 0x1000>;
48 reg = <0x10042000 0x4000>;
54 reg = <0x30000000 0x40000>;
60 reg = <0x38000000 0x10000>;
76 pinctrl-0 = <&i2c4_pins_a>;
85 reg = <0x33>;
86 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Dmx2x.h16 #define MX2x_AIPI_BASE_ADDR 0x10000000
18 #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000)
19 #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000)
20 #define MX2x_GPT1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x03000)
21 #define MX2x_GPT2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x04000)
22 #define MX2x_GPT3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x05000)
23 #define MX2x_PWM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x06000)
24 #define MX2x_RTC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x07000)
25 #define MX2x_KPP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x08000)
26 #define MX2x_OWIRE_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x09000)
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Darm-realview-eb.dts31 arm,hbi = <0x140>;
56 reg = <0x10041000 0x1000>,
57 <0x10040000 0x100>;
69 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
74 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
79 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
84 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
85 <0 18 IRQ_TYPE_LEVEL_HIGH>;
90 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
95 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
[all …]
H A Darm-realview-eb-mp.dtsi46 reg = <0x1f001000 0x1000>,
47 <0x1f000100 0x100>;
56 reg = <0x10041000 0x1000>,
57 <0x10040000 0x100>;
59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
64 reg = <0x1f002000 0x1000>;
66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,
67 <0 30 IRQ_TYPE_LEVEL_HIGH>,
68 <0 31 IRQ_TYPE_LEVEL_HIGH>;
88 reg = <0x1f000000 0x100>;
[all …]
/openbmc/qemu/hw/cpu/
H A Drealview_mpcore.c41 -1, 14, 15, 0, 7, 8, -1, -1,
50 for (i = 0; i < 4; i++) { in mpcore_rirq_set_irq()
55 if (irq >= 0) { in mpcore_rirq_set_irq()
76 for (i = 0; i < 32; i++) { in realview_mpcore_realize()
80 for (n = 0; n < 4; n++) { in realview_mpcore_realize()
86 sysbus_mmio_map(gicbusdev, 0, 0x10040000 + n * 0x10000); in realview_mpcore_realize()
87 sysbus_connect_irq(gicbusdev, 0, s->cpuic[10 + n]); in realview_mpcore_realize()
88 for (i = 0; i < 64; i++) { in realview_mpcore_realize()
104 sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0)); in mpcore_rirq_init()
106 for (i = 0; i < 4; i++) { in mpcore_rirq_init()
/openbmc/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dexynos-pmu.yaml75 pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$'
183 reg = <0x10040000 0x5000>;
193 #phy-cells = <0>;
/openbmc/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/openbmc/qemu/hw/arm/
H A Drealview.c35 #define SMP_BOOT_ADDR 0xe0000000
36 #define SMP_BOOTREG_ADDR 0x10000030
54 0x33b,
55 0x33b,
56 0x769,
57 0x76d
68 qdev_connect_gpio_out(splitter, 0, out1); in split_irq_from_named()
70 qdev_connect_gpio_out_named(src, outname, 0, in split_irq_from_named()
71 qdev_get_gpio_in(splitter, 0)); in split_irq_from_named()
93 int is_mpcore = 0; in realview_init()
[all …]

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