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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,videocc.yaml130 reg = <0x0ab00000 0x10000>;
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sm6115-pas.yaml124 reg = <0x0ab00000 0x100>;
132 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
144 qcom,smem-states = <&adsp_smp2p_out 0>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dqcm2290.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
45 clocks = <&cpufreq_hw 0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
63 reg = <0x0 0x1>;
64 clocks = <&cpufreq_hw 0>;
69 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsc7180.dtsi63 #clock-cells = <0>;
69 #clock-cells = <0>;
75 #size-cells = <0>;
77 cpu0: cpu@0 {
80 reg = <0x0 0x0>;
81 clocks = <&cpufreq_hw 0>;
92 qcom,freq-domain = <&cpufreq_hw 0>;
109 reg = <0x0 0x100>;
110 clocks = <&cpufreq_hw 0>;
121 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsdm845.dtsi77 #clock-cells = <0>;
84 #clock-cells = <0>;
91 #size-cells = <0>;
93 CPU0: cpu@0 {
96 reg = <0x0 0x0>;
97 clocks = <&cpufreq_hw 0>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
125 reg = <0x0 0x100>;
126 clocks = <&cpufreq_hw 0>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]