/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | rv770_smc.c | 34 #define FIRST_SMC_INT_VECT_REG 0xFFD8 35 #define FIRST_INT_VECT_S19 0xFFC0 38 0x08, 0x10, 0x08, 0x10, 39 0x08, 0x10, 0x08, 0x10, 40 0x08, 0x10, 0x08, 0x10, 41 0x08, 0x10, 0x08, 0x10, 42 0x08, 0x10, 0x08, 0x10, 43 0x08, 0x10, 0x08, 0x10, 44 0x08, 0x10, 0x08, 0x10, 45 0x08, 0x10, 0x08, 0x10, [all …]
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/openbmc/phosphor-host-ipmid/scripts/ |
H A D | inventory-sensor-example.yaml | 2 sensorID: 0xa6 3 sensorType: 0x0C 4 eventReadingType: 0x6F 5 offset: 0x04 7 sensorID: 0xa8 8 sensorType: 0x0C 9 eventReadingType: 0x6F 10 offset: 0x04 12 sensorID: 0xba 13 sensorType: 0x0C [all …]
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/openbmc/openbmc/meta-phosphor/recipes-phosphor/ipmi/phosphor-ipmi-inventory-sel/ |
H A D | config.yaml | 2 sensorID: 0xa6 3 sensorType: 0x0C 4 eventReadingType: 0x6F 5 offset: 0x04 7 sensorID: 0xa8 8 sensorType: 0x0C 9 eventReadingType: 0x6F 10 offset: 0x04 12 sensorID: 0xba 13 sensorType: 0x0C [all …]
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/openbmc/openpower-host-ipmi-oem/scripts/ |
H A D | inventory-sensor-example.yaml | 2 sensorID: 0xa6 3 sensorType: 0x0C 4 eventReadingType: 0x6F 5 offset: 0x04 7 sensorID: 0xa8 8 sensorType: 0x0C 9 eventReadingType: 0x6F 10 offset: 0x04 12 sensorID: 0xba 13 sensorType: 0x0C [all …]
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/openbmc/linux/drivers/net/wireless/broadcom/b43/ |
H A D | radio_2059.c | 17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 }, 18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 }, 19 { 0x188, 0x05 }, 61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 63 0x00, 0x00, 0x00, 0xd0, 0x00), 64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443), 68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 70 0x00, 0x00, 0x00, 0xd0, 0x00), [all …]
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/openbmc/linux/drivers/hid/amd-sfh-hid/hid_descriptor/ |
H A D | amd_sfh_hid_report_desc.h | 15 0x05, 0x20, /* Usage page */ 16 0x09, 0x73, /* Motion type Accel 3D */ 17 0xA1, 0x00, /* HID Collection (Physical) */ 20 0x85, 1, /* HID Report ID */ 21 0x05, 0x20, /* HID usage page sensor */ 22 0x0A, 0x09, 0x03, /* Sensor property and sensor connection type */ 23 0x15, 0, /* HID logical MIN_8(0) */ 24 0x25, 2, /* HID logical MAX_8(2) */ 25 0x75, 8, /* HID report size(8) */ 26 0x95, 1, /* HID report count(1) */ [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-jerry.dts | 25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; 45 #size-cells = <0>; 52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01 53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f 56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c [all …]
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/openbmc/linux/fs/unicode/ |
H A D | utf8data.c_shipped | 8 0, 9 0x10100, 10 0x20000, 11 0x20100, 12 0x30000, 13 0x30100, 14 0x30200, 15 0x40000, 16 0x40100, 17 0x50000, [all …]
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/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_common/ |
H A D | isp_global.h | 40 #define ISP_SC_REG 0x00 41 #define ISP_PC_REG 0x07 42 #define ISP_IRQ_READY_REG 0x00 43 #define ISP_IRQ_CLEAR_REG 0x00 46 #define ISP_RST_BIT 0x00 47 #define ISP_START_BIT 0x01 48 #define ISP_BREAK_BIT 0x02 49 #define ISP_RUN_BIT 0x03 50 #define ISP_BROKEN_BIT 0x04 51 #define ISP_IDLE_BIT 0x05 /* READY */ [all …]
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/openbmc/linux/drivers/scsi/aic7xxx/ |
H A D | aic7xxx_reg_print.c_shipped | 12 { "SCSIRSTO", 0x01, 0x01 }, 13 { "ENAUTOATNP", 0x02, 0x02 }, 14 { "ENAUTOATNI", 0x04, 0x04 }, 15 { "ENAUTOATNO", 0x08, 0x08 }, 16 { "ENRSELI", 0x10, 0x10 }, 17 { "ENSELI", 0x20, 0x20 }, 18 { "ENSELO", 0x40, 0x40 }, 19 { "TEMODE", 0x80, 0x80 } 26 0x00, regvalue, cur_col, wrap)); 30 { "CLRCHN", 0x02, 0x02 }, [all …]
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H A D | aic79xx_reg_print.c_shipped | 12 { "SPLTINT", 0x01, 0x01 }, 13 { "CMDCMPLT", 0x02, 0x02 }, 14 { "SEQINT", 0x04, 0x04 }, 15 { "SCSIINT", 0x08, 0x08 }, 16 { "PCIINT", 0x10, 0x10 }, 17 { "SWTMINT", 0x20, 0x20 }, 18 { "BRKADRINT", 0x40, 0x40 }, 19 { "HWERRINT", 0x80, 0x80 }, 20 { "INT_PEND", 0xff, 0xff } 27 0x01, regvalue, cur_col, wrap)); [all …]
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H A D | aic7xxx_reg.h_shipped | 19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap) 26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap) 33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap) 40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap) 47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap) 54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap) 61 ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap) 68 ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap) 75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap) 82 ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap) [all …]
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H A D | aic79xx_reg.h_shipped | 19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap) 26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap) 33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap) 40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap) 47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap) 54 ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap) 61 ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap) 68 ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap) 75 ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap) 82 ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap) [all …]
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H A D | aic7xxx_seq.h_shipped | 9 0xb2, 0x00, 0x00, 0x08, 10 0xf7, 0x11, 0x22, 0x08, 11 0x00, 0x65, 0xee, 0x59, 12 0xf7, 0x01, 0x02, 0x08, 13 0xff, 0x6a, 0x24, 0x08, 14 0x40, 0x00, 0x40, 0x68, 15 0x08, 0x1f, 0x3e, 0x10, 16 0x40, 0x00, 0x40, 0x68, 17 0xff, 0x40, 0x3c, 0x60, 18 0x08, 0x1f, 0x3e, 0x10, [all …]
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H A D | aic7xxx.reg | 69 address 0x000 71 field TEMODE 0x80 72 field ENSELO 0x40 73 field ENSELI 0x20 74 field ENRSELI 0x10 75 field ENAUTOATNO 0x08 76 field ENAUTOATNI 0x04 77 field ENAUTOATNP 0x02 78 field SCSIRSTO 0x01 82 * SCSI Transfer Control 0 Register (pp. 3-13). [all …]
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-cpu-opp.dtsi | 10 opp-supported-hw = <0x1F 0x31FE>; 16 opp-supported-hw = <0x1F 0x0C01>; 22 opp-supported-hw = <0x1F 0x0200>; 28 opp-supported-hw = <0x1F 0x31FE>; 34 opp-supported-hw = <0x1F 0x0C01>; 40 opp-supported-hw = <0x1F 0x0200>; 46 opp-supported-hw = <0x1F 0x31FE>; 53 opp-supported-hw = <0x1F 0x0C01>; 60 opp-supported-hw = <0x1F 0x0200>; 67 opp-supported-hw = <0x1F 0x0C00>; [all …]
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/openbmc/qemu/target/ppc/translate/ |
H A D | spe-ops.c.inc | 1 GEN_HANDLER2(evsel0, "evsel", 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE), 2 GEN_HANDLER2(evsel1, "evsel", 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE), 3 GEN_HANDLER2(evsel2, "evsel", 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE), 4 GEN_HANDLER2(evsel3, "evsel", 0x04, 0x1f, 0x09, 0x00000000, PPC_SPE), 7 GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE) 8 GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE), 9 GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE), 10 GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE), 11 GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, 0xFFFFFFFF, PPC_SPE), 12 GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, 0x0000F800, PPC_SPE), [all …]
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H A D | fp-ops.c.inc | 2 GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) 4 GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT), 5 GEN_HANDLER_E(fctiwu, 0x3F, 0x0E, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206), 6 GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT), 7 GEN_HANDLER_E(fctiwuz, 0x3F, 0x0F, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206), 8 GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT), 9 GEN_HANDLER_E(fcfid, 0x3F, 0x0E, 0x1A, 0x001F0000, PPC_NONE, PPC2_FP_CVT_S64), 10 GEN_HANDLER_E(fcfids, 0x3B, 0x0E, 0x1A, 0, PPC_NONE, PPC2_FP_CVT_ISA206), 11 GEN_HANDLER_E(fcfidu, 0x3F, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206), 12 GEN_HANDLER_E(fcfidus, 0x3B, 0x0E, 0x1E, 0, PPC_NONE, PPC2_FP_CVT_ISA206), [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | am335x-boneblack.dts | 35 pinctrl-0 = <&emmc_pins>; 43 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ 44 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 45 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 46 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 47 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 48 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 49 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 50 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 51 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ [all …]
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/openbmc/linux/arch/sparc/crypto/ |
H A D | aes_asm.S | 8 AES_EROUND01(KEY_BASE + 0, I0, I1, T0) \ 14 AES_EROUND01(KEY_BASE + 0, I0, I1, T0) \ 16 AES_EROUND01(KEY_BASE + 0, I2, I3, T2) \ 24 AES_EROUND01(KEY_BASE + 0, I0, I1, T0) \ 30 AES_EROUND01(KEY_BASE + 0, I0, I1, T0) \ 32 AES_EROUND01(KEY_BASE + 0, I2, I3, T2) \ 41 ENCRYPT_TWO_ROUNDS(KEY_BASE + 0, I0, I1, T0, T1) \ 48 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ 56 ENCRYPT_TWO_ROUNDS(KEY_BASE + 0, I0, I1, T0, T1) \ 64 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \ [all …]
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/openbmc/linux/sound/soc/codecs/ |
H A D | cs4234.h | 12 #define CS4234_DEVID_AB 0x01 13 #define CS4234_DEVID_CD 0x02 14 #define CS4234_DEVID_EF 0x03 15 #define CS4234_REVID 0x05 17 #define CS4234_CLOCK_SP 0x06 18 #define CS4234_BASE_RATE_MASK 0xC0 20 #define CS4234_SPEED_MODE_MASK 0x30 22 #define CS4234_MCLK_RATE_MASK 0x0E 25 #define CS4234_SAMPLE_WIDTH 0x07 26 #define CS4234_SDOUTX_SW_MASK 0xC0 [all …]
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/openbmc/linux/drivers/isdn/hardware/mISDN/ |
H A D | hfc_multi.h | 6 #define DEBUG_HFCMULTI_FIFO 0x00010000 7 #define DEBUG_HFCMULTI_CRC 0x00020000 8 #define DEBUG_HFCMULTI_INIT 0x00040000 9 #define DEBUG_HFCMULTI_PLXSD 0x00080000 10 #define DEBUG_HFCMULTI_MODE 0x00100000 11 #define DEBUG_HFCMULTI_MSG 0x00200000 12 #define DEBUG_HFCMULTI_STATE 0x00400000 13 #define DEBUG_HFCMULTI_FILL 0x00800000 14 #define DEBUG_HFCMULTI_SYNC 0x01000000 15 #define DEBUG_HFCMULTI_DTMF 0x02000000 [all …]
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/openbmc/linux/include/linux/mfd/da9063/ |
H A D | registers.h | 18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ 19 /* Page 1 : SPI access 0x080 - 0x0FF */ 20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */ 21 /* Page 3 : SPI access 0x180 - 0x1FF */ 22 #define DA9063_REG_PAGE_CON 0x00 25 #define DA9063_REG_STATUS_A 0x01 26 #define DA9063_REG_STATUS_B 0x02 27 #define DA9063_REG_STATUS_C 0x03 28 #define DA9063_REG_STATUS_D 0x04 29 #define DA9063_REG_FAULT_LOG 0x05 [all …]
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/openbmc/linux/arch/sparc/lib/ |
H A D | NG4copy_page.S | 18 prefetch [%o1 + 0x000], #n_reads_strong 19 prefetch [%o1 + 0x040], #n_reads_strong 20 prefetch [%o1 + 0x080], #n_reads_strong 21 prefetch [%o1 + 0x0c0], #n_reads_strong 23 prefetch [%o1 + 0x100], #n_reads_strong 24 prefetch [%o1 + 0x140], #n_reads_strong 25 prefetch [%o1 + 0x180], #n_reads_strong 26 prefetch [%o1 + 0x1c0], #n_reads_strong 28 ldx [%o1 + 0x00], %o2 29 subcc %g7, 0x40, %g7 [all …]
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/openbmc/linux/arch/arm64/boot/dts/arm/ |
H A D | juno-motherboard.dtsi | 13 #clock-cells = <0>; 20 #clock-cells = <0>; 27 #clock-cells = <0>; 34 #clock-cells = <0>; 55 gpios = <&iofpga_gpio0 0 0x4>; 62 gpios = <&iofpga_gpio0 1 0x4>; 69 gpios = <&iofpga_gpio0 2 0x4>; 76 gpios = <&iofpga_gpio0 3 0x4>; 83 gpios = <&iofpga_gpio0 4 0x4>; 90 gpios = <&iofpga_gpio0 5 0x4>; [all …]
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