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/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-dpu.yaml63 reg = <0x05e01000 0x8f000>,
64 <0x05eb0000 0x2008>;
79 interrupts = <0>;
83 #size-cells = <0>;
85 port@0 {
86 reg = <0>;
H A Dqcom,qcm2290-dpu.yaml61 reg = <0x05e01000 0x8f000>,
62 <0x05eb0000 0x2008>;
76 interrupts = <0>;
80 #size-cells = <0>;
82 port@0 {
83 reg = <0>;
H A Dqcom,qcm2290-mdss.yaml45 "^display-controller@[0-9a-f]+$":
51 "^dsi@[0-9a-f]+$":
57 "^phy@[0-9a-f]+$":
81 reg = <0x05e00000 0x1000>;
96 iommus = <&apps_smmu 0x420 0x2>,
97 <&apps_smmu 0x421 0x0>;
102 reg = <0x05e01000 0x8f000>,
103 <0x05eb0000 0x2008>;
117 interrupts = <0>;
121 #size-cells = <0>;
[all …]
H A Dqcom,sm6115-mdss.yaml33 "^display-controller@[0-9a-f]+$":
39 "^dsi@[0-9a-f]+$":
51 "^phy@[0-9a-f]+$":
74 reg = <0x05e00000 0x1000>;
85 iommus = <&apps_smmu 0x420 0x2>,
86 <&apps_smmu 0x421 0x0>;
91 reg = <0x05e01000 0x8f000>,
92 <0x05eb0000 0x2008>;
107 interrupts = <0>;
111 #size-cells = <0>;
[all …]
H A Dqcom,sm6375-mdss.yaml44 "^display-controller@[0-9a-f]+$":
50 "^dsi@[0-9a-f]+$":
58 "^phy@[0-9a-f]+$":
76 reg = <0x05e00000 0x1000>;
90 iommus = <&apps_smmu 0x820 0x2>;
97 reg = <0x05e01000 0x8e030>,
98 <0x05eb0000 0x2008>;
123 interrupts = <0>;
127 #size-cells = <0>;
129 port@0 {
[all …]
H A Dqcom,sm6125-mdss.yaml44 "^display-controller@[0-9a-f]+$":
50 "^dsi@[0-9a-f]+$":
58 "^phy@[0-9a-f]+$":
76 reg = <0x05e00000 0x1000>;
92 iommus = <&apps_smmu 0x400 0x0>;
100 reg = <0x05e01000 0x83208>,
101 <0x05eb0000 0x2008>;
105 interrupts = <0>;
129 #size-cells = <0>;
131 port@0 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115.dtsi27 #clock-cells = <0>;
32 #clock-cells = <0>;
38 #size-cells = <0>;
40 CPU0: cpu@0 {
43 reg = <0x0 0x0>;
44 clocks = <&cpufreq_hw 0>;
49 qcom,freq-domain = <&cpufreq_hw 0>;
62 reg = <0x0 0x1>;
63 clocks = <&cpufreq_hw 0>;
68 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]