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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc8280xp-lpasscc.yaml47 reg = <0x032a9000 0x1000>;
56 reg = <0x033e0000 0x12000>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp.dtsi32 #clock-cells = <0>;
37 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
50 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x100>;
77 clocks = <&cpufreq_hw 0>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
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