/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3399-sdram-ddr3-1866.dtsi | 8 0x1 9 0xa 10 0x3 11 0x2 12 0x1 13 0x0 14 0xf 15 0xf 17 0x80181219 18 0x17050a03 [all …]
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H A D | rk3399-sdram-ddr3-1333.dtsi | 8 0x1 9 0xa 10 0x3 11 0x2 12 0x1 13 0x0 14 0xf 15 0xf 17 0x80120e12 18 0x11030802 [all …]
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H A D | rk3399-sdram-ddr3-1600.dtsi | 8 0x1 9 0xa 10 0x3 11 0x2 12 0x1 13 0x0 14 0xf 15 0xf 17 0x80151015 18 0x14040902 [all …]
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H A D | rk3399-sdram-lpddr3-4GB-1600.dtsi | 8 0x2 9 0xa 10 0x3 11 0x2 12 0x2 13 0x0 14 0xf 15 0xf 17 0x1d191519 18 0x14040808 [all …]
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H A D | rk3399-sdram-lpddr3-2GB-1600.dtsi | 9 0x1 10 0xa 11 0x3 12 0x2 13 0x2 14 0x0 15 0xf 16 0xf 18 0x1d191519 19 0x14040808 [all …]
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H A D | rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi | 8 0x2 9 0xa 10 0x3 11 0x2 12 0x2 13 0x0 14 0xf 15 0xf 18 0x801d181e 19 0x17050a08 [all …]
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/openbmc/u-boot/board/is1/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
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/openbmc/u-boot/board/terasic/de10-nano/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x18060000, 23 0x08000000, 24 0x00018020, [all …]
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/openbmc/u-boot/board/terasic/de0-nano-soc/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x18060000, 23 0x08000000, 24 0x00018020, [all …]
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | trinity_dpm.c | 45 0x0000802c, 0xc0000000, 0xffffffff, 46 0x00003fc4, 0xc0000000, 0xffffffff, 47 0x00005448, 0x00000100, 0xffffffff, 48 0x000055e4, 0x00000100, 0xffffffff, 49 0x0000160c, 0x00000100, 0xffffffff, 50 0x00008984, 0x06000100, 0xffffffff, 51 0x0000c164, 0x00000100, 0xffffffff, 52 0x00008a18, 0x00000100, 0xffffffff, 53 0x0000897c, 0x06000100, 0xffffffff, 54 0x00008b28, 0x00000100, 0xffffffff, [all …]
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/openbmc/u-boot/board/bitmain/antminer_s9/bitmain-antminer-s9/ |
H A D | ps7_init_gpl.c | 9 EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), 10 EMIT_MASKWRITE(0xf8000110, 0x003ffff0, 0x000fa220), 11 EMIT_MASKWRITE(0xf8000100, 0x0007f000, 0x00028000), 12 EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000010), 13 EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000001), 14 EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000000), 15 EMIT_MASKPOLL(0xf800010c, 0x00000001), 16 EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000000), 17 EMIT_MASKWRITE(0xf8000120, 0x1f003f30, 0x1f000200), 18 EMIT_MASKWRITE(0xf8000114, 0x003ffff0, 0x0012c220), [all …]
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/openbmc/u-boot/board/samtec/vining_fpga/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
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/openbmc/u-boot/board/terasic/sockit/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
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/openbmc/u-boot/board/sr1500/qts/ |
H A D | iocsr_config.h | 15 0x00100000, 16 0x40000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x000E0180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
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/openbmc/u-boot/board/terasic/de1-soc/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
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/openbmc/u-boot/board/devboards/dbm-soc1/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00004824, 22 0x01209000, 23 0x82400000, 24 0x00018004, [all …]
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/openbmc/u-boot/board/ebv/socrates/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00004824, 22 0x01209000, 23 0x82400000, 24 0x00018004, [all …]
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/openbmc/linux/drivers/gpu/drm/etnaviv/ |
H A D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng 8 git clone git://0x04.net/rules-ng-ng 43 #define PIPE_ID_PIPE_3D 0x00000000 44 #define PIPE_ID_PIPE_2D 0x00000001 45 #define SYNC_RECIPIENT_FE 0x00000001 46 #define SYNC_RECIPIENT_RA 0x00000005 47 #define SYNC_RECIPIENT_PE 0x00000007 48 #define SYNC_RECIPIENT_DE 0x0000000b 49 #define SYNC_RECIPIENT_BLT 0x00000010 50 #define ENDIAN_MODE_NO_SWAP 0x00000000 [all …]
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/openbmc/u-boot/board/altera/arria5-socdk/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x00000000, 18 0x00000000, 19 0x00000000, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000060, 24 0x00018060, [all …]
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/openbmc/u-boot/drivers/mmc/ |
H A D | arm_pl180_mmci.h | 22 #define INIT_PWR 0xBF /* Power on, full power, not open drain */ 26 #define SDI_PWR_PWRCTRL_MASK 0x00000003 27 #define SDI_PWR_PWRCTRL_ON 0x00000003 28 #define SDI_PWR_PWRCTRL_OFF 0x00000000 29 #define SDI_PWR_DAT2DIREN 0x00000004 30 #define SDI_PWR_CMDDIREN 0x00000008 31 #define SDI_PWR_DAT0DIREN 0x00000010 32 #define SDI_PWR_DAT31DIREN 0x00000020 33 #define SDI_PWR_OPD 0x00000040 34 #define SDI_PWR_FBCLKEN 0x00000080 [all …]
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/openbmc/u-boot/board/altera/cyclone5-socdk/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x08020000, 23 0x08000000, 24 0x00018020, [all …]
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/openbmc/linux/drivers/net/ethernet/renesas/ |
H A D | ravb.h | 38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */ 39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */ 41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */ 42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */ 43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002 44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006 45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */ 49 CCC = 0x0000, 50 DBAT = 0x0004, 51 DLR = 0x0008, [all …]
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/openbmc/u-boot/arch/m68k/include/asm/coldfire/ |
H A D | ssi.h | 23 u8 resv0[0x4]; 25 u8 resv1[0x8]; 34 #define SSI_CR_CIS (0x00000200) 35 #define SSI_CR_TCH (0x00000100) 36 #define SSI_CR_MCE (0x00000080) 37 #define SSI_CR_I2S_MASK (0xFFFFFF9F) 38 #define SSI_CR_I2S_SLAVE (0x00000040) 39 #define SSI_CR_I2S_MASTER (0x00000020) 40 #define SSI_CR_I2S_NORMAL (0x00000000) 41 #define SSI_CR_SYN (0x00000010) [all …]
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/openbmc/u-boot/drivers/ata/ |
H A D | dwc_ahsata_priv.h | 22 #define SATA_HOST_CAP_S64A 0x80000000 23 #define SATA_HOST_CAP_SNCQ 0x40000000 24 #define SATA_HOST_CAP_SSNTF 0x20000000 25 #define SATA_HOST_CAP_SMPS 0x10000000 26 #define SATA_HOST_CAP_SSS 0x08000000 27 #define SATA_HOST_CAP_SALP 0x04000000 28 #define SATA_HOST_CAP_SAL 0x02000000 29 #define SATA_HOST_CAP_SCLO 0x01000000 30 #define SATA_HOST_CAP_ISS_MASK 0x00f00000 32 #define SATA_HOST_CAP_SNZO 0x00080000 [all …]
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/openbmc/linux/arch/openrisc/include/asm/ |
H A D | spr_defs.h | 24 #define MAX_SPRS (0x10000) 27 #define SPRGROUP_SYS (0 << MAX_SPRS_PER_GRP_BITS) 41 #define SPR_VR (SPRGROUP_SYS + 0) 70 #define SPR_DMMUCR (SPRGROUP_DMMU + 0) 72 #define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) 73 #define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) 74 #define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) 75 #define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) 78 #define SPR_IMMUCR (SPRGROUP_IMMU + 0) 80 #define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) [all …]
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