| /openbmc/linux/drivers/net/ |
| H A D | mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * mdio.c: Generic support for MDIO-compatible transceivers
4 * Copyright 2006-2009 Solarflare Communications Inc.
11 #include <linux/mdio.h>
14 MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers");
15 MODULE_AUTHOR("Copyright 2006-2009 Solarflare Communications Inc.");
19 * mdio45_probe - probe for an MDIO (clause 45) device
20 * @mdio: MDIO interface
23 * This sets @prtad and @mmds in the MDIO interface if successful.
24 * Returns 0 on success, negative on error.
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | brcm,unimac-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom UniMAC MDIO bus controller
10 - Doug Berger <opendmb@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Rafał Miłecki <rafal@milecki.pl>
15 - $ref: mdio.yaml#
20 - brcm,genet-mdio-v1
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| H A D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - const: allwinner,sun8i-a83t-emac
17 - const: allwinner,sun8i-h3-emac
18 - const: allwinner,sun8i-r40-gmac
19 - const: allwinner,sun8i-v3s-emac
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| H A D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO
4 - compatible: One of:
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
13 - #address-cells: Must be <1>.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
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| H A D | mdio-mux-multiplexer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer consumer device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux-multiplexer
25 mux-controls:
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| H A D | qcom,ipq4019-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ40xx MDIO Controller
10 - Robert Marko <robert.marko@sartura.hr>
15 - enum:
16 - qcom,ipq4019-mdio
17 - qcom,ipq5018-mdio
19 - items:
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| H A D | fsl-enetc.txt | 9 - reg : Specifies PCIe Device Number and Function
12 - compatible : Should be "fsl,enetc".
14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
19 that in turn should contain the "ethernet-phy" node describing the
26 - phy-handle : Phandle to a PHY on the MDIO bus.
29 - phy-connection-type : Defined in ethernet.txt.
31 - mdio : "mdio" node, defined in mdio.txt.
33 - ethernet-phy : "ethernet-phy" node, defined in phy.txt.
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| H A D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller
4 - compatible: can be one of:
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
11 - #address-cells: Must be <1>.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
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| H A D | brcm,mdio-mux-iproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
10 - Florian Fainelli <f.fainelli@gmail.com>
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
15 C-45 Clause. When child bus is selected, one needs to select these two
16 properties as well to generate desired MDIO transaction on appropriate bus.
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| H A D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic GXL MDIO bus multiplexer
10 - Jerome Brunet <jbrunet@baylibre.com>
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
14 the internal mdio bus leading to the embedded 10/100 PHY or the external
15 MDIO bus on the Amlogic GXL SoC family.
18 - $ref: mdio-mux.yaml#
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| H A D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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| H A D | apm-xgene-mdio.txt | 1 APM X-Gene SoC MDIO node
3 MDIO node is defined to describe on-chip MDIO controller.
6 - compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi"
7 - #address-cells: Must be <1>.
8 - #size-cells: Must be <0>.
9 - reg: Address and length of the register set
10 - clocks: Reference to the clock entry
12 For the phys on the mdio bus, there must be a node with the following fields:
13 - compatible: PHY identifier. Please refer ./phy.txt for the format.
14 - reg: The ID number for the phy.
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| H A D | amlogic,g12a-mdio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
15 - Neil Armstrong <neil.armstrong@linaro.org>
18 - $ref: mdio-mux.yaml#
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| H A D | fsl-fman.txt | 5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
28 FMan block. The offset is 0xc4 from the beginning of the
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| H A D | brcm,bcm6368-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,bcm6368-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM6368 MDIO bus multiplexer
10 - Álvaro Fernández Rojas <noltari@gmail.com>
13 This MDIO bus multiplexer defines buses that could be internal as well as
15 properties as well to generate desired MDIO transaction on appropriate bus.
18 - $ref: mdio-mux.yaml#
22 const: brcm,bcm6368-mdio-mux
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| /openbmc/linux/drivers/net/mdio/ |
| H A D | mdio-mvusb.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #define USB_MARVELL_VID 0x1286
12 { USB_DEVICE(USB_MARVELL_VID, 0x1fa4) },
27 struct mii_bus *mdio; member
32 static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg) in mvusb_mdio_read() argument
34 struct mvusb_mdio *mvusb = mdio->priv; in mvusb_mdio_read()
37 mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0xa400 | (dev << 5) | reg); in mvusb_mdio_read()
39 err = usb_bulk_msg(mvusb->udev, usb_sndbulkpipe(mvusb->udev, 2), in mvusb_mdio_read()
40 mvusb->buf, 6, &alen, 100); in mvusb_mdio_read()
44 err = usb_bulk_msg(mvusb->udev, usb_rcvbulkpipe(mvusb->udev, 6), in mvusb_mdio_read()
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| H A D | of_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * OF helpers for the MDIO (Ethernet PHY) API
30 * ethernet-phy-idAAAA.BBBB */
36 int of_mdiobus_phy_device_register(struct mii_bus *mdio, struct phy_device *phy, in of_mdiobus_phy_device_register() argument
39 return fwnode_mdiobus_phy_device_register(mdio, phy, in of_mdiobus_phy_device_register()
45 static int of_mdiobus_register_phy(struct mii_bus *mdio, in of_mdiobus_register_phy() argument
48 return fwnode_mdiobus_register_phy(mdio, of_fwnode_handle(child), addr); in of_mdiobus_register_phy()
51 static int of_mdiobus_register_device(struct mii_bus *mdio, in of_mdiobus_register_device() argument
58 mdiodev = mdio_device_create(mdio, addr); in of_mdiobus_register_device()
66 device_set_node(&mdiodev->dev, fwnode); in of_mdiobus_register_device()
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| /openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | realtek.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
18 MDIO or SPI.
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
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| H A D | marvell.txt | 2 ---------------------------------------
10 Marvell Switches are MDIO devices. The following properties should be
11 placed as a child node of an mdio device.
17 which is at a different MDIO base address in different switch families.
18 - "marvell,mv88e6085" : Switch has base address 0x10. Use with models:
22 - "marvell,mv88e6190" : Switch has base address 0x00. Use with models:
24 - "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model:
28 - compatible : Should be one of "marvell,mv88e6085",
31 - reg : Address on the MII bus for the switch.
35 - reset-gpios : Should be a gpio specifier for a reset line
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| /openbmc/linux/drivers/net/pcs/ |
| H A D | pcs-lynx.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Lynx PCS MDIO helpers
6 #include <linux/mdio.h>
8 #include <linux/pcs-lynx.h>
14 #define LINK_TIMER_LO 0x12
15 #define LINK_TIMER_HI 0x13
16 #define IF_MODE 0x14
17 #define IF_MODE_SGMII_EN BIT(0)
25 struct mdio_device *mdio; member
29 SGMII_SPEED_10 = 0,
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-lx2160a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
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| H A D | fsl-lx2162a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "LTM4619-3.3VSB";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
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| /openbmc/u-boot/drivers/net/ti/ |
| H A D | cpsw_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * CPSW MDIO generic driver for TI AMxx/K2x/EMAC devices.
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
20 #define CONTROL_DIV_MASK GENMASK(15, 0)
39 #define USERACCESS_READ (0)
42 #define USERACCESS_DATA GENMASK(15, 0)
43 } user[0];
46 #define CPSW_MDIO_DIV_DEF 0xff
47 #define PHY_REG_MASK 0x1f
48 #define PHY_ID_MASK 0x1f
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| /openbmc/u-boot/doc/device-tree-bindings/net/ |
| H A D | fsl-tsec-phy.txt | 1 * TSEC-compatible ethernet nodes
5 - compatible : Should be "fsl,tsec"
6 - reg : Offset and length of the register set for the device
7 - phy-handle : See ethernet.txt file in the same directory.
8 - phy-connection-type : See ethernet.txt file in the same directory. This
9 property is only really needed if the connection is of type "rgmii-id",
10 "rgmii-rxid" and "rgmii-txid" as all other connection types are detected
16 reg = <0x24000 0x1000>;
17 phy-handle = <&phy0>;
18 phy-connection-type = "sgmii";
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| /openbmc/linux/drivers/net/ethernet/hisilicon/ |
| H A D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
38 u8 __iomem *vbase; /* mdio reg base address */
43 /* mdio reg */
44 #define MDIO_COMMAND_REG 0x0
45 #define MDIO_ADDR_REG 0x4
46 #define MDIO_WDATA_REG 0x8
47 #define MDIO_RDATA_REG 0xc
48 #define MDIO_STA_REG 0x10
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