Home
last modified time | relevance | path

Searched +full:0 +full:- +full:1 (Results 1 – 25 of 1489) sorted by relevance

12345678910>>...60

/openbmc/linux/fs/nls/
H A Dnls_ucs2_utils.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
26 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
28 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
29 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
30 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
31 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
32 -32, -32, -32, -32, -32, /* 060-06f */
33 -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
[all …]
/openbmc/qemu/include/hw/misc/macio/
H A Dpmu.h22 #define PMU_POWER_CTRL0 0x10 /* control power of some devices */
23 #define PMU_POWER_CTRL 0x11 /* control power of some devices */
24 #define PMU_ADB_CMD 0x20 /* send ADB packet */
25 #define PMU_ADB_POLL_OFF 0x21 /* disable ADB auto-poll */
26 #define PMU_WRITE_NVRAM 0x33 /* write non-volatile RAM */
27 #define PMU_READ_NVRAM 0x3b /* read non-volatile RAM */
28 #define PMU_SET_RTC 0x30 /* set real-time clock */
29 #define PMU_READ_RTC 0x38 /* read real-time clock */
30 #define PMU_SET_VOLBUTTON 0x40 /* set volume up/down position */
31 #define PMU_BACKLIGHT_BRIGHT 0x41 /* set backlight brightness */
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
17 viewBox="0 0 739.11388 339.6584"
25 …0,0 0,1895 4118,0 L 4118,0 0,0 Z m 3051.62,250.48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.5…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …0,0 0,1895 4118,0 0,-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 …
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
[all …]
/openbmc/linux/Documentation/driver-api/media/drivers/ccs/
H A Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
13 # v1.1 defined in version 1.1
19 module_model_id 0x0000 16
20 module_revision_number_major 0x0002 8
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Dstv090x_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 #define STV090x_MID 0xf100
16 #define STV090x_OFFST_MRELEASE_FIELD 0
19 #define STV090x_DACR1 0xf113
22 #define STV090x_OFFST_DACR1_VALUE_FIELD 0
25 #define STV090x_DACR2 0xf114
26 #define STV090x_OFFST_DACR2_VALUE_FIELD 0
29 #define STV090x_OUTCFG 0xf11c
31 #define STV090x_WIDTH_OUTSERRS1_HZ_FIELD 1
33 #define STV090x_WIDTH_OUTSERRS2_HZ_FIELD 1
[all …]
/openbmc/linux/drivers/soc/qcom/
H A Dllcc-qcom.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
19 #include <linux/soc/qcom/llcc-qcom.h>
21 #define ACTIVATE BIT(0)
22 #define DEACTIVATE BIT(1)
23 #define ACT_CLEAR BIT(0)
25 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
26 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
27 #define ACT_CTRL_ACT_TRIG BIT(0)
28 #define ACT_CTRL_OPCODE_SHIFT 0x01
[all …]
/openbmc/qemu/chardev/
H A Dbaum.c4 * Copyright (c) 2008, 2010-2011, 2016-2017 Samuel Thibault
28 #include "qemu/main-loop.h"
38 #if 0
45 #define ESC 0x1B
47 #define BAUM_REQ_DisplayData 0x01
48 #define BAUM_REQ_GetVersionNumber 0x05
49 #define BAUM_REQ_GetKeys 0x08
50 #define BAUM_REQ_SetMode 0x12
51 #define BAUM_REQ_SetProtocol 0x15
52 #define BAUM_REQ_GetDeviceIdentity 0x84
[all …]
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
H A Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmap_to_14segment.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
14 * of (ASCII) characters to a 14-segments notation.
17 * See: https://en.wikipedia.org/wiki/Fourteen-segment_display
19 * Notation: +---a---+
23 * +-g1+-g2+
27 * +---d---+
53 * return -EINVAL;
64 #define BIT_SEG14_A 0
65 #define BIT_SEG14_B 1
87 if (c < 0 || c >= sizeof(map->table) / sizeof(map->table[0])) in map_to_seg14()
[all …]
H A Dmap_to_7segment.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
10 * of (ASCII) characters to a 7-segments notation.
15 * Notation: +-a-+
17 * +-g-+
19 * +-d-+
45 * return -EINVAL;
52 * 2005-05-31 RFC linux-kernel@vger.kernel.org
57 #define BIT_SEG7_A 0
58 #define BIT_SEG7_B 1
72 return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL; in map_to_seg7()
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Zheng Yang <zhengyang@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
29 #define RK3228_BYPASS_PWRON_EN BIT(1)
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
[all …]
/openbmc/phosphor-power/phosphor-power-sequencer/test/
H A Ducd90320_device_tests.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
69 uint16_t address{0x72}; in TEST()
74 EXPECT_EQ(device.getRails()[0]->getName(), "VDD"); in TEST()
75 EXPECT_EQ(device.getRails()[1]->getName(), "VIO"); in TEST()
79 EXPECT_EQ(device.getInstance(), 0); in TEST()
91 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, // MAR01-12 in TEST()
92 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, // MAR13-24 in TEST()
93 1, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 1, // EN1-12 in TEST()
94 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, // EN13-24 in TEST()
95 1, 1, 0, 0, 1, 1, 1, 0, // EN25-32 in TEST()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgf100.c37 { 0x001000, 1, 0x01, 0x00000004 },
38 { 0x0000a9, 1, 0x01, 0x0000ffff },
39 { 0x000038, 1, 0x01, 0x0fac6881 },
40 { 0x00003d, 1, 0x01, 0x00000001 },
41 { 0x0000e8, 8, 0x01, 0x00000400 },
42 { 0x000078, 8, 0x01, 0x00000300 },
43 { 0x000050, 1, 0x01, 0x00000011 },
44 { 0x000058, 8, 0x01, 0x00000008 },
45 { 0x000208, 8, 0x01, 0x00000001 },
46 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
H A Dctxnv50.c23 #define CP_FLAG_CLEAR 0
24 #define CP_FLAG_SET 1
25 #define CP_FLAG_SWAP_DIRECTION ((0 * 32) + 0)
26 #define CP_FLAG_SWAP_DIRECTION_LOAD 0
27 #define CP_FLAG_SWAP_DIRECTION_SAVE 1
28 #define CP_FLAG_UNK01 ((0 * 32) + 1)
29 #define CP_FLAG_UNK01_CLEAR 0
30 #define CP_FLAG_UNK01_SET 1
31 #define CP_FLAG_UNK03 ((0 * 32) + 3)
32 #define CP_FLAG_UNK03_CLEAR 0
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dkmeter1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * 2008-2011 DENX Software Engineering GmbH
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
31 PowerPC,8360@0 {
33 reg = <0x0>;
34 d-cache-line-size = <32>; // 32 bytes
[all …]
/openbmc/linux/drivers/hwmon/
H A Dabituguru3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2008 Hans de Goede <hdegoede@redhat.com>
25 #include <linux/hwmon-sysfs.h>
30 #define ABIT_UGURU3_SETTINGS_BANK 0x01
31 #define ABIT_UGURU3_SENSORS_BANK 0x08
32 #define ABIT_UGURU3_MISC_BANK 0x09
33 #define ABIT_UGURU3_ALARMS_START 0x1E
34 #define ABIT_UGURU3_SETTINGS_START 0x24
35 #define ABIT_UGURU3_VALUES_START 0x80
36 #define ABIT_UGURU3_BOARD_ID 0x0A
[all …]
/openbmc/linux/Documentation/tools/rtla/
H A Drtla-timerlat-hist.rst2 rtla-timerlat-hist
4 ------------------------------------------------
6 ------------------------------------------------
8 :Manual section: 1
21 **osnoise:** tracepoints are enabled when using the **-T** option.
37 in the cpus *0-4*, *skipping zero* only lines. Moreover, **rtla timerlat
39 *SCHED_DEADLINE* priority, with a *100us* runtime every *1ms* period. The
40 *1ms* period is also passed to the *timerlat* tracer. Auto-analysis is disabled
43 [root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1000 --no-aa
46 # Duration: 0 00:10:00
[all …]
/openbmc/linux/arch/x86/kernel/
H A Duprobes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for x86
5 * Copyright (C) IBM Corporation, 2008-2011
21 /* Post-execution fixups. */
24 #define UPROBE_FIX_IP 0x01
27 #define UPROBE_FIX_CALL 0x02
30 #define UPROBE_FIX_SETF 0x04
32 #define UPROBE_FIX_RIP_SI 0x08
33 #define UPROBE_FIX_RIP_DI 0x10
34 #define UPROBE_FIX_RIP_BX 0x20
[all …]
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D261.out8 [0]
9 ID: 1
11 Extra data size: 0
12 [1]
16 VM state size: 0
18 Icount: 0
24 VM state size: 0
30 [0]
31 ID: 1
34 VM state size: 0
[all …]
/openbmc/linux/Documentation/input/devices/
H A Dalps.rst1 ----------------------
3 ----------------------
6 ------------
8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8.
10 Since roughly mid-2010 several new ALPS touchpads have been released and
14 adequate. The design choices were to re-define the alps_model_data
24 different ALPS variants but there did not appear to be a 1:1 mapping.
29 ---------
32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
[all …]
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dencode_ext.def2 * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
24 DEF_ENC(V6_extractw, ICLASS_LD" 001 0 000sssss PP0uuuuu --1ddddd") /* coproc insn, returns Rd */
32 DEF_CLASS32(ICLASS_NCJ" 1--- -------- PP------ --------",COPROC_VMEM)
33 DEF_CLASS32(ICLASS_NCJ" 1000 0-0ttttt PPi--iii ---ddddd",BaseOffset_VMEM_Loads)
34 DEF_CLASS32(ICLASS_NCJ" 1000 1-0ttttt PPivviii ---ddddd",BaseOffset_if_Pv_VMEM_Loads)
35 DEF_CLASS32(ICLASS_NCJ" 1000 0-1ttttt PPi--iii --------",BaseOffset_VMEM_Stores1)
36 DEF_CLASS32(ICLASS_NCJ" 1000 1-0ttttt PPi--iii 00------",BaseOffset_VMEM_Stores2)
37 DEF_CLASS32(ICLASS_NCJ" 1000 1-1ttttt PPivviii --------",BaseOffset_if_Pv_VMEM_Stores)
39 DEF_CLASS32(ICLASS_NCJ" 1001 0-0xxxxx PP---iii ---ddddd",PostImm_VMEM_Loads)
40 DEF_CLASS32(ICLASS_NCJ" 1001 1-0xxxxx PP-vviii ---ddddd",PostImm_if_Pv_VMEM_Loads)
[all …]

12345678910>>...60