xref: /openbmc/qemu/hw/arm/xlnx-zcu102.c (revision f3205af4)
1 /*
2  * Xilinx ZynqMP ZCU102 board
3  *
4  * Copyright (C) 2015 Xilinx Inc
5  * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License as published by the
9  * Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15  * for more details.
16  */
17 
18 #include "qemu/osdep.h"
19 #include "qapi/error.h"
20 #include "hw/arm/xlnx-zynqmp.h"
21 #include "hw/arm/boot.h"
22 #include "hw/boards.h"
23 #include "qemu/error-report.h"
24 #include "qemu/log.h"
25 #include "sysemu/device_tree.h"
26 #include "qom/object.h"
27 #include "net/can_emu.h"
28 #include "audio/audio.h"
29 
30 struct XlnxZCU102 {
31     MachineState parent_obj;
32 
33     XlnxZynqMPState soc;
34 
35     bool secure;
36     bool virt;
37 
38     CanBusState *canbus[XLNX_ZYNQMP_NUM_CAN];
39 
40     struct arm_boot_info binfo;
41 };
42 
43 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102,ZCU102_MACHINE)44 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102, ZCU102_MACHINE)
45 
46 
47 static bool zcu102_get_secure(Object *obj, Error **errp)
48 {
49     XlnxZCU102 *s = ZCU102_MACHINE(obj);
50 
51     return s->secure;
52 }
53 
zcu102_set_secure(Object * obj,bool value,Error ** errp)54 static void zcu102_set_secure(Object *obj, bool value, Error **errp)
55 {
56     XlnxZCU102 *s = ZCU102_MACHINE(obj);
57 
58     s->secure = value;
59 }
60 
zcu102_get_virt(Object * obj,Error ** errp)61 static bool zcu102_get_virt(Object *obj, Error **errp)
62 {
63     XlnxZCU102 *s = ZCU102_MACHINE(obj);
64 
65     return s->virt;
66 }
67 
zcu102_set_virt(Object * obj,bool value,Error ** errp)68 static void zcu102_set_virt(Object *obj, bool value, Error **errp)
69 {
70     XlnxZCU102 *s = ZCU102_MACHINE(obj);
71 
72     s->virt = value;
73 }
74 
zcu102_modify_dtb(const struct arm_boot_info * binfo,void * fdt)75 static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt)
76 {
77     XlnxZCU102 *s = container_of(binfo, XlnxZCU102, binfo);
78     bool method_is_hvc;
79     char **node_path;
80     const char *r;
81     int prop_len;
82     int i;
83 
84     /* If EL3 is enabled, we keep all firmware nodes active.  */
85     if (!s->secure) {
86         node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware",
87                                        &error_fatal);
88 
89         for (i = 0; node_path && node_path[i]; i++) {
90             r = qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len, NULL);
91             method_is_hvc = r && !strcmp("hvc", r);
92 
93             /* Allow HVC based firmware if EL2 is enabled.  */
94             if (method_is_hvc && s->virt) {
95                 continue;
96             }
97             qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled");
98         }
99         g_strfreev(node_path);
100     }
101 }
102 
bbram_attach_drive(XlnxBBRam * dev)103 static void bbram_attach_drive(XlnxBBRam *dev)
104 {
105     DriveInfo *dinfo;
106     BlockBackend *blk;
107 
108     dinfo = drive_get_by_index(IF_PFLASH, 2);
109     blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
110     if (blk) {
111         qdev_prop_set_drive(DEVICE(dev), "drive", blk);
112     }
113 }
114 
efuse_attach_drive(XlnxEFuse * dev)115 static void efuse_attach_drive(XlnxEFuse *dev)
116 {
117     DriveInfo *dinfo;
118     BlockBackend *blk;
119 
120     dinfo = drive_get_by_index(IF_PFLASH, 3);
121     blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
122     if (blk) {
123         qdev_prop_set_drive(DEVICE(dev), "drive", blk);
124     }
125 }
126 
xlnx_zcu102_init(MachineState * machine)127 static void xlnx_zcu102_init(MachineState *machine)
128 {
129     XlnxZCU102 *s = ZCU102_MACHINE(machine);
130     int i;
131     uint64_t ram_size = machine->ram_size;
132 
133     /* Create the memory region to pass to the SoC */
134     if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
135         error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
136                      "0x%llx", ram_size,
137                      XLNX_ZYNQMP_MAX_RAM_SIZE);
138         exit(1);
139     }
140 
141     if (ram_size < 0x08000000) {
142         qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
143                  ram_size);
144     }
145 
146     object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP);
147 
148     if (machine->audiodev) {
149         qdev_prop_set_string(DEVICE(&s->soc.dp), "audiodev", machine->audiodev);
150     }
151 
152     object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram),
153                              &error_abort);
154     object_property_set_bool(OBJECT(&s->soc), "secure", s->secure,
155                              &error_fatal);
156     object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt,
157                              &error_fatal);
158 
159     for (i = 0; i < XLNX_ZYNQMP_NUM_CAN; i++) {
160         gchar *bus_name = g_strdup_printf("canbus%d", i);
161 
162         object_property_set_link(OBJECT(&s->soc), bus_name,
163                                  OBJECT(s->canbus[i]), &error_fatal);
164         g_free(bus_name);
165     }
166 
167     qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
168 
169     /* Attach bbram backend, if given */
170     bbram_attach_drive(&s->soc.bbram);
171 
172     /* Attach efuse backend, if given */
173     efuse_attach_drive(&s->soc.efuse);
174 
175     /* Create and plug in the SD cards */
176     for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
177         BusState *bus;
178         DriveInfo *di = drive_get(IF_SD, 0, i);
179         BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
180         DeviceState *carddev;
181         char *bus_name;
182 
183         bus_name = g_strdup_printf("sd-bus%d", i);
184         bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
185         g_free(bus_name);
186         if (!bus) {
187             error_report("No SD bus found for SD card %d", i);
188             exit(1);
189         }
190         carddev = qdev_new(TYPE_SD_CARD);
191         qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
192         qdev_realize_and_unref(carddev, bus, &error_fatal);
193     }
194 
195     for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
196         BusState *spi_bus;
197         DeviceState *flash_dev;
198         qemu_irq cs_line;
199         DriveInfo *dinfo = drive_get(IF_MTD, 0, i);
200         gchar *bus_name = g_strdup_printf("spi%d", i);
201 
202         spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
203         g_free(bus_name);
204 
205         flash_dev = qdev_new("sst25wf080");
206         if (dinfo) {
207             qdev_prop_set_drive_err(flash_dev, "drive",
208                                     blk_by_legacy_dinfo(dinfo), &error_fatal);
209         }
210         qdev_prop_set_uint8(flash_dev, "cs", i);
211         qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
212 
213         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
214 
215         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
216     }
217 
218     for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
219         BusState *spi_bus;
220         DeviceState *flash_dev;
221         qemu_irq cs_line;
222         DriveInfo *dinfo = drive_get(IF_MTD, 0, XLNX_ZYNQMP_NUM_SPIS + i);
223         int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
224         gchar *bus_name = g_strdup_printf("qspi%d", bus);
225 
226         spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
227         g_free(bus_name);
228 
229         flash_dev = qdev_new("n25q512a11");
230         if (dinfo) {
231             qdev_prop_set_drive_err(flash_dev, "drive",
232                                     blk_by_legacy_dinfo(dinfo), &error_fatal);
233         }
234         qdev_prop_set_uint8(flash_dev, "cs", i);
235         qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
236 
237         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
238 
239         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
240     }
241 
242     /* TODO create and connect IDE devices for ide_drive_get() */
243 
244     s->binfo.ram_size = ram_size;
245     s->binfo.loader_start = 0;
246     s->binfo.modify_dtb = zcu102_modify_dtb;
247     s->binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
248     arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo);
249 }
250 
xlnx_zcu102_machine_instance_init(Object * obj)251 static void xlnx_zcu102_machine_instance_init(Object *obj)
252 {
253     XlnxZCU102 *s = ZCU102_MACHINE(obj);
254 
255     /* Default to secure mode being disabled */
256     s->secure = false;
257     /* Default to virt (EL2) being disabled */
258     s->virt = false;
259     object_property_add_link(obj, "canbus0", TYPE_CAN_BUS,
260                              (Object **)&s->canbus[0],
261                              object_property_allow_set_link,
262                              0);
263 
264     object_property_add_link(obj, "canbus1", TYPE_CAN_BUS,
265                              (Object **)&s->canbus[1],
266                              object_property_allow_set_link,
267                              0);
268 }
269 
xlnx_zcu102_machine_class_init(ObjectClass * oc,void * data)270 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
271 {
272     MachineClass *mc = MACHINE_CLASS(oc);
273 
274     mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
275                "the value of smp";
276     mc->init = xlnx_zcu102_init;
277     mc->block_default_type = IF_IDE;
278     mc->units_per_default_bus = 1;
279     mc->ignore_memory_transaction_failures = true;
280     mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
281     mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
282     mc->default_ram_id = "ddr-ram";
283 
284     machine_add_audiodev_property(mc);
285     object_class_property_add_bool(oc, "secure", zcu102_get_secure,
286                                    zcu102_set_secure);
287     object_class_property_set_description(oc, "secure",
288                                           "Set on/off to enable/disable the ARM "
289                                           "Security Extensions (TrustZone)");
290 
291     object_class_property_add_bool(oc, "virtualization", zcu102_get_virt,
292                                    zcu102_set_virt);
293     object_class_property_set_description(oc, "virtualization",
294                                           "Set on/off to enable/disable emulating a "
295                                           "guest CPU which implements the ARM "
296                                           "Virtualization Extensions");
297 }
298 
299 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
300     .name       = TYPE_ZCU102_MACHINE,
301     .parent     = TYPE_MACHINE,
302     .class_init = xlnx_zcu102_machine_class_init,
303     .instance_init = xlnx_zcu102_machine_instance_init,
304     .instance_size = sizeof(XlnxZCU102),
305 };
306 
xlnx_zcu102_machine_init_register_types(void)307 static void xlnx_zcu102_machine_init_register_types(void)
308 {
309     type_register_static(&xlnx_zcu102_machine_init_typeinfo);
310 }
311 
312 type_init(xlnx_zcu102_machine_init_register_types)
313