xref: /openbmc/qemu/hw/xtensa/sim.c (revision ded625e7)
1 /*
2  * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *     * Redistributions of source code must retain the above copyright
8  *       notice, this list of conditions and the following disclaimer.
9  *     * Redistributions in binary form must reproduce the above copyright
10  *       notice, this list of conditions and the following disclaimer in the
11  *       documentation and/or other materials provided with the distribution.
12  *     * Neither the name of the Open Source and Linux Lab nor the
13  *       names of its contributors may be used to endorse or promote products
14  *       derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "sysemu/reset.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/boards.h"
33 #include "hw/loader.h"
34 #include "elf.h"
35 #include "exec/memory.h"
36 #include "qemu/error-report.h"
37 #include "xtensa_memory.h"
38 #include "xtensa_sim.h"
39 
translate_phys_addr(void * opaque,uint64_t addr)40 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
41 {
42     XtensaCPU *cpu = opaque;
43 
44     return cpu_get_phys_page_debug(CPU(cpu), addr);
45 }
46 
sim_reset(void * opaque)47 static void sim_reset(void *opaque)
48 {
49     XtensaCPU *cpu = opaque;
50 
51     cpu_reset(CPU(cpu));
52 }
53 
xtensa_sim_common_init(MachineState * machine)54 XtensaCPU *xtensa_sim_common_init(MachineState *machine)
55 {
56     XtensaCPU *cpu = NULL;
57     CPUXtensaState *env = NULL;
58     ram_addr_t ram_size = machine->ram_size;
59     int n;
60 
61     for (n = 0; n < machine->smp.cpus; n++) {
62         cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
63         env = &cpu->env;
64 
65         env->sregs[PRID] = n;
66         qemu_register_reset(sim_reset, cpu);
67         /* Need MMU initialized prior to ELF loading,
68          * so that ELF gets loaded into virtual addresses
69          */
70         sim_reset(cpu);
71     }
72 
73     if (env) {
74         XtensaMemory sysram = env->config->sysram;
75 
76         sysram.location[0].size = ram_size;
77         xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom",
78                                      get_system_memory());
79         xtensa_create_memory_regions(&env->config->instram, "xtensa.instram",
80                                      get_system_memory());
81         xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom",
82                                      get_system_memory());
83         xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram",
84                                      get_system_memory());
85         xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom",
86                                      get_system_memory());
87         xtensa_create_memory_regions(&sysram, "xtensa.sysram",
88                                      get_system_memory());
89     }
90     if (serial_hd(0)) {
91         xtensa_sim_open_console(serial_hd(0));
92     }
93     return cpu;
94 }
95 
xtensa_sim_load_kernel(XtensaCPU * cpu,MachineState * machine)96 void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
97 {
98     const char *kernel_filename = machine->kernel_filename;
99 
100     if (kernel_filename) {
101         uint64_t elf_entry;
102         int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
103                                &elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN,
104                                EM_XTENSA, 0, 0);
105 
106         if (success > 0) {
107             cpu->env.pc = elf_entry;
108         }
109     }
110 }
111 
xtensa_sim_init(MachineState * machine)112 static void xtensa_sim_init(MachineState *machine)
113 {
114     XtensaCPU *cpu = xtensa_sim_common_init(machine);
115 
116     xtensa_sim_load_kernel(cpu, machine);
117 }
118 
xtensa_sim_machine_init(MachineClass * mc)119 static void xtensa_sim_machine_init(MachineClass *mc)
120 {
121     mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
122     mc->is_default = true;
123     mc->init = xtensa_sim_init;
124     mc->max_cpus = 4;
125     mc->no_serial = 1;
126     mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
127 }
128 
129 DEFINE_MACHINE("sim", xtensa_sim_machine_init)
130