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/openbmc/qemu/tests/tcg/s390x/
H A Dcvd.c10 static uint64_t cvd(int32_t x) in cvd()
19 static uint64_t cvdy(int32_t x) in cvdy()
28 static __uint128_t cvdg(int64_t x) in cvdg()
/openbmc/openbmc/poky/meta/recipes-core/musl/bsd-headers/
H A Dsys-cdefs.h12 #define __CONCAT(x,y) x ## y argument
13 #define __STRING(x) #x argument
31 #define __CONCAT(x,y) x ## y argument
32 #define __STRING(x) #x argument
/openbmc/qemu/hw/timer/
H A Dexynos4210_pwm.c67 #define TCNTB(x) (0xC * (x)) argument
68 #define TCMPB(x) (0xC * (x) + 1) argument
69 #define TCNTO(x) (0xC * (x) + 2) argument
71 #define GET_PRESCALER(reg, x) (((reg) & (0xFF << (8 * (x)))) >> 8 * (x)) argument
72 #define GET_DIVIDER(reg, x) (1 << (((reg) & (0xF << (4 * (x)))) >> (4 * (x)))) argument
78 #define TCON_TIMER_BASE(x) (((x) ? 1 : 0) * 4 + 4 * (x)) argument
79 #define TCON_TIMER_START(x) (1 << (TCON_TIMER_BASE(x) + 0)) argument
80 #define TCON_TIMER_MANUAL_UPD(x) (1 << (TCON_TIMER_BASE(x) + 1)) argument
81 #define TCON_TIMER_OUTPUT_INV(x) (1 << (TCON_TIMER_BASE(x) + 2)) argument
82 #define TCON_TIMER_AUTO_RELOAD(x) (1 << (TCON_TIMER_BASE(x) + 3)) argument
[all …]
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Dpwm.h59 #define PWM_CR_CLKSEL(x) ((x) & 0x0F) argument
64 #define PWM_EN_PWMEn(x) (1 << ((x) & 0x07)) argument
67 #define PWM_POL_PPOLn(x) (1 << ((x) & 0x07)) argument
70 #define PWM_CLK_PCLKn(x) (1 << ((x) & 0x07)) argument
73 #define PWM_PRCLK_PCKB(x) (((x) & 0x07) << 4) argument
75 #define PWM_PRCLK_PCKA(x) ((x) & 0x07) argument
78 #define PWM_CLK_PCLKn(x) (1 << ((x) & 0x07)) argument
H A Dskha.h46 #define SKHA_MODE_CTRM(x) (((x) & 0x0F) << 9) argument
50 #define SKHA_MODE_CTRM(x) (((x) & 0x0F) << 8) argument
54 #define SKHA_MODE_CM(x) (((x) & 0x03) << 3) argument
57 #define SKHA_MODE_ALG(x) ((x) & 0x03) argument
60 #define SHKA_CR_ODMAL(x) (((x) & 0x3F) << 24) argument
62 #define SHKA_CR_IDMAL(x) (((x) & 0x3F) << 16) argument
74 #define SKHA_SR_OFL(x) (((x) & 0xFF) << 24) argument
76 #define SKHA_SR_IFL(x) (((x) & 0xFF) << 16) argument
78 #define SKHA_SR_AESES(x) (((x) & 0x1F) << 11) argument
80 #define SKHA_SR_DESES(x) (((x) & 0x7) << 8) argument
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H A Dqspi.h31 #define QSPI_QMR_BITS(x) (((x)&0x000F)<<10) argument
44 #define QSPI_QMR_BAUD(x) ((x)&0x00FF) argument
49 #define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) argument
51 #define QSPI_QDLYR_DTL(x) ((x)&0x00FF) argument
59 #define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) argument
61 #define QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) argument
63 #define QSPI_QWR_NEWQP(x) ((x)&0x000F) argument
78 #define QSPI_QAR_ADDR(x) ((x)&0x003F) argument
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_matrix.h129 #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) argument
131 #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) argument
136 #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) argument
139 #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) argument
227 #define AT91_MATRIX_PRA_M0(x) ((x & 3) << 0) /* Master 0 Priority Reg. A*/ argument
228 #define AT91_MATRIX_PRA_M1(x) ((x & 3) << 4) /* Master 1 Priority Reg. A*/ argument
229 #define AT91_MATRIX_PRA_M2(x) ((x & 3) << 8) /* Master 2 Priority Reg. A*/ argument
230 #define AT91_MATRIX_PRA_M3(x) ((x & 3) << 12) /* Master 3 Priority Reg. A*/ argument
231 #define AT91_MATRIX_PRA_M4(x) ((x & 3) << 16) /* Master 4 Priority Reg. A*/ argument
232 #define AT91_MATRIX_PRA_M5(x) ((x & 3) << 20) /* Master 5 Priority Reg. A*/ argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/ti-common/
H A Dkeystone_net.h22 #define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x) * 0x040) argument
37 #define DEVICE_EMACSL_BASE(x) (EMAC_EMACSL_BASE_ADDR + (x) * 0x1000) argument
127 #define CPSW_REG_ALE_PORTCTL(x) (0x640 + (x) * 4) argument
137 #define CPSW_REG_ALE_PORTCTL(x) (0x1e040 + (x) * 4) argument
167 #define SGMII_OFFSET(x) ((x <= 1) ? (x * 0x100) : ((x * 0x100) + 0x100)) argument
169 #define SGMII_OFFSET(x) ((x) * 0x100) argument
172 #define SGMII_IDVER_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x000) argument
173 #define SGMII_SRESET_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x004) argument
174 #define SGMII_CTL_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x010) argument
175 #define SGMII_STATUS_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x014) argument
[all …]
/openbmc/u-boot/arch/m68k/include/asm/
H A Dm5282.h227 #define MCFGPIO_PORT(x) (0x01<<x) argument
237 #define MCFGPIO_DDR(x) (0x01<<x) argument
247 #define MCFGPIO_Px(x) (0x01<<x) argument
258 #define MCFGPIO_PEPAR_PEPA1(x) (((x)&0x3)<<2) argument
259 #define MCFGPIO_PEPAR_PEPA0(x) (((x)&0x3)) argument
273 #define MCFGPIO_PJPAR_PJPA(x) (0x01<<x) argument
277 #define MCFGPIO_PASPAR_PASPA5(x) (((x)&0x3)<<10) argument
278 #define MCFGPIO_PASPAR_PASPA4(x) (((x)&0x3)<<8) argument
279 #define MCFGPIO_PASPAR_PASPA3(x) (((x)&0x3)<<6) argument
280 #define MCFGPIO_PASPAR_PASPA2(x) (((x)&0x3)<<4) argument
[all …]
/openbmc/qemu/tests/tcg/multiarch/
H A Doverflow.c3 int overflow_add_32(int x, int y) in overflow_add_32()
9 int overflow_add_64(long long x, long long y) in overflow_add_64()
15 int overflow_sub_32(int x, int y) in overflow_sub_32()
21 int overflow_sub_64(long long x, long long y) in overflow_sub_64()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a83t.h146 #define ZQnPR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000144 + 0x10 * x) argument
147 #define ZQnDR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000148 + 0x10 * x) argument
148 #define ZQnSR(x) (SUNXI_DRAM_CTL0_BASE + 0x0000014c + 0x10 * x) argument
150 #define DXnGTR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000340 + 0x80 * x) argument
151 #define DXnGCR0(x) (SUNXI_DRAM_CTL0_BASE + 0x00000344 + 0x80 * x) argument
152 #define DXnGSR0(x) (SUNXI_DRAM_CTL0_BASE + 0x00000348 + 0x80 * x) argument
153 #define DXnGSR1(x) (SUNXI_DRAM_CTL0_BASE + 0x0000034c + 0x80 * x) argument
154 #define DXnGSR2(x) (SUNXI_DRAM_CTL0_BASE + 0x00000350 + 0x80 * x) argument
156 #define CAIOCR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000210 + 0x4 * (x)) argument
157 #define DXnMDLR(x) (SUNXI_DRAM_CTL0_BASE + 0x00000300 + 0x80 * x) argument
[all …]
H A Dpwm.h12 #define SUNXI_PWM_CTRL_PRESCALE0(x) ((x) & 0xf) argument
15 #define SUNXI_PWM_CTRL_POLARITY0(x) ((x) << 5) argument
20 #define SUNXI_PWM_CH0_PERIOD_PRD(x) ((x & 0xffff) << 16) argument
21 #define SUNXI_PWM_CH0_PERIOD_DUTY(x) ((x) & 0xffff) argument
/openbmc/qemu/target/riscv/
H A Dbitmanip_helper.c53 static inline target_ulong do_swap(target_ulong x, uint64_t mask, int shift) in do_swap()
60 target_ulong x = rs1; in HELPER() local
78 target_ulong x = src & ~(maskL | maskR); in do_shuf_stage() local
86 target_ulong x = rs1; in HELPER() local
97 target_ulong x = rs1; in HELPER() local
/openbmc/u-boot/include/cramfs/
H A Dcramfs_fs.h87 #define CRAMFS_16(x) (x) argument
88 #define CRAMFS_24(x) (x) argument
89 #define CRAMFS_32(x) (x) argument
90 #define CRAMFS_GET_NAMELEN(x) ((x)->namelen) argument
91 #define CRAMFS_GET_OFFSET(x) ((x)->offset) argument
92 #define CRAMFS_SET_OFFSET(x,y) ((x)->offset = (y)) argument
93 #define CRAMFS_SET_NAMELEN(x,y) ((x)->namelen = (y)) argument
/openbmc/qemu/hw/display/
H A Dpl110_template.h34 #define FN_2(x, y) FN(x, y) FN(x+1, y) argument
35 #define FN_4(x, y) FN_2(x, y) FN_2(x+2, y) argument
45 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 7 - (x))) & 1]); in glue() argument
47 #define FN(x, y) COPY_PIXEL(d, palette[(data >> ((x) + y)) & 1]); in glue() argument
73 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 6 - (x)*2)) & 3]); in glue() argument
75 #define FN(x, y) COPY_PIXEL(d, palette[(data >> ((x)*2 + y)) & 3]); in glue() argument
101 #define FN(x, y) COPY_PIXEL(d, palette[(data >> (y + 4 - (x)*4)) & 0xf]); in glue() argument
103 #define FN(x, y) COPY_PIXEL(d, palette[(data >> ((x)*4 + y)) & 0xf]); in glue() argument
128 #define FN(x) COPY_PIXEL(d, palette[(data >> (x)) & 0xff]); in glue() argument
/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dpwm.h21 #define MUX_DIV_SHIFT(x) (x * 4) argument
23 #define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) argument
25 #define TCON_START(x) (1 << TCON_OFFSET(x)) argument
26 #define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) argument
27 #define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) argument
28 #define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) argument
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dpwm.h21 #define MUX_DIV_SHIFT(x) (x * 4) argument
23 #define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) argument
25 #define TCON_START(x) (1 << TCON_OFFSET(x)) argument
26 #define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) argument
27 #define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) argument
28 #define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) argument
H A Dclk.h22 #define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8)) argument
23 #define MASK_RATIO(x) (0xf << (x << 4)) argument
24 #define SET_PRE_RATIO(x, y) ((y & 0xff) << ((x << 4) + 8)) argument
25 #define SET_RATIO(x, y) ((y & 0xf) << (x << 4)) argument
H A Ddp.h340 #define AUX_BIT_PERIOD_EXPECTED_DELAY(x) (((x) & 0x7) << 8) argument
346 #define AUX_HW_RETRY_COUNT_SEL(x) (((x) & 0x7) << 0) argument
350 #define DEFER_COUNT(x) (((x) & 0x7f) << 0) argument
360 #define BUF_DATA_COUNT(x) (((x) & 0x1f) << 0) argument
363 #define AUX_ADDR_7_0(x) (((x) >> 0) & 0xff) argument
366 #define AUX_ADDR_15_8(x) (((x) >> 8) & 0xff) argument
369 #define AUX_ADDR_19_16(x) (((x) >> 16) & 0x0f) argument
372 #define AUX_LENGTH(x) (((x - 1) & 0xf) << 4) argument
412 #define TOTAL_LINE_CFG_L(x) ((x) & 0xff) argument
413 #define TOTAL_LINE_CFG_H(x) ((((x) >> 8)) & 0xff) argument
[all …]
/openbmc/qemu/target/s390x/tcg/
H A Dvec.h42 #define H1(x) ((x) ^ 7) argument
43 #define H2(x) ((x) ^ 3) argument
44 #define H4(x) ((x) ^ 1) argument
46 #define H1(x) (x) argument
47 #define H2(x) (x) argument
48 #define H4(x) (x) argument
/openbmc/u-boot/include/linux/byteorder/
H A Dgeneric.h134 #define ___htonl(x) __cpu_to_be32(x) argument
135 #define ___htons(x) __cpu_to_be16(x) argument
136 #define ___ntohl(x) __be32_to_cpu(x) argument
137 #define ___ntohs(x) __be16_to_cpu(x) argument
139 #define htonl(x) ___htonl(x) argument
140 #define ntohl(x) ___ntohl(x) argument
141 #define htons(x) ___htons(x) argument
142 #define ntohs(x) ___ntohs(x) argument
/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c34 #define DDRCTL_REG(x, y) \ argument
39 #define DDRPHY_REG(x, y) \ argument
44 #define DDRCTL_REG_REG(x) DDRCTL_REG(x, stm32mp1_ddrctrl_reg) argument
73 #define DDRCTL_REG_TIMING(x) DDRCTL_REG(x, stm32mp1_ddrctrl_timing) argument
89 #define DDRCTL_REG_MAP(x) DDRCTL_REG(x, stm32mp1_ddrctrl_map) argument
102 #define DDRCTL_REG_PERF(x) DDRCTL_REG(x, stm32mp1_ddrctrl_perf) argument
123 #define DDRPHY_REG_REG(x) DDRPHY_REG(x, stm32mp1_ddrphy_reg) argument
138 #define DDRPHY_REG_TIMING(x) DDRPHY_REG(x, stm32mp1_ddrphy_timing) argument
152 #define DDRPHY_REG_CAL(x) DDRPHY_REG(x, stm32mp1_ddrphy_cal) argument
192 #define DDRPHY_REG_CAL(x) DDRPHY_REG(x, stm32mp1_ddrphy_cal) argument
/openbmc/u-boot/include/faraday/
H A Dftsdc010.h80 #define FTSDC010_CMD_IDX(x) (((x) & 0x3f) << 0) argument
89 #define FTSDC010_RSP_CMD_IDX(x) (((x) >> 0) & 0x3f) argument
93 #define FTSDC010_DCR_BLK_SIZE(x) (((x) & 0xf) << 0) argument
99 #define FTSDC010_DCR_DMA_TYPE(x) (((x) & 0x3) << 8) argument
107 #define FTSDC010_DCR_BLK_BYTES(x) (ffs(x) - 1) /* 1B - 2048B */ argument
185 #define FTSDC010_PCR_POWER(x) (((x) & 0xf) << 0) argument
189 #define FTSDC010_CCR_CLK_DIV(x) (((x) & 0x7f) << 0) argument
212 #define FTSDC010_FEATURE_FIFO_DEPTH(x) (((x) >> 0) & 0xff) argument
220 #define FTSDC010_REV_REVISION(x) (((x) & 0xff) >> 0) argument
221 #define FTSDC010_REV_MINOR(x) (((x) & 0xff00) >> 8) argument
[all …]
/openbmc/u-boot/drivers/soc/keystone/
H A Dkeystone_serdes.c13 #define SERDES_CMU_REGS(x) (0x0000 + (0x0c00 * (x))) argument
14 #define SERDES_LANE_REGS(x) (0x0200 + (0x200 * (x))) argument
18 #define SERDES_CMU_REG_000(x) (SERDES_CMU_REGS(x) + 0x000) argument
19 #define SERDES_CMU_REG_010(x) (SERDES_CMU_REGS(x) + 0x010) argument
21 #define SERDES_LANE_REG_000(x) (SERDES_LANE_REGS(x) + 0x000) argument
22 #define SERDES_LANE_REG_028(x) (SERDES_LANE_REGS(x) + 0x028) argument
23 #define SERDES_LANE_CTL_STATUS_REG(x) (SERDES_WIZ_REGS + 0x0020 + (4 * (x))) argument
29 #define SERDES_LANE_EN_VAL(x, y, z) (x[y] | (z << 26) | (z << 10)) argument
/openbmc/bmcweb/redfish-core/src/
H A Dfilter_expr_executor.cpp119 ValueVisitor::result_type ValueVisitor::operator()(int64_t x) in operator ()()
125 const filter_ast::QuotedString& x) in operator ()()
131 const filter_ast::UnquotedString& x) in operator ()()
197 bool ApplyFilter::operator()(const filter_ast::LogicalNot& x) in operator ()()
292 bool ApplyFilter::operator()(const filter_ast::Comparison& x) in operator ()()
371 bool ApplyFilter::operator()(const filter_ast::BooleanOp& x) in operator ()()
376 bool ApplyFilter::operator()(const filter_ast::LogicalOr& x) in operator ()()
386 bool ApplyFilter::operator()(const filter_ast::LogicalAnd& x) in operator ()()

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