1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
4 * All rights reserved.
5 */
6
7 #include <linux/clk.h>
8 #include <linux/mmc/sdio_func.h>
9 #include <linux/mmc/sdio_ids.h>
10 #include <linux/mmc/host.h>
11 #include <linux/mmc/sdio.h>
12 #include <linux/of_irq.h>
13
14 #include "netdev.h"
15 #include "cfg80211.h"
16
17 #define SDIO_MODALIAS "wilc1000_sdio"
18
19 static const struct sdio_device_id wilc_sdio_ids[] = {
20 { SDIO_DEVICE(SDIO_VENDOR_ID_MICROCHIP_WILC, SDIO_DEVICE_ID_MICROCHIP_WILC1000) },
21 { },
22 };
23 MODULE_DEVICE_TABLE(sdio, wilc_sdio_ids);
24
25 #define WILC_SDIO_BLOCK_SIZE 512
26
27 struct wilc_sdio {
28 bool irq_gpio;
29 u32 block_size;
30 bool isinit;
31 u8 *cmd53_buf;
32 };
33
34 struct sdio_cmd52 {
35 u32 read_write: 1;
36 u32 function: 3;
37 u32 raw: 1;
38 u32 address: 17;
39 u32 data: 8;
40 };
41
42 struct sdio_cmd53 {
43 u32 read_write: 1;
44 u32 function: 3;
45 u32 block_mode: 1;
46 u32 increment: 1;
47 u32 address: 17;
48 u32 count: 9;
49 u8 *buffer;
50 u32 block_size;
51 bool use_global_buf;
52 };
53
54 static const struct wilc_hif_func wilc_hif_sdio;
55
wilc_sdio_interrupt(struct sdio_func * func)56 static void wilc_sdio_interrupt(struct sdio_func *func)
57 {
58 sdio_release_host(func);
59 wilc_handle_isr(sdio_get_drvdata(func));
60 sdio_claim_host(func);
61 }
62
wilc_sdio_cmd52(struct wilc * wilc,struct sdio_cmd52 * cmd)63 static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd)
64 {
65 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
66 int ret;
67 u8 data;
68
69 sdio_claim_host(func);
70
71 func->num = cmd->function;
72 if (cmd->read_write) { /* write */
73 if (cmd->raw) {
74 sdio_writeb(func, cmd->data, cmd->address, &ret);
75 data = sdio_readb(func, cmd->address, &ret);
76 cmd->data = data;
77 } else {
78 sdio_writeb(func, cmd->data, cmd->address, &ret);
79 }
80 } else { /* read */
81 data = sdio_readb(func, cmd->address, &ret);
82 cmd->data = data;
83 }
84
85 sdio_release_host(func);
86
87 if (ret)
88 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
89 return ret;
90 }
91
wilc_sdio_cmd53(struct wilc * wilc,struct sdio_cmd53 * cmd)92 static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd)
93 {
94 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
95 int size, ret;
96 struct wilc_sdio *sdio_priv = wilc->bus_data;
97 u8 *buf = cmd->buffer;
98
99 sdio_claim_host(func);
100
101 func->num = cmd->function;
102 func->cur_blksize = cmd->block_size;
103 if (cmd->block_mode)
104 size = cmd->count * cmd->block_size;
105 else
106 size = cmd->count;
107
108 if (cmd->use_global_buf) {
109 if (size > sizeof(u32))
110 return -EINVAL;
111
112 buf = sdio_priv->cmd53_buf;
113 }
114
115 if (cmd->read_write) { /* write */
116 if (cmd->use_global_buf)
117 memcpy(buf, cmd->buffer, size);
118
119 ret = sdio_memcpy_toio(func, cmd->address, buf, size);
120 } else { /* read */
121 ret = sdio_memcpy_fromio(func, buf, cmd->address, size);
122
123 if (cmd->use_global_buf)
124 memcpy(cmd->buffer, buf, size);
125 }
126
127 sdio_release_host(func);
128
129 if (ret)
130 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
131
132 return ret;
133 }
134
wilc_sdio_probe(struct sdio_func * func,const struct sdio_device_id * id)135 static int wilc_sdio_probe(struct sdio_func *func,
136 const struct sdio_device_id *id)
137 {
138 struct wilc *wilc;
139 int ret;
140 struct wilc_sdio *sdio_priv;
141
142 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL);
143 if (!sdio_priv)
144 return -ENOMEM;
145
146 sdio_priv->cmd53_buf = kzalloc(sizeof(u32), GFP_KERNEL);
147 if (!sdio_priv->cmd53_buf) {
148 ret = -ENOMEM;
149 goto free;
150 }
151
152 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO,
153 &wilc_hif_sdio);
154 if (ret)
155 goto free;
156
157 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) {
158 struct device_node *np = func->card->dev.of_node;
159 int irq_num = of_irq_get(np, 0);
160
161 if (irq_num > 0) {
162 wilc->dev_irq_num = irq_num;
163 sdio_priv->irq_gpio = true;
164 }
165 }
166
167 sdio_set_drvdata(func, wilc);
168 wilc->bus_data = sdio_priv;
169 wilc->dev = &func->dev;
170
171 wilc->rtc_clk = devm_clk_get_optional(&func->card->dev, "rtc");
172 if (IS_ERR(wilc->rtc_clk)) {
173 ret = PTR_ERR(wilc->rtc_clk);
174 goto dispose_irq;
175 }
176 clk_prepare_enable(wilc->rtc_clk);
177
178 dev_info(&func->dev, "Driver Initializing success\n");
179 return 0;
180
181 dispose_irq:
182 irq_dispose_mapping(wilc->dev_irq_num);
183 wilc_netdev_cleanup(wilc);
184 free:
185 kfree(sdio_priv->cmd53_buf);
186 kfree(sdio_priv);
187 return ret;
188 }
189
wilc_sdio_remove(struct sdio_func * func)190 static void wilc_sdio_remove(struct sdio_func *func)
191 {
192 struct wilc *wilc = sdio_get_drvdata(func);
193 struct wilc_sdio *sdio_priv = wilc->bus_data;
194
195 clk_disable_unprepare(wilc->rtc_clk);
196 wilc_netdev_cleanup(wilc);
197 kfree(sdio_priv->cmd53_buf);
198 kfree(sdio_priv);
199 }
200
wilc_sdio_reset(struct wilc * wilc)201 static int wilc_sdio_reset(struct wilc *wilc)
202 {
203 struct sdio_cmd52 cmd;
204 int ret;
205 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
206
207 cmd.read_write = 1;
208 cmd.function = 0;
209 cmd.raw = 0;
210 cmd.address = SDIO_CCCR_ABORT;
211 cmd.data = WILC_SDIO_CCCR_ABORT_RESET;
212 ret = wilc_sdio_cmd52(wilc, &cmd);
213 if (ret) {
214 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n");
215 return ret;
216 }
217 return 0;
218 }
219
wilc_sdio_is_init(struct wilc * wilc)220 static bool wilc_sdio_is_init(struct wilc *wilc)
221 {
222 struct wilc_sdio *sdio_priv = wilc->bus_data;
223
224 return sdio_priv->isinit;
225 }
226
wilc_sdio_suspend(struct device * dev)227 static int wilc_sdio_suspend(struct device *dev)
228 {
229 struct sdio_func *func = dev_to_sdio_func(dev);
230 struct wilc *wilc = sdio_get_drvdata(func);
231 int ret;
232
233 dev_info(dev, "sdio suspend\n");
234 chip_wakeup(wilc);
235
236 if (!IS_ERR(wilc->rtc_clk))
237 clk_disable_unprepare(wilc->rtc_clk);
238
239 if (wilc->suspend_event) {
240 host_sleep_notify(wilc);
241 chip_allow_sleep(wilc);
242 }
243
244 ret = wilc_sdio_reset(wilc);
245 if (ret) {
246 dev_err(&func->dev, "Fail reset sdio\n");
247 return ret;
248 }
249 sdio_claim_host(func);
250
251 return 0;
252 }
253
wilc_sdio_enable_interrupt(struct wilc * dev)254 static int wilc_sdio_enable_interrupt(struct wilc *dev)
255 {
256 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
257 int ret = 0;
258
259 sdio_claim_host(func);
260 ret = sdio_claim_irq(func, wilc_sdio_interrupt);
261 sdio_release_host(func);
262
263 if (ret < 0) {
264 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret);
265 ret = -EIO;
266 }
267 return ret;
268 }
269
wilc_sdio_disable_interrupt(struct wilc * dev)270 static void wilc_sdio_disable_interrupt(struct wilc *dev)
271 {
272 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
273 int ret;
274
275 sdio_claim_host(func);
276 ret = sdio_release_irq(func);
277 if (ret < 0)
278 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret);
279 sdio_release_host(func);
280 }
281
282 /********************************************
283 *
284 * Function 0
285 *
286 ********************************************/
287
wilc_sdio_set_func0_csa_address(struct wilc * wilc,u32 adr)288 static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr)
289 {
290 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
291 struct sdio_cmd52 cmd;
292 int ret;
293
294 /**
295 * Review: BIG ENDIAN
296 **/
297 cmd.read_write = 1;
298 cmd.function = 0;
299 cmd.raw = 0;
300 cmd.address = WILC_SDIO_FBR_CSA_REG;
301 cmd.data = (u8)adr;
302 ret = wilc_sdio_cmd52(wilc, &cmd);
303 if (ret) {
304 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
305 cmd.address);
306 return ret;
307 }
308
309 cmd.address = WILC_SDIO_FBR_CSA_REG + 1;
310 cmd.data = (u8)(adr >> 8);
311 ret = wilc_sdio_cmd52(wilc, &cmd);
312 if (ret) {
313 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
314 cmd.address);
315 return ret;
316 }
317
318 cmd.address = WILC_SDIO_FBR_CSA_REG + 2;
319 cmd.data = (u8)(adr >> 16);
320 ret = wilc_sdio_cmd52(wilc, &cmd);
321 if (ret) {
322 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
323 cmd.address);
324 return ret;
325 }
326
327 return 0;
328 }
329
wilc_sdio_set_block_size(struct wilc * wilc,u8 func_num,u32 block_size)330 static int wilc_sdio_set_block_size(struct wilc *wilc, u8 func_num,
331 u32 block_size)
332 {
333 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
334 struct sdio_cmd52 cmd;
335 int ret;
336
337 cmd.read_write = 1;
338 cmd.function = 0;
339 cmd.raw = 0;
340 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE;
341 cmd.data = (u8)block_size;
342 ret = wilc_sdio_cmd52(wilc, &cmd);
343 if (ret) {
344 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
345 cmd.address);
346 return ret;
347 }
348
349 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE + 1;
350 cmd.data = (u8)(block_size >> 8);
351 ret = wilc_sdio_cmd52(wilc, &cmd);
352 if (ret) {
353 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
354 cmd.address);
355 return ret;
356 }
357
358 return 0;
359 }
360
361 /********************************************
362 *
363 * Sdio interfaces
364 *
365 ********************************************/
wilc_sdio_write_reg(struct wilc * wilc,u32 addr,u32 data)366 static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
367 {
368 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
369 struct wilc_sdio *sdio_priv = wilc->bus_data;
370 int ret;
371
372 cpu_to_le32s(&data);
373
374 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */
375 struct sdio_cmd52 cmd;
376
377 cmd.read_write = 1;
378 cmd.function = 0;
379 cmd.raw = 0;
380 cmd.address = addr;
381 cmd.data = data;
382 ret = wilc_sdio_cmd52(wilc, &cmd);
383 if (ret)
384 dev_err(&func->dev,
385 "Failed cmd 52, read reg (%08x) ...\n", addr);
386 } else {
387 struct sdio_cmd53 cmd;
388
389 /**
390 * set the AHB address
391 **/
392 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
393 if (ret)
394 return ret;
395
396 cmd.read_write = 1;
397 cmd.function = 0;
398 cmd.address = WILC_SDIO_FBR_DATA_REG;
399 cmd.block_mode = 0;
400 cmd.increment = 1;
401 cmd.count = sizeof(u32);
402 cmd.buffer = (u8 *)&data;
403 cmd.use_global_buf = true;
404 cmd.block_size = sdio_priv->block_size;
405 ret = wilc_sdio_cmd53(wilc, &cmd);
406 if (ret)
407 dev_err(&func->dev,
408 "Failed cmd53, write reg (%08x)...\n", addr);
409 }
410
411 return ret;
412 }
413
wilc_sdio_write(struct wilc * wilc,u32 addr,u8 * buf,u32 size)414 static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
415 {
416 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
417 struct wilc_sdio *sdio_priv = wilc->bus_data;
418 u32 block_size = sdio_priv->block_size;
419 struct sdio_cmd53 cmd;
420 int nblk, nleft, ret;
421
422 cmd.read_write = 1;
423 if (addr > 0) {
424 /**
425 * func 0 access
426 **/
427 cmd.function = 0;
428 cmd.address = WILC_SDIO_FBR_DATA_REG;
429 } else {
430 /**
431 * func 1 access
432 **/
433 cmd.function = 1;
434 cmd.address = WILC_SDIO_F1_DATA_REG;
435 }
436
437 size = ALIGN(size, 4);
438 nblk = size / block_size;
439 nleft = size % block_size;
440
441 cmd.use_global_buf = false;
442 if (nblk > 0) {
443 cmd.block_mode = 1;
444 cmd.increment = 1;
445 cmd.count = nblk;
446 cmd.buffer = buf;
447 cmd.block_size = block_size;
448 if (addr > 0) {
449 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
450 if (ret)
451 return ret;
452 }
453 ret = wilc_sdio_cmd53(wilc, &cmd);
454 if (ret) {
455 dev_err(&func->dev,
456 "Failed cmd53 [%x], block send...\n", addr);
457 return ret;
458 }
459 if (addr > 0)
460 addr += nblk * block_size;
461 buf += nblk * block_size;
462 }
463
464 if (nleft > 0) {
465 cmd.block_mode = 0;
466 cmd.increment = 1;
467 cmd.count = nleft;
468 cmd.buffer = buf;
469
470 cmd.block_size = block_size;
471
472 if (addr > 0) {
473 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
474 if (ret)
475 return ret;
476 }
477 ret = wilc_sdio_cmd53(wilc, &cmd);
478 if (ret) {
479 dev_err(&func->dev,
480 "Failed cmd53 [%x], bytes send...\n", addr);
481 return ret;
482 }
483 }
484
485 return 0;
486 }
487
wilc_sdio_read_reg(struct wilc * wilc,u32 addr,u32 * data)488 static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data)
489 {
490 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
491 struct wilc_sdio *sdio_priv = wilc->bus_data;
492 int ret;
493
494 if (addr >= 0xf0 && addr <= 0xff) { /* only vendor specific registers */
495 struct sdio_cmd52 cmd;
496
497 cmd.read_write = 0;
498 cmd.function = 0;
499 cmd.raw = 0;
500 cmd.address = addr;
501 ret = wilc_sdio_cmd52(wilc, &cmd);
502 if (ret) {
503 dev_err(&func->dev,
504 "Failed cmd 52, read reg (%08x) ...\n", addr);
505 return ret;
506 }
507 *data = cmd.data;
508 } else {
509 struct sdio_cmd53 cmd;
510
511 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
512 if (ret)
513 return ret;
514
515 cmd.read_write = 0;
516 cmd.function = 0;
517 cmd.address = WILC_SDIO_FBR_DATA_REG;
518 cmd.block_mode = 0;
519 cmd.increment = 1;
520 cmd.count = sizeof(u32);
521 cmd.buffer = (u8 *)data;
522 cmd.use_global_buf = true;
523
524 cmd.block_size = sdio_priv->block_size;
525 ret = wilc_sdio_cmd53(wilc, &cmd);
526 if (ret) {
527 dev_err(&func->dev,
528 "Failed cmd53, read reg (%08x)...\n", addr);
529 return ret;
530 }
531 }
532
533 le32_to_cpus(data);
534 return 0;
535 }
536
wilc_sdio_read(struct wilc * wilc,u32 addr,u8 * buf,u32 size)537 static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
538 {
539 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
540 struct wilc_sdio *sdio_priv = wilc->bus_data;
541 u32 block_size = sdio_priv->block_size;
542 struct sdio_cmd53 cmd;
543 int nblk, nleft, ret;
544
545 cmd.read_write = 0;
546 if (addr > 0) {
547 /**
548 * func 0 access
549 **/
550 cmd.function = 0;
551 cmd.address = WILC_SDIO_FBR_DATA_REG;
552 } else {
553 /**
554 * func 1 access
555 **/
556 cmd.function = 1;
557 cmd.address = WILC_SDIO_F1_DATA_REG;
558 }
559
560 size = ALIGN(size, 4);
561 nblk = size / block_size;
562 nleft = size % block_size;
563
564 cmd.use_global_buf = false;
565 if (nblk > 0) {
566 cmd.block_mode = 1;
567 cmd.increment = 1;
568 cmd.count = nblk;
569 cmd.buffer = buf;
570 cmd.block_size = block_size;
571 if (addr > 0) {
572 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
573 if (ret)
574 return ret;
575 }
576 ret = wilc_sdio_cmd53(wilc, &cmd);
577 if (ret) {
578 dev_err(&func->dev,
579 "Failed cmd53 [%x], block read...\n", addr);
580 return ret;
581 }
582 if (addr > 0)
583 addr += nblk * block_size;
584 buf += nblk * block_size;
585 } /* if (nblk > 0) */
586
587 if (nleft > 0) {
588 cmd.block_mode = 0;
589 cmd.increment = 1;
590 cmd.count = nleft;
591 cmd.buffer = buf;
592
593 cmd.block_size = block_size;
594
595 if (addr > 0) {
596 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
597 if (ret)
598 return ret;
599 }
600 ret = wilc_sdio_cmd53(wilc, &cmd);
601 if (ret) {
602 dev_err(&func->dev,
603 "Failed cmd53 [%x], bytes read...\n", addr);
604 return ret;
605 }
606 }
607
608 return 0;
609 }
610
611 /********************************************
612 *
613 * Bus interfaces
614 *
615 ********************************************/
616
wilc_sdio_deinit(struct wilc * wilc)617 static int wilc_sdio_deinit(struct wilc *wilc)
618 {
619 struct wilc_sdio *sdio_priv = wilc->bus_data;
620
621 sdio_priv->isinit = false;
622 return 0;
623 }
624
wilc_sdio_init(struct wilc * wilc,bool resume)625 static int wilc_sdio_init(struct wilc *wilc, bool resume)
626 {
627 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
628 struct wilc_sdio *sdio_priv = wilc->bus_data;
629 struct sdio_cmd52 cmd;
630 int loop, ret;
631 u32 chipid;
632
633 /**
634 * function 0 csa enable
635 **/
636 cmd.read_write = 1;
637 cmd.function = 0;
638 cmd.raw = 1;
639 cmd.address = SDIO_FBR_BASE(1);
640 cmd.data = SDIO_FBR_ENABLE_CSA;
641 ret = wilc_sdio_cmd52(wilc, &cmd);
642 if (ret) {
643 dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
644 return ret;
645 }
646
647 /**
648 * function 0 block size
649 **/
650 ret = wilc_sdio_set_block_size(wilc, 0, WILC_SDIO_BLOCK_SIZE);
651 if (ret) {
652 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n");
653 return ret;
654 }
655 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE;
656
657 /**
658 * enable func1 IO
659 **/
660 cmd.read_write = 1;
661 cmd.function = 0;
662 cmd.raw = 1;
663 cmd.address = SDIO_CCCR_IOEx;
664 cmd.data = WILC_SDIO_CCCR_IO_EN_FUNC1;
665 ret = wilc_sdio_cmd52(wilc, &cmd);
666 if (ret) {
667 dev_err(&func->dev,
668 "Fail cmd 52, set IOE register...\n");
669 return ret;
670 }
671
672 /**
673 * make sure func 1 is up
674 **/
675 cmd.read_write = 0;
676 cmd.function = 0;
677 cmd.raw = 0;
678 cmd.address = SDIO_CCCR_IORx;
679 loop = 3;
680 do {
681 cmd.data = 0;
682 ret = wilc_sdio_cmd52(wilc, &cmd);
683 if (ret) {
684 dev_err(&func->dev,
685 "Fail cmd 52, get IOR register...\n");
686 return ret;
687 }
688 if (cmd.data == WILC_SDIO_CCCR_IO_EN_FUNC1)
689 break;
690 } while (loop--);
691
692 if (loop <= 0) {
693 dev_err(&func->dev, "Fail func 1 is not ready...\n");
694 return -EINVAL;
695 }
696
697 /**
698 * func 1 is ready, set func 1 block size
699 **/
700 ret = wilc_sdio_set_block_size(wilc, 1, WILC_SDIO_BLOCK_SIZE);
701 if (ret) {
702 dev_err(&func->dev, "Fail set func 1 block size...\n");
703 return ret;
704 }
705
706 /**
707 * func 1 interrupt enable
708 **/
709 cmd.read_write = 1;
710 cmd.function = 0;
711 cmd.raw = 1;
712 cmd.address = SDIO_CCCR_IENx;
713 cmd.data = WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1;
714 ret = wilc_sdio_cmd52(wilc, &cmd);
715 if (ret) {
716 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
717 return ret;
718 }
719
720 /**
721 * make sure can read back chip id correctly
722 **/
723 if (!resume) {
724 ret = wilc_sdio_read_reg(wilc, WILC_CHIPID, &chipid);
725 if (ret) {
726 dev_err(&func->dev, "Fail cmd read chip id...\n");
727 return ret;
728 }
729 dev_err(&func->dev, "chipid (%08x)\n", chipid);
730 }
731
732 sdio_priv->isinit = true;
733 return 0;
734 }
735
wilc_sdio_read_size(struct wilc * wilc,u32 * size)736 static int wilc_sdio_read_size(struct wilc *wilc, u32 *size)
737 {
738 u32 tmp;
739 struct sdio_cmd52 cmd;
740
741 /**
742 * Read DMA count in words
743 **/
744 cmd.read_write = 0;
745 cmd.function = 0;
746 cmd.raw = 0;
747 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG;
748 cmd.data = 0;
749 wilc_sdio_cmd52(wilc, &cmd);
750 tmp = cmd.data;
751
752 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1;
753 cmd.data = 0;
754 wilc_sdio_cmd52(wilc, &cmd);
755 tmp |= (cmd.data << 8);
756
757 *size = tmp;
758 return 0;
759 }
760
wilc_sdio_read_int(struct wilc * wilc,u32 * int_status)761 static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status)
762 {
763 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
764 struct wilc_sdio *sdio_priv = wilc->bus_data;
765 u32 tmp;
766 u8 irq_flags;
767 struct sdio_cmd52 cmd;
768
769 wilc_sdio_read_size(wilc, &tmp);
770
771 /**
772 * Read IRQ flags
773 **/
774 if (!sdio_priv->irq_gpio) {
775 cmd.function = 1;
776 cmd.address = WILC_SDIO_EXT_IRQ_FLAG_REG;
777 } else {
778 cmd.function = 0;
779 cmd.address = WILC_SDIO_IRQ_FLAG_REG;
780 }
781 cmd.raw = 0;
782 cmd.read_write = 0;
783 cmd.data = 0;
784 wilc_sdio_cmd52(wilc, &cmd);
785 irq_flags = cmd.data;
786 tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data);
787
788 if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags))
789 dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n",
790 FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags));
791
792 *int_status = tmp;
793
794 return 0;
795 }
796
wilc_sdio_clear_int_ext(struct wilc * wilc,u32 val)797 static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val)
798 {
799 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
800 struct wilc_sdio *sdio_priv = wilc->bus_data;
801 int ret;
802 u32 reg = 0;
803
804 if (sdio_priv->irq_gpio)
805 reg = val & (BIT(MAX_NUM_INT) - 1);
806
807 /* select VMM table 0 */
808 if (val & SEL_VMM_TBL0)
809 reg |= BIT(5);
810 /* select VMM table 1 */
811 if (val & SEL_VMM_TBL1)
812 reg |= BIT(6);
813 /* enable VMM */
814 if (val & EN_VMM)
815 reg |= BIT(7);
816 if (reg) {
817 struct sdio_cmd52 cmd;
818
819 cmd.read_write = 1;
820 cmd.function = 0;
821 cmd.raw = 0;
822 cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
823 cmd.data = reg;
824
825 ret = wilc_sdio_cmd52(wilc, &cmd);
826 if (ret) {
827 dev_err(&func->dev,
828 "Failed cmd52, set (%02x) data (%d) ...\n",
829 cmd.address, __LINE__);
830 return ret;
831 }
832 }
833 return 0;
834 }
835
wilc_sdio_sync_ext(struct wilc * wilc,int nint)836 static int wilc_sdio_sync_ext(struct wilc *wilc, int nint)
837 {
838 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
839 struct wilc_sdio *sdio_priv = wilc->bus_data;
840 u32 reg;
841
842 if (nint > MAX_NUM_INT) {
843 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint);
844 return -EINVAL;
845 }
846
847 /**
848 * Disable power sequencer
849 **/
850 if (wilc_sdio_read_reg(wilc, WILC_MISC, ®)) {
851 dev_err(&func->dev, "Failed read misc reg...\n");
852 return -EINVAL;
853 }
854
855 reg &= ~BIT(8);
856 if (wilc_sdio_write_reg(wilc, WILC_MISC, reg)) {
857 dev_err(&func->dev, "Failed write misc reg...\n");
858 return -EINVAL;
859 }
860
861 if (sdio_priv->irq_gpio) {
862 u32 reg;
863 int ret, i;
864
865 /**
866 * interrupt pin mux select
867 **/
868 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®);
869 if (ret) {
870 dev_err(&func->dev, "Failed read reg (%08x)...\n",
871 WILC_PIN_MUX_0);
872 return ret;
873 }
874 reg |= BIT(8);
875 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
876 if (ret) {
877 dev_err(&func->dev, "Failed write reg (%08x)...\n",
878 WILC_PIN_MUX_0);
879 return ret;
880 }
881
882 /**
883 * interrupt enable
884 **/
885 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®);
886 if (ret) {
887 dev_err(&func->dev, "Failed read reg (%08x)...\n",
888 WILC_INTR_ENABLE);
889 return ret;
890 }
891
892 for (i = 0; (i < 5) && (nint > 0); i++, nint--)
893 reg |= BIT((27 + i));
894 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
895 if (ret) {
896 dev_err(&func->dev, "Failed write reg (%08x)...\n",
897 WILC_INTR_ENABLE);
898 return ret;
899 }
900 if (nint) {
901 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®);
902 if (ret) {
903 dev_err(&func->dev,
904 "Failed read reg (%08x)...\n",
905 WILC_INTR2_ENABLE);
906 return ret;
907 }
908
909 for (i = 0; (i < 3) && (nint > 0); i++, nint--)
910 reg |= BIT(i);
911
912 ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg);
913 if (ret) {
914 dev_err(&func->dev,
915 "Failed write reg (%08x)...\n",
916 WILC_INTR2_ENABLE);
917 return ret;
918 }
919 }
920 }
921 return 0;
922 }
923
924 /* Global sdio HIF function table */
925 static const struct wilc_hif_func wilc_hif_sdio = {
926 .hif_init = wilc_sdio_init,
927 .hif_deinit = wilc_sdio_deinit,
928 .hif_read_reg = wilc_sdio_read_reg,
929 .hif_write_reg = wilc_sdio_write_reg,
930 .hif_block_rx = wilc_sdio_read,
931 .hif_block_tx = wilc_sdio_write,
932 .hif_read_int = wilc_sdio_read_int,
933 .hif_clear_int_ext = wilc_sdio_clear_int_ext,
934 .hif_read_size = wilc_sdio_read_size,
935 .hif_block_tx_ext = wilc_sdio_write,
936 .hif_block_rx_ext = wilc_sdio_read,
937 .hif_sync_ext = wilc_sdio_sync_ext,
938 .enable_interrupt = wilc_sdio_enable_interrupt,
939 .disable_interrupt = wilc_sdio_disable_interrupt,
940 .hif_reset = wilc_sdio_reset,
941 .hif_is_init = wilc_sdio_is_init,
942 };
943
wilc_sdio_resume(struct device * dev)944 static int wilc_sdio_resume(struct device *dev)
945 {
946 struct sdio_func *func = dev_to_sdio_func(dev);
947 struct wilc *wilc = sdio_get_drvdata(func);
948
949 dev_info(dev, "sdio resume\n");
950 sdio_release_host(func);
951 chip_wakeup(wilc);
952 wilc_sdio_init(wilc, true);
953
954 if (wilc->suspend_event)
955 host_wakeup_notify(wilc);
956
957 chip_allow_sleep(wilc);
958
959 return 0;
960 }
961
962 static const struct of_device_id wilc_of_match[] = {
963 { .compatible = "microchip,wilc1000", },
964 { /* sentinel */ }
965 };
966 MODULE_DEVICE_TABLE(of, wilc_of_match);
967
968 static const struct dev_pm_ops wilc_sdio_pm_ops = {
969 .suspend = wilc_sdio_suspend,
970 .resume = wilc_sdio_resume,
971 };
972
973 static struct sdio_driver wilc_sdio_driver = {
974 .name = SDIO_MODALIAS,
975 .id_table = wilc_sdio_ids,
976 .probe = wilc_sdio_probe,
977 .remove = wilc_sdio_remove,
978 .drv = {
979 .pm = &wilc_sdio_pm_ops,
980 .of_match_table = wilc_of_match,
981 }
982 };
983 module_driver(wilc_sdio_driver,
984 sdio_register_driver,
985 sdio_unregister_driver);
986 MODULE_LICENSE("GPL");
987