xref: /openbmc/linux/sound/soc/codecs/wcd938x-sdw.c (revision 733677fc)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2021, Linaro Limited
3 
4 #include <linux/module.h>
5 #include <linux/slab.h>
6 #include <linux/platform_device.h>
7 #include <linux/device.h>
8 #include <linux/kernel.h>
9 #include <linux/component.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/of.h>
14 #include <linux/soundwire/sdw.h>
15 #include <linux/soundwire/sdw_type.h>
16 #include <linux/soundwire/sdw_registers.h>
17 #include <linux/regmap.h>
18 #include <sound/soc.h>
19 #include <sound/soc-dapm.h>
20 #include "wcd938x.h"
21 
22 #define SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(m) (0xE0 + 0x10 * (m))
23 
24 static struct wcd938x_sdw_ch_info wcd938x_sdw_rx_ch_info[] = {
25 	WCD_SDW_CH(WCD938X_HPH_L, WCD938X_HPH_PORT, BIT(0)),
26 	WCD_SDW_CH(WCD938X_HPH_R, WCD938X_HPH_PORT, BIT(1)),
27 	WCD_SDW_CH(WCD938X_CLSH, WCD938X_CLSH_PORT, BIT(0)),
28 	WCD_SDW_CH(WCD938X_COMP_L, WCD938X_COMP_PORT, BIT(0)),
29 	WCD_SDW_CH(WCD938X_COMP_R, WCD938X_COMP_PORT, BIT(1)),
30 	WCD_SDW_CH(WCD938X_LO, WCD938X_LO_PORT, BIT(0)),
31 	WCD_SDW_CH(WCD938X_DSD_L, WCD938X_DSD_PORT, BIT(0)),
32 	WCD_SDW_CH(WCD938X_DSD_R, WCD938X_DSD_PORT, BIT(1)),
33 };
34 
35 static struct wcd938x_sdw_ch_info wcd938x_sdw_tx_ch_info[] = {
36 	WCD_SDW_CH(WCD938X_ADC1, WCD938X_ADC_1_2_PORT, BIT(0)),
37 	WCD_SDW_CH(WCD938X_ADC2, WCD938X_ADC_1_2_PORT, BIT(1)),
38 	WCD_SDW_CH(WCD938X_ADC3, WCD938X_ADC_3_4_PORT, BIT(0)),
39 	WCD_SDW_CH(WCD938X_ADC4, WCD938X_ADC_3_4_PORT, BIT(1)),
40 	WCD_SDW_CH(WCD938X_DMIC0, WCD938X_DMIC_0_3_MBHC_PORT, BIT(0)),
41 	WCD_SDW_CH(WCD938X_DMIC1, WCD938X_DMIC_0_3_MBHC_PORT, BIT(1)),
42 	WCD_SDW_CH(WCD938X_MBHC, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)),
43 	WCD_SDW_CH(WCD938X_DMIC2, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)),
44 	WCD_SDW_CH(WCD938X_DMIC3, WCD938X_DMIC_0_3_MBHC_PORT, BIT(3)),
45 	WCD_SDW_CH(WCD938X_DMIC4, WCD938X_DMIC_4_7_PORT, BIT(0)),
46 	WCD_SDW_CH(WCD938X_DMIC5, WCD938X_DMIC_4_7_PORT, BIT(1)),
47 	WCD_SDW_CH(WCD938X_DMIC6, WCD938X_DMIC_4_7_PORT, BIT(2)),
48 	WCD_SDW_CH(WCD938X_DMIC7, WCD938X_DMIC_4_7_PORT, BIT(3)),
49 };
50 
51 static struct sdw_dpn_prop wcd938x_dpn_prop[WCD938X_MAX_SWR_PORTS] = {
52 	{
53 		.num = 1,
54 		.type = SDW_DPN_SIMPLE,
55 		.min_ch = 1,
56 		.max_ch = 8,
57 		.simple_ch_prep_sm = true,
58 	}, {
59 		.num = 2,
60 		.type = SDW_DPN_SIMPLE,
61 		.min_ch = 1,
62 		.max_ch = 4,
63 		.simple_ch_prep_sm = true,
64 	}, {
65 		.num = 3,
66 		.type = SDW_DPN_SIMPLE,
67 		.min_ch = 1,
68 		.max_ch = 4,
69 		.simple_ch_prep_sm = true,
70 	}, {
71 		.num = 4,
72 		.type = SDW_DPN_SIMPLE,
73 		.min_ch = 1,
74 		.max_ch = 4,
75 		.simple_ch_prep_sm = true,
76 	}, {
77 		.num = 5,
78 		.type = SDW_DPN_SIMPLE,
79 		.min_ch = 1,
80 		.max_ch = 4,
81 		.simple_ch_prep_sm = true,
82 	}
83 };
84 
wcd938x_sdw_device_get(struct device_node * np)85 struct device *wcd938x_sdw_device_get(struct device_node *np)
86 {
87 	return bus_find_device_by_of_node(&sdw_bus_type, np);
88 
89 }
90 EXPORT_SYMBOL_GPL(wcd938x_sdw_device_get);
91 
wcd938x_swr_get_current_bank(struct sdw_slave * sdev)92 int wcd938x_swr_get_current_bank(struct sdw_slave *sdev)
93 {
94 	int bank;
95 
96 	bank  = sdw_read(sdev, SDW_SCP_CTRL);
97 
98 	return ((bank & 0x40) ? 1 : 0);
99 }
100 EXPORT_SYMBOL_GPL(wcd938x_swr_get_current_bank);
101 
wcd938x_sdw_hw_params(struct wcd938x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)102 int wcd938x_sdw_hw_params(struct wcd938x_sdw_priv *wcd,
103 			  struct snd_pcm_substream *substream,
104 			  struct snd_pcm_hw_params *params,
105 			  struct snd_soc_dai *dai)
106 {
107 	struct sdw_port_config port_config[WCD938X_MAX_SWR_PORTS];
108 	unsigned long ch_mask;
109 	int i, j;
110 
111 	wcd->sconfig.ch_count = 1;
112 	wcd->active_ports = 0;
113 	for (i = 0; i < WCD938X_MAX_SWR_PORTS; i++) {
114 		ch_mask = wcd->port_config[i].ch_mask;
115 
116 		if (!ch_mask)
117 			continue;
118 
119 		for_each_set_bit(j, &ch_mask, 4)
120 			wcd->sconfig.ch_count++;
121 
122 		port_config[wcd->active_ports] = wcd->port_config[i];
123 		wcd->active_ports++;
124 	}
125 
126 	wcd->sconfig.bps = 1;
127 	wcd->sconfig.frame_rate =  params_rate(params);
128 	if (wcd->is_tx)
129 		wcd->sconfig.direction = SDW_DATA_DIR_TX;
130 	else
131 		wcd->sconfig.direction = SDW_DATA_DIR_RX;
132 
133 	wcd->sconfig.type = SDW_STREAM_PCM;
134 
135 	return sdw_stream_add_slave(wcd->sdev, &wcd->sconfig,
136 				    &port_config[0], wcd->active_ports,
137 				    wcd->sruntime);
138 }
139 EXPORT_SYMBOL_GPL(wcd938x_sdw_hw_params);
140 
wcd938x_sdw_free(struct wcd938x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_soc_dai * dai)141 int wcd938x_sdw_free(struct wcd938x_sdw_priv *wcd,
142 		     struct snd_pcm_substream *substream,
143 		     struct snd_soc_dai *dai)
144 {
145 	sdw_stream_remove_slave(wcd->sdev, wcd->sruntime);
146 
147 	return 0;
148 }
149 EXPORT_SYMBOL_GPL(wcd938x_sdw_free);
150 
wcd938x_sdw_set_sdw_stream(struct wcd938x_sdw_priv * wcd,struct snd_soc_dai * dai,void * stream,int direction)151 int wcd938x_sdw_set_sdw_stream(struct wcd938x_sdw_priv *wcd,
152 			       struct snd_soc_dai *dai,
153 			       void *stream, int direction)
154 {
155 	wcd->sruntime = stream;
156 
157 	return 0;
158 }
159 EXPORT_SYMBOL_GPL(wcd938x_sdw_set_sdw_stream);
160 
wcd9380_update_status(struct sdw_slave * slave,enum sdw_slave_status status)161 static int wcd9380_update_status(struct sdw_slave *slave,
162 				 enum sdw_slave_status status)
163 {
164 	struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
165 
166 	if (wcd->regmap && (status == SDW_SLAVE_ATTACHED)) {
167 		/* Write out any cached changes that happened between probe and attach */
168 		regcache_cache_only(wcd->regmap, false);
169 		return regcache_sync(wcd->regmap);
170 	}
171 
172 	return 0;
173 }
174 
wcd9380_bus_config(struct sdw_slave * slave,struct sdw_bus_params * params)175 static int wcd9380_bus_config(struct sdw_slave *slave,
176 			      struct sdw_bus_params *params)
177 {
178 	sdw_write(slave, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(params->next_bank),  0x01);
179 
180 	return 0;
181 }
182 
wcd9380_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)183 static int wcd9380_interrupt_callback(struct sdw_slave *slave,
184 				      struct sdw_slave_intr_status *status)
185 {
186 	struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
187 	struct irq_domain *slave_irq = wcd->slave_irq;
188 	u32 sts1, sts2, sts3;
189 
190 	do {
191 		handle_nested_irq(irq_find_mapping(slave_irq, 0));
192 		regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_0, &sts1);
193 		regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_1, &sts2);
194 		regmap_read(wcd->regmap, WCD938X_DIGITAL_INTR_STATUS_2, &sts3);
195 
196 	} while (sts1 || sts2 || sts3);
197 
198 	return IRQ_HANDLED;
199 }
200 
201 static const struct reg_default wcd938x_defaults[] = {
202 	{WCD938X_ANA_PAGE_REGISTER,                            0x00},
203 	{WCD938X_ANA_BIAS,                                     0x00},
204 	{WCD938X_ANA_RX_SUPPLIES,                              0x00},
205 	{WCD938X_ANA_HPH,                                      0x0C},
206 	{WCD938X_ANA_EAR,                                      0x00},
207 	{WCD938X_ANA_EAR_COMPANDER_CTL,                        0x02},
208 	{WCD938X_ANA_TX_CH1,                                   0x20},
209 	{WCD938X_ANA_TX_CH2,                                   0x00},
210 	{WCD938X_ANA_TX_CH3,                                   0x20},
211 	{WCD938X_ANA_TX_CH4,                                   0x00},
212 	{WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC,                 0x00},
213 	{WCD938X_ANA_MICB3_DSP_EN_LOGIC,                       0x00},
214 	{WCD938X_ANA_MBHC_MECH,                                0x39},
215 	{WCD938X_ANA_MBHC_ELECT,                               0x08},
216 	{WCD938X_ANA_MBHC_ZDET,                                0x00},
217 	{WCD938X_ANA_MBHC_RESULT_1,                            0x00},
218 	{WCD938X_ANA_MBHC_RESULT_2,                            0x00},
219 	{WCD938X_ANA_MBHC_RESULT_3,                            0x00},
220 	{WCD938X_ANA_MBHC_BTN0,                                0x00},
221 	{WCD938X_ANA_MBHC_BTN1,                                0x10},
222 	{WCD938X_ANA_MBHC_BTN2,                                0x20},
223 	{WCD938X_ANA_MBHC_BTN3,                                0x30},
224 	{WCD938X_ANA_MBHC_BTN4,                                0x40},
225 	{WCD938X_ANA_MBHC_BTN5,                                0x50},
226 	{WCD938X_ANA_MBHC_BTN6,                                0x60},
227 	{WCD938X_ANA_MBHC_BTN7,                                0x70},
228 	{WCD938X_ANA_MICB1,                                    0x10},
229 	{WCD938X_ANA_MICB2,                                    0x10},
230 	{WCD938X_ANA_MICB2_RAMP,                               0x00},
231 	{WCD938X_ANA_MICB3,                                    0x10},
232 	{WCD938X_ANA_MICB4,                                    0x10},
233 	{WCD938X_BIAS_CTL,                                     0x2A},
234 	{WCD938X_BIAS_VBG_FINE_ADJ,                            0x55},
235 	{WCD938X_LDOL_VDDCX_ADJUST,                            0x01},
236 	{WCD938X_LDOL_DISABLE_LDOL,                            0x00},
237 	{WCD938X_MBHC_CTL_CLK,                                 0x00},
238 	{WCD938X_MBHC_CTL_ANA,                                 0x00},
239 	{WCD938X_MBHC_CTL_SPARE_1,                             0x00},
240 	{WCD938X_MBHC_CTL_SPARE_2,                             0x00},
241 	{WCD938X_MBHC_CTL_BCS,                                 0x00},
242 	{WCD938X_MBHC_MOISTURE_DET_FSM_STATUS,                 0x00},
243 	{WCD938X_MBHC_TEST_CTL,                                0x00},
244 	{WCD938X_LDOH_MODE,                                    0x2B},
245 	{WCD938X_LDOH_BIAS,                                    0x68},
246 	{WCD938X_LDOH_STB_LOADS,                               0x00},
247 	{WCD938X_LDOH_SLOWRAMP,                                0x50},
248 	{WCD938X_MICB1_TEST_CTL_1,                             0x1A},
249 	{WCD938X_MICB1_TEST_CTL_2,                             0x00},
250 	{WCD938X_MICB1_TEST_CTL_3,                             0xA4},
251 	{WCD938X_MICB2_TEST_CTL_1,                             0x1A},
252 	{WCD938X_MICB2_TEST_CTL_2,                             0x00},
253 	{WCD938X_MICB2_TEST_CTL_3,                             0x24},
254 	{WCD938X_MICB3_TEST_CTL_1,                             0x1A},
255 	{WCD938X_MICB3_TEST_CTL_2,                             0x00},
256 	{WCD938X_MICB3_TEST_CTL_3,                             0xA4},
257 	{WCD938X_MICB4_TEST_CTL_1,                             0x1A},
258 	{WCD938X_MICB4_TEST_CTL_2,                             0x00},
259 	{WCD938X_MICB4_TEST_CTL_3,                             0xA4},
260 	{WCD938X_TX_COM_ADC_VCM,                               0x39},
261 	{WCD938X_TX_COM_BIAS_ATEST,                            0xE0},
262 	{WCD938X_TX_COM_SPARE1,                                0x00},
263 	{WCD938X_TX_COM_SPARE2,                                0x00},
264 	{WCD938X_TX_COM_TXFE_DIV_CTL,                          0x22},
265 	{WCD938X_TX_COM_TXFE_DIV_START,                        0x00},
266 	{WCD938X_TX_COM_SPARE3,                                0x00},
267 	{WCD938X_TX_COM_SPARE4,                                0x00},
268 	{WCD938X_TX_1_2_TEST_EN,                               0xCC},
269 	{WCD938X_TX_1_2_ADC_IB,                                0xE9},
270 	{WCD938X_TX_1_2_ATEST_REFCTL,                          0x0A},
271 	{WCD938X_TX_1_2_TEST_CTL,                              0x38},
272 	{WCD938X_TX_1_2_TEST_BLK_EN1,                          0xFF},
273 	{WCD938X_TX_1_2_TXFE1_CLKDIV,                          0x00},
274 	{WCD938X_TX_1_2_SAR2_ERR,                              0x00},
275 	{WCD938X_TX_1_2_SAR1_ERR,                              0x00},
276 	{WCD938X_TX_3_4_TEST_EN,                               0xCC},
277 	{WCD938X_TX_3_4_ADC_IB,                                0xE9},
278 	{WCD938X_TX_3_4_ATEST_REFCTL,                          0x0A},
279 	{WCD938X_TX_3_4_TEST_CTL,                              0x38},
280 	{WCD938X_TX_3_4_TEST_BLK_EN3,                          0xFF},
281 	{WCD938X_TX_3_4_TXFE3_CLKDIV,                          0x00},
282 	{WCD938X_TX_3_4_SAR4_ERR,                              0x00},
283 	{WCD938X_TX_3_4_SAR3_ERR,                              0x00},
284 	{WCD938X_TX_3_4_TEST_BLK_EN2,                          0xFB},
285 	{WCD938X_TX_3_4_TXFE2_CLKDIV,                          0x00},
286 	{WCD938X_TX_3_4_SPARE1,                                0x00},
287 	{WCD938X_TX_3_4_TEST_BLK_EN4,                          0xFB},
288 	{WCD938X_TX_3_4_TXFE4_CLKDIV,                          0x00},
289 	{WCD938X_TX_3_4_SPARE2,                                0x00},
290 	{WCD938X_CLASSH_MODE_1,                                0x40},
291 	{WCD938X_CLASSH_MODE_2,                                0x3A},
292 	{WCD938X_CLASSH_MODE_3,                                0x00},
293 	{WCD938X_CLASSH_CTRL_VCL_1,                            0x70},
294 	{WCD938X_CLASSH_CTRL_VCL_2,                            0x82},
295 	{WCD938X_CLASSH_CTRL_CCL_1,                            0x31},
296 	{WCD938X_CLASSH_CTRL_CCL_2,                            0x80},
297 	{WCD938X_CLASSH_CTRL_CCL_3,                            0x80},
298 	{WCD938X_CLASSH_CTRL_CCL_4,                            0x51},
299 	{WCD938X_CLASSH_CTRL_CCL_5,                            0x00},
300 	{WCD938X_CLASSH_BUCK_TMUX_A_D,                         0x00},
301 	{WCD938X_CLASSH_BUCK_SW_DRV_CNTL,                      0x77},
302 	{WCD938X_CLASSH_SPARE,                                 0x00},
303 	{WCD938X_FLYBACK_EN,                                   0x4E},
304 	{WCD938X_FLYBACK_VNEG_CTRL_1,                          0x0B},
305 	{WCD938X_FLYBACK_VNEG_CTRL_2,                          0x45},
306 	{WCD938X_FLYBACK_VNEG_CTRL_3,                          0x74},
307 	{WCD938X_FLYBACK_VNEG_CTRL_4,                          0x7F},
308 	{WCD938X_FLYBACK_VNEG_CTRL_5,                          0x83},
309 	{WCD938X_FLYBACK_VNEG_CTRL_6,                          0x98},
310 	{WCD938X_FLYBACK_VNEG_CTRL_7,                          0xA9},
311 	{WCD938X_FLYBACK_VNEG_CTRL_8,                          0x68},
312 	{WCD938X_FLYBACK_VNEG_CTRL_9,                          0x64},
313 	{WCD938X_FLYBACK_VNEGDAC_CTRL_1,                       0xED},
314 	{WCD938X_FLYBACK_VNEGDAC_CTRL_2,                       0xF0},
315 	{WCD938X_FLYBACK_VNEGDAC_CTRL_3,                       0xA6},
316 	{WCD938X_FLYBACK_CTRL_1,                               0x65},
317 	{WCD938X_FLYBACK_TEST_CTL,                             0x00},
318 	{WCD938X_RX_AUX_SW_CTL,                                0x00},
319 	{WCD938X_RX_PA_AUX_IN_CONN,                            0x01},
320 	{WCD938X_RX_TIMER_DIV,                                 0x32},
321 	{WCD938X_RX_OCP_CTL,                                   0x1F},
322 	{WCD938X_RX_OCP_COUNT,                                 0x77},
323 	{WCD938X_RX_BIAS_EAR_DAC,                              0xA0},
324 	{WCD938X_RX_BIAS_EAR_AMP,                              0xAA},
325 	{WCD938X_RX_BIAS_HPH_LDO,                              0xA9},
326 	{WCD938X_RX_BIAS_HPH_PA,                               0xAA},
327 	{WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2,                    0x8A},
328 	{WCD938X_RX_BIAS_HPH_RDAC_LDO,                         0x88},
329 	{WCD938X_RX_BIAS_HPH_CNP1,                             0x82},
330 	{WCD938X_RX_BIAS_HPH_LOWPOWER,                         0x82},
331 	{WCD938X_RX_BIAS_AUX_DAC,                              0xA0},
332 	{WCD938X_RX_BIAS_AUX_AMP,                              0xAA},
333 	{WCD938X_RX_BIAS_VNEGDAC_BLEEDER,                      0x50},
334 	{WCD938X_RX_BIAS_MISC,                                 0x00},
335 	{WCD938X_RX_BIAS_BUCK_RST,                             0x08},
336 	{WCD938X_RX_BIAS_BUCK_VREF_ERRAMP,                     0x44},
337 	{WCD938X_RX_BIAS_FLYB_ERRAMP,                          0x40},
338 	{WCD938X_RX_BIAS_FLYB_BUFF,                            0xAA},
339 	{WCD938X_RX_BIAS_FLYB_MID_RST,                         0x14},
340 	{WCD938X_HPH_L_STATUS,                                 0x04},
341 	{WCD938X_HPH_R_STATUS,                                 0x04},
342 	{WCD938X_HPH_CNP_EN,                                   0x80},
343 	{WCD938X_HPH_CNP_WG_CTL,                               0x9A},
344 	{WCD938X_HPH_CNP_WG_TIME,                              0x14},
345 	{WCD938X_HPH_OCP_CTL,                                  0x28},
346 	{WCD938X_HPH_AUTO_CHOP,                                0x16},
347 	{WCD938X_HPH_CHOP_CTL,                                 0x83},
348 	{WCD938X_HPH_PA_CTL1,                                  0x46},
349 	{WCD938X_HPH_PA_CTL2,                                  0x50},
350 	{WCD938X_HPH_L_EN,                                     0x80},
351 	{WCD938X_HPH_L_TEST,                                   0xE0},
352 	{WCD938X_HPH_L_ATEST,                                  0x50},
353 	{WCD938X_HPH_R_EN,                                     0x80},
354 	{WCD938X_HPH_R_TEST,                                   0xE0},
355 	{WCD938X_HPH_R_ATEST,                                  0x54},
356 	{WCD938X_HPH_RDAC_CLK_CTL1,                            0x99},
357 	{WCD938X_HPH_RDAC_CLK_CTL2,                            0x9B},
358 	{WCD938X_HPH_RDAC_LDO_CTL,                             0x33},
359 	{WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL,                     0x00},
360 	{WCD938X_HPH_REFBUFF_UHQA_CTL,                         0x68},
361 	{WCD938X_HPH_REFBUFF_LP_CTL,                           0x0E},
362 	{WCD938X_HPH_L_DAC_CTL,                                0x20},
363 	{WCD938X_HPH_R_DAC_CTL,                                0x20},
364 	{WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL,               0x55},
365 	{WCD938X_HPH_SURGE_HPHLR_SURGE_EN,                     0x19},
366 	{WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1,                  0xA0},
367 	{WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS,                 0x00},
368 	{WCD938X_EAR_EAR_EN_REG,                               0x22},
369 	{WCD938X_EAR_EAR_PA_CON,                               0x44},
370 	{WCD938X_EAR_EAR_SP_CON,                               0xDB},
371 	{WCD938X_EAR_EAR_DAC_CON,                              0x80},
372 	{WCD938X_EAR_EAR_CNP_FSM_CON,                          0xB2},
373 	{WCD938X_EAR_TEST_CTL,                                 0x00},
374 	{WCD938X_EAR_STATUS_REG_1,                             0x00},
375 	{WCD938X_EAR_STATUS_REG_2,                             0x08},
376 	{WCD938X_ANA_NEW_PAGE_REGISTER,                        0x00},
377 	{WCD938X_HPH_NEW_ANA_HPH2,                             0x00},
378 	{WCD938X_HPH_NEW_ANA_HPH3,                             0x00},
379 	{WCD938X_SLEEP_CTL,                                    0x16},
380 	{WCD938X_SLEEP_WATCHDOG_CTL,                           0x00},
381 	{WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL,                 0x00},
382 	{WCD938X_MBHC_NEW_CTL_1,                               0x02},
383 	{WCD938X_MBHC_NEW_CTL_2,                               0x05},
384 	{WCD938X_MBHC_NEW_PLUG_DETECT_CTL,                     0xE9},
385 	{WCD938X_MBHC_NEW_ZDET_ANA_CTL,                        0x0F},
386 	{WCD938X_MBHC_NEW_ZDET_RAMP_CTL,                       0x00},
387 	{WCD938X_MBHC_NEW_FSM_STATUS,                          0x00},
388 	{WCD938X_MBHC_NEW_ADC_RESULT,                          0x00},
389 	{WCD938X_TX_NEW_AMIC_MUX_CFG,                          0x00},
390 	{WCD938X_AUX_AUXPA,                                    0x00},
391 	{WCD938X_LDORXTX_MODE,                                 0x0C},
392 	{WCD938X_LDORXTX_CONFIG,                               0x10},
393 	{WCD938X_DIE_CRACK_DIE_CRK_DET_EN,                     0x00},
394 	{WCD938X_DIE_CRACK_DIE_CRK_DET_OUT,                    0x00},
395 	{WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL,                    0x40},
396 	{WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L,                   0x81},
397 	{WCD938X_HPH_NEW_INT_RDAC_VREF_CTL,                    0x10},
398 	{WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL,                0x00},
399 	{WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R,                   0x81},
400 	{WCD938X_HPH_NEW_INT_PA_MISC1,                         0x22},
401 	{WCD938X_HPH_NEW_INT_PA_MISC2,                         0x00},
402 	{WCD938X_HPH_NEW_INT_PA_RDAC_MISC,                     0x00},
403 	{WCD938X_HPH_NEW_INT_HPH_TIMER1,                       0xFE},
404 	{WCD938X_HPH_NEW_INT_HPH_TIMER2,                       0x02},
405 	{WCD938X_HPH_NEW_INT_HPH_TIMER3,                       0x4E},
406 	{WCD938X_HPH_NEW_INT_HPH_TIMER4,                       0x54},
407 	{WCD938X_HPH_NEW_INT_PA_RDAC_MISC2,                    0x00},
408 	{WCD938X_HPH_NEW_INT_PA_RDAC_MISC3,                    0x00},
409 	{WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW,               0x90},
410 	{WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW,               0x90},
411 	{WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI,              0x62},
412 	{WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP,                 0x01},
413 	{WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP,                   0x11},
414 	{WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL,            0x57},
415 	{WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL,       0x01},
416 	{WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT,                0x00},
417 	{WCD938X_MBHC_NEW_INT_SPARE_2,                         0x00},
418 	{WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON,                  0xA8},
419 	{WCD938X_EAR_INT_NEW_CNP_VCM_CON1,                     0x42},
420 	{WCD938X_EAR_INT_NEW_CNP_VCM_CON2,                     0x22},
421 	{WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS,                 0x00},
422 	{WCD938X_AUX_INT_EN_REG,                               0x00},
423 	{WCD938X_AUX_INT_PA_CTRL,                              0x06},
424 	{WCD938X_AUX_INT_SP_CTRL,                              0xD2},
425 	{WCD938X_AUX_INT_DAC_CTRL,                             0x80},
426 	{WCD938X_AUX_INT_CLK_CTRL,                             0x50},
427 	{WCD938X_AUX_INT_TEST_CTRL,                            0x00},
428 	{WCD938X_AUX_INT_STATUS_REG,                           0x00},
429 	{WCD938X_AUX_INT_MISC,                                 0x00},
430 	{WCD938X_LDORXTX_INT_BIAS,                             0x6E},
431 	{WCD938X_LDORXTX_INT_STB_LOADS_DTEST,                  0x50},
432 	{WCD938X_LDORXTX_INT_TEST0,                            0x1C},
433 	{WCD938X_LDORXTX_INT_STARTUP_TIMER,                    0xFF},
434 	{WCD938X_LDORXTX_INT_TEST1,                            0x1F},
435 	{WCD938X_LDORXTX_INT_STATUS,                           0x00},
436 	{WCD938X_SLEEP_INT_WATCHDOG_CTL_1,                     0x0A},
437 	{WCD938X_SLEEP_INT_WATCHDOG_CTL_2,                     0x0A},
438 	{WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1,               0x02},
439 	{WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2,               0x60},
440 	{WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2,               0xFF},
441 	{WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1,               0x7F},
442 	{WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0,               0x3F},
443 	{WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M,          0x1F},
444 	{WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M,          0x0F},
445 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1,          0xD7},
446 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0,            0xC8},
447 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP,           0xC6},
448 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1,      0xD5},
449 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0,        0xCA},
450 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP,       0x05},
451 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0,    0xA5},
452 	{WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP,       0x13},
453 	{WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1,             0x88},
454 	{WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP,            0x42},
455 	{WCD938X_TX_COM_NEW_INT_TXADC_INT_L2,                  0xFF},
456 	{WCD938X_TX_COM_NEW_INT_TXADC_INT_L1,                  0x64},
457 	{WCD938X_TX_COM_NEW_INT_TXADC_INT_L0,                  0x64},
458 	{WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP,                 0x77},
459 	{WCD938X_DIGITAL_PAGE_REGISTER,                        0x00},
460 	{WCD938X_DIGITAL_CHIP_ID0,                             0x00},
461 	{WCD938X_DIGITAL_CHIP_ID1,                             0x00},
462 	{WCD938X_DIGITAL_CHIP_ID2,                             0x0D},
463 	{WCD938X_DIGITAL_CHIP_ID3,                             0x01},
464 	{WCD938X_DIGITAL_SWR_TX_CLK_RATE,                      0x00},
465 	{WCD938X_DIGITAL_CDC_RST_CTL,                          0x03},
466 	{WCD938X_DIGITAL_TOP_CLK_CFG,                          0x00},
467 	{WCD938X_DIGITAL_CDC_ANA_CLK_CTL,                      0x00},
468 	{WCD938X_DIGITAL_CDC_DIG_CLK_CTL,                      0xF0},
469 	{WCD938X_DIGITAL_SWR_RST_EN,                           0x00},
470 	{WCD938X_DIGITAL_CDC_PATH_MODE,                        0x55},
471 	{WCD938X_DIGITAL_CDC_RX_RST,                           0x00},
472 	{WCD938X_DIGITAL_CDC_RX0_CTL,                          0xFC},
473 	{WCD938X_DIGITAL_CDC_RX1_CTL,                          0xFC},
474 	{WCD938X_DIGITAL_CDC_RX2_CTL,                          0xFC},
475 	{WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1,                  0x00},
476 	{WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3,                  0x00},
477 	{WCD938X_DIGITAL_CDC_COMP_CTL_0,                       0x00},
478 	{WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL,                   0x1E},
479 	{WCD938X_DIGITAL_CDC_HPH_DSM_A1_0,                     0x00},
480 	{WCD938X_DIGITAL_CDC_HPH_DSM_A1_1,                     0x01},
481 	{WCD938X_DIGITAL_CDC_HPH_DSM_A2_0,                     0x63},
482 	{WCD938X_DIGITAL_CDC_HPH_DSM_A2_1,                     0x04},
483 	{WCD938X_DIGITAL_CDC_HPH_DSM_A3_0,                     0xAC},
484 	{WCD938X_DIGITAL_CDC_HPH_DSM_A3_1,                     0x04},
485 	{WCD938X_DIGITAL_CDC_HPH_DSM_A4_0,                     0x1A},
486 	{WCD938X_DIGITAL_CDC_HPH_DSM_A4_1,                     0x03},
487 	{WCD938X_DIGITAL_CDC_HPH_DSM_A5_0,                     0xBC},
488 	{WCD938X_DIGITAL_CDC_HPH_DSM_A5_1,                     0x02},
489 	{WCD938X_DIGITAL_CDC_HPH_DSM_A6_0,                     0xC7},
490 	{WCD938X_DIGITAL_CDC_HPH_DSM_A7_0,                     0xF8},
491 	{WCD938X_DIGITAL_CDC_HPH_DSM_C_0,                      0x47},
492 	{WCD938X_DIGITAL_CDC_HPH_DSM_C_1,                      0x43},
493 	{WCD938X_DIGITAL_CDC_HPH_DSM_C_2,                      0xB1},
494 	{WCD938X_DIGITAL_CDC_HPH_DSM_C_3,                      0x17},
495 	{WCD938X_DIGITAL_CDC_HPH_DSM_R1,                       0x4D},
496 	{WCD938X_DIGITAL_CDC_HPH_DSM_R2,                       0x29},
497 	{WCD938X_DIGITAL_CDC_HPH_DSM_R3,                       0x34},
498 	{WCD938X_DIGITAL_CDC_HPH_DSM_R4,                       0x59},
499 	{WCD938X_DIGITAL_CDC_HPH_DSM_R5,                       0x66},
500 	{WCD938X_DIGITAL_CDC_HPH_DSM_R6,                       0x87},
501 	{WCD938X_DIGITAL_CDC_HPH_DSM_R7,                       0x64},
502 	{WCD938X_DIGITAL_CDC_AUX_DSM_A1_0,                     0x00},
503 	{WCD938X_DIGITAL_CDC_AUX_DSM_A1_1,                     0x01},
504 	{WCD938X_DIGITAL_CDC_AUX_DSM_A2_0,                     0x96},
505 	{WCD938X_DIGITAL_CDC_AUX_DSM_A2_1,                     0x09},
506 	{WCD938X_DIGITAL_CDC_AUX_DSM_A3_0,                     0xAB},
507 	{WCD938X_DIGITAL_CDC_AUX_DSM_A3_1,                     0x05},
508 	{WCD938X_DIGITAL_CDC_AUX_DSM_A4_0,                     0x1C},
509 	{WCD938X_DIGITAL_CDC_AUX_DSM_A4_1,                     0x02},
510 	{WCD938X_DIGITAL_CDC_AUX_DSM_A5_0,                     0x17},
511 	{WCD938X_DIGITAL_CDC_AUX_DSM_A5_1,                     0x02},
512 	{WCD938X_DIGITAL_CDC_AUX_DSM_A6_0,                     0xAA},
513 	{WCD938X_DIGITAL_CDC_AUX_DSM_A7_0,                     0xE3},
514 	{WCD938X_DIGITAL_CDC_AUX_DSM_C_0,                      0x69},
515 	{WCD938X_DIGITAL_CDC_AUX_DSM_C_1,                      0x54},
516 	{WCD938X_DIGITAL_CDC_AUX_DSM_C_2,                      0x02},
517 	{WCD938X_DIGITAL_CDC_AUX_DSM_C_3,                      0x15},
518 	{WCD938X_DIGITAL_CDC_AUX_DSM_R1,                       0xA4},
519 	{WCD938X_DIGITAL_CDC_AUX_DSM_R2,                       0xB5},
520 	{WCD938X_DIGITAL_CDC_AUX_DSM_R3,                       0x86},
521 	{WCD938X_DIGITAL_CDC_AUX_DSM_R4,                       0x85},
522 	{WCD938X_DIGITAL_CDC_AUX_DSM_R5,                       0xAA},
523 	{WCD938X_DIGITAL_CDC_AUX_DSM_R6,                       0xE2},
524 	{WCD938X_DIGITAL_CDC_AUX_DSM_R7,                       0x62},
525 	{WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0,                    0x55},
526 	{WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1,                    0xA9},
527 	{WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0,                   0x3D},
528 	{WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1,                   0x2E},
529 	{WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2,                   0x01},
530 	{WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0,                   0x00},
531 	{WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1,                   0xFC},
532 	{WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2,                   0x01},
533 	{WCD938X_DIGITAL_CDC_HPH_GAIN_CTL,                     0x00},
534 	{WCD938X_DIGITAL_CDC_AUX_GAIN_CTL,                     0x00},
535 	{WCD938X_DIGITAL_CDC_EAR_PATH_CTL,                     0x00},
536 	{WCD938X_DIGITAL_CDC_SWR_CLH,                          0x00},
537 	{WCD938X_DIGITAL_SWR_CLH_BYP,                          0x00},
538 	{WCD938X_DIGITAL_CDC_TX0_CTL,                          0x68},
539 	{WCD938X_DIGITAL_CDC_TX1_CTL,                          0x68},
540 	{WCD938X_DIGITAL_CDC_TX2_CTL,                          0x68},
541 	{WCD938X_DIGITAL_CDC_TX_RST,                           0x00},
542 	{WCD938X_DIGITAL_CDC_REQ_CTL,                          0x01},
543 	{WCD938X_DIGITAL_CDC_RST,                              0x00},
544 	{WCD938X_DIGITAL_CDC_AMIC_CTL,                         0x0F},
545 	{WCD938X_DIGITAL_CDC_DMIC_CTL,                         0x04},
546 	{WCD938X_DIGITAL_CDC_DMIC1_CTL,                        0x01},
547 	{WCD938X_DIGITAL_CDC_DMIC2_CTL,                        0x01},
548 	{WCD938X_DIGITAL_CDC_DMIC3_CTL,                        0x01},
549 	{WCD938X_DIGITAL_CDC_DMIC4_CTL,                        0x01},
550 	{WCD938X_DIGITAL_EFUSE_PRG_CTL,                        0x00},
551 	{WCD938X_DIGITAL_EFUSE_CTL,                            0x2B},
552 	{WCD938X_DIGITAL_CDC_DMIC_RATE_1_2,                    0x11},
553 	{WCD938X_DIGITAL_CDC_DMIC_RATE_3_4,                    0x11},
554 	{WCD938X_DIGITAL_PDM_WD_CTL0,                          0x00},
555 	{WCD938X_DIGITAL_PDM_WD_CTL1,                          0x00},
556 	{WCD938X_DIGITAL_PDM_WD_CTL2,                          0x00},
557 	{WCD938X_DIGITAL_INTR_MODE,                            0x00},
558 	{WCD938X_DIGITAL_INTR_MASK_0,                          0xFF},
559 	{WCD938X_DIGITAL_INTR_MASK_1,                          0xFF},
560 	{WCD938X_DIGITAL_INTR_MASK_2,                          0x3F},
561 	{WCD938X_DIGITAL_INTR_STATUS_0,                        0x00},
562 	{WCD938X_DIGITAL_INTR_STATUS_1,                        0x00},
563 	{WCD938X_DIGITAL_INTR_STATUS_2,                        0x00},
564 	{WCD938X_DIGITAL_INTR_CLEAR_0,                         0x00},
565 	{WCD938X_DIGITAL_INTR_CLEAR_1,                         0x00},
566 	{WCD938X_DIGITAL_INTR_CLEAR_2,                         0x00},
567 	{WCD938X_DIGITAL_INTR_LEVEL_0,                         0x00},
568 	{WCD938X_DIGITAL_INTR_LEVEL_1,                         0x00},
569 	{WCD938X_DIGITAL_INTR_LEVEL_2,                         0x00},
570 	{WCD938X_DIGITAL_INTR_SET_0,                           0x00},
571 	{WCD938X_DIGITAL_INTR_SET_1,                           0x00},
572 	{WCD938X_DIGITAL_INTR_SET_2,                           0x00},
573 	{WCD938X_DIGITAL_INTR_TEST_0,                          0x00},
574 	{WCD938X_DIGITAL_INTR_TEST_1,                          0x00},
575 	{WCD938X_DIGITAL_INTR_TEST_2,                          0x00},
576 	{WCD938X_DIGITAL_TX_MODE_DBG_EN,                       0x00},
577 	{WCD938X_DIGITAL_TX_MODE_DBG_0_1,                      0x00},
578 	{WCD938X_DIGITAL_TX_MODE_DBG_2_3,                      0x00},
579 	{WCD938X_DIGITAL_LB_IN_SEL_CTL,                        0x00},
580 	{WCD938X_DIGITAL_LOOP_BACK_MODE,                       0x00},
581 	{WCD938X_DIGITAL_SWR_DAC_TEST,                         0x00},
582 	{WCD938X_DIGITAL_SWR_HM_TEST_RX_0,                     0x40},
583 	{WCD938X_DIGITAL_SWR_HM_TEST_TX_0,                     0x40},
584 	{WCD938X_DIGITAL_SWR_HM_TEST_RX_1,                     0x00},
585 	{WCD938X_DIGITAL_SWR_HM_TEST_TX_1,                     0x00},
586 	{WCD938X_DIGITAL_SWR_HM_TEST_TX_2,                     0x00},
587 	{WCD938X_DIGITAL_SWR_HM_TEST_0,                        0x00},
588 	{WCD938X_DIGITAL_SWR_HM_TEST_1,                        0x00},
589 	{WCD938X_DIGITAL_PAD_CTL_SWR_0,                        0x8F},
590 	{WCD938X_DIGITAL_PAD_CTL_SWR_1,                        0x06},
591 	{WCD938X_DIGITAL_I2C_CTL,                              0x00},
592 	{WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE,                0x00},
593 	{WCD938X_DIGITAL_EFUSE_TEST_CTL_0,                     0x00},
594 	{WCD938X_DIGITAL_EFUSE_TEST_CTL_1,                     0x00},
595 	{WCD938X_DIGITAL_EFUSE_T_DATA_0,                       0x00},
596 	{WCD938X_DIGITAL_EFUSE_T_DATA_1,                       0x00},
597 	{WCD938X_DIGITAL_PAD_CTL_PDM_RX0,                      0xF1},
598 	{WCD938X_DIGITAL_PAD_CTL_PDM_RX1,                      0xF1},
599 	{WCD938X_DIGITAL_PAD_CTL_PDM_TX0,                      0xF1},
600 	{WCD938X_DIGITAL_PAD_CTL_PDM_TX1,                      0xF1},
601 	{WCD938X_DIGITAL_PAD_CTL_PDM_TX2,                      0xF1},
602 	{WCD938X_DIGITAL_PAD_INP_DIS_0,                        0x00},
603 	{WCD938X_DIGITAL_PAD_INP_DIS_1,                        0x00},
604 	{WCD938X_DIGITAL_DRIVE_STRENGTH_0,                     0x00},
605 	{WCD938X_DIGITAL_DRIVE_STRENGTH_1,                     0x00},
606 	{WCD938X_DIGITAL_DRIVE_STRENGTH_2,                     0x00},
607 	{WCD938X_DIGITAL_RX_DATA_EDGE_CTL,                     0x1F},
608 	{WCD938X_DIGITAL_TX_DATA_EDGE_CTL,                     0x80},
609 	{WCD938X_DIGITAL_GPIO_MODE,                            0x00},
610 	{WCD938X_DIGITAL_PIN_CTL_OE,                           0x00},
611 	{WCD938X_DIGITAL_PIN_CTL_DATA_0,                       0x00},
612 	{WCD938X_DIGITAL_PIN_CTL_DATA_1,                       0x00},
613 	{WCD938X_DIGITAL_PIN_STATUS_0,                         0x00},
614 	{WCD938X_DIGITAL_PIN_STATUS_1,                         0x00},
615 	{WCD938X_DIGITAL_DIG_DEBUG_CTL,                        0x00},
616 	{WCD938X_DIGITAL_DIG_DEBUG_EN,                         0x00},
617 	{WCD938X_DIGITAL_ANA_CSR_DBG_ADD,                      0x00},
618 	{WCD938X_DIGITAL_ANA_CSR_DBG_CTL,                      0x48},
619 	{WCD938X_DIGITAL_SSP_DBG,                              0x00},
620 	{WCD938X_DIGITAL_MODE_STATUS_0,                        0x00},
621 	{WCD938X_DIGITAL_MODE_STATUS_1,                        0x00},
622 	{WCD938X_DIGITAL_SPARE_0,                              0x00},
623 	{WCD938X_DIGITAL_SPARE_1,                              0x00},
624 	{WCD938X_DIGITAL_SPARE_2,                              0x00},
625 	{WCD938X_DIGITAL_EFUSE_REG_0,                          0x00},
626 	{WCD938X_DIGITAL_EFUSE_REG_1,                          0xFF},
627 	{WCD938X_DIGITAL_EFUSE_REG_2,                          0xFF},
628 	{WCD938X_DIGITAL_EFUSE_REG_3,                          0xFF},
629 	{WCD938X_DIGITAL_EFUSE_REG_4,                          0xFF},
630 	{WCD938X_DIGITAL_EFUSE_REG_5,                          0xFF},
631 	{WCD938X_DIGITAL_EFUSE_REG_6,                          0xFF},
632 	{WCD938X_DIGITAL_EFUSE_REG_7,                          0xFF},
633 	{WCD938X_DIGITAL_EFUSE_REG_8,                          0xFF},
634 	{WCD938X_DIGITAL_EFUSE_REG_9,                          0xFF},
635 	{WCD938X_DIGITAL_EFUSE_REG_10,                         0xFF},
636 	{WCD938X_DIGITAL_EFUSE_REG_11,                         0xFF},
637 	{WCD938X_DIGITAL_EFUSE_REG_12,                         0xFF},
638 	{WCD938X_DIGITAL_EFUSE_REG_13,                         0xFF},
639 	{WCD938X_DIGITAL_EFUSE_REG_14,                         0xFF},
640 	{WCD938X_DIGITAL_EFUSE_REG_15,                         0xFF},
641 	{WCD938X_DIGITAL_EFUSE_REG_16,                         0xFF},
642 	{WCD938X_DIGITAL_EFUSE_REG_17,                         0xFF},
643 	{WCD938X_DIGITAL_EFUSE_REG_18,                         0xFF},
644 	{WCD938X_DIGITAL_EFUSE_REG_19,                         0xFF},
645 	{WCD938X_DIGITAL_EFUSE_REG_20,                         0x0E},
646 	{WCD938X_DIGITAL_EFUSE_REG_21,                         0x00},
647 	{WCD938X_DIGITAL_EFUSE_REG_22,                         0x00},
648 	{WCD938X_DIGITAL_EFUSE_REG_23,                         0xF8},
649 	{WCD938X_DIGITAL_EFUSE_REG_24,                         0x16},
650 	{WCD938X_DIGITAL_EFUSE_REG_25,                         0x00},
651 	{WCD938X_DIGITAL_EFUSE_REG_26,                         0x00},
652 	{WCD938X_DIGITAL_EFUSE_REG_27,                         0x00},
653 	{WCD938X_DIGITAL_EFUSE_REG_28,                         0x00},
654 	{WCD938X_DIGITAL_EFUSE_REG_29,                         0x00},
655 	{WCD938X_DIGITAL_EFUSE_REG_30,                         0x00},
656 	{WCD938X_DIGITAL_EFUSE_REG_31,                         0x00},
657 	{WCD938X_DIGITAL_TX_REQ_FB_CTL_0,                      0x88},
658 	{WCD938X_DIGITAL_TX_REQ_FB_CTL_1,                      0x88},
659 	{WCD938X_DIGITAL_TX_REQ_FB_CTL_2,                      0x88},
660 	{WCD938X_DIGITAL_TX_REQ_FB_CTL_3,                      0x88},
661 	{WCD938X_DIGITAL_TX_REQ_FB_CTL_4,                      0x88},
662 	{WCD938X_DIGITAL_DEM_BYPASS_DATA0,                     0x55},
663 	{WCD938X_DIGITAL_DEM_BYPASS_DATA1,                     0x55},
664 	{WCD938X_DIGITAL_DEM_BYPASS_DATA2,                     0x55},
665 	{WCD938X_DIGITAL_DEM_BYPASS_DATA3,                     0x01},
666 };
667 
wcd938x_rdwr_register(struct device * dev,unsigned int reg)668 static bool wcd938x_rdwr_register(struct device *dev, unsigned int reg)
669 {
670 	switch (reg) {
671 	case WCD938X_ANA_PAGE_REGISTER:
672 	case WCD938X_ANA_BIAS:
673 	case WCD938X_ANA_RX_SUPPLIES:
674 	case WCD938X_ANA_HPH:
675 	case WCD938X_ANA_EAR:
676 	case WCD938X_ANA_EAR_COMPANDER_CTL:
677 	case WCD938X_ANA_TX_CH1:
678 	case WCD938X_ANA_TX_CH2:
679 	case WCD938X_ANA_TX_CH3:
680 	case WCD938X_ANA_TX_CH4:
681 	case WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC:
682 	case WCD938X_ANA_MICB3_DSP_EN_LOGIC:
683 	case WCD938X_ANA_MBHC_MECH:
684 	case WCD938X_ANA_MBHC_ELECT:
685 	case WCD938X_ANA_MBHC_ZDET:
686 	case WCD938X_ANA_MBHC_BTN0:
687 	case WCD938X_ANA_MBHC_BTN1:
688 	case WCD938X_ANA_MBHC_BTN2:
689 	case WCD938X_ANA_MBHC_BTN3:
690 	case WCD938X_ANA_MBHC_BTN4:
691 	case WCD938X_ANA_MBHC_BTN5:
692 	case WCD938X_ANA_MBHC_BTN6:
693 	case WCD938X_ANA_MBHC_BTN7:
694 	case WCD938X_ANA_MICB1:
695 	case WCD938X_ANA_MICB2:
696 	case WCD938X_ANA_MICB2_RAMP:
697 	case WCD938X_ANA_MICB3:
698 	case WCD938X_ANA_MICB4:
699 	case WCD938X_BIAS_CTL:
700 	case WCD938X_BIAS_VBG_FINE_ADJ:
701 	case WCD938X_LDOL_VDDCX_ADJUST:
702 	case WCD938X_LDOL_DISABLE_LDOL:
703 	case WCD938X_MBHC_CTL_CLK:
704 	case WCD938X_MBHC_CTL_ANA:
705 	case WCD938X_MBHC_CTL_SPARE_1:
706 	case WCD938X_MBHC_CTL_SPARE_2:
707 	case WCD938X_MBHC_CTL_BCS:
708 	case WCD938X_MBHC_TEST_CTL:
709 	case WCD938X_LDOH_MODE:
710 	case WCD938X_LDOH_BIAS:
711 	case WCD938X_LDOH_STB_LOADS:
712 	case WCD938X_LDOH_SLOWRAMP:
713 	case WCD938X_MICB1_TEST_CTL_1:
714 	case WCD938X_MICB1_TEST_CTL_2:
715 	case WCD938X_MICB1_TEST_CTL_3:
716 	case WCD938X_MICB2_TEST_CTL_1:
717 	case WCD938X_MICB2_TEST_CTL_2:
718 	case WCD938X_MICB2_TEST_CTL_3:
719 	case WCD938X_MICB3_TEST_CTL_1:
720 	case WCD938X_MICB3_TEST_CTL_2:
721 	case WCD938X_MICB3_TEST_CTL_3:
722 	case WCD938X_MICB4_TEST_CTL_1:
723 	case WCD938X_MICB4_TEST_CTL_2:
724 	case WCD938X_MICB4_TEST_CTL_3:
725 	case WCD938X_TX_COM_ADC_VCM:
726 	case WCD938X_TX_COM_BIAS_ATEST:
727 	case WCD938X_TX_COM_SPARE1:
728 	case WCD938X_TX_COM_SPARE2:
729 	case WCD938X_TX_COM_TXFE_DIV_CTL:
730 	case WCD938X_TX_COM_TXFE_DIV_START:
731 	case WCD938X_TX_COM_SPARE3:
732 	case WCD938X_TX_COM_SPARE4:
733 	case WCD938X_TX_1_2_TEST_EN:
734 	case WCD938X_TX_1_2_ADC_IB:
735 	case WCD938X_TX_1_2_ATEST_REFCTL:
736 	case WCD938X_TX_1_2_TEST_CTL:
737 	case WCD938X_TX_1_2_TEST_BLK_EN1:
738 	case WCD938X_TX_1_2_TXFE1_CLKDIV:
739 	case WCD938X_TX_3_4_TEST_EN:
740 	case WCD938X_TX_3_4_ADC_IB:
741 	case WCD938X_TX_3_4_ATEST_REFCTL:
742 	case WCD938X_TX_3_4_TEST_CTL:
743 	case WCD938X_TX_3_4_TEST_BLK_EN3:
744 	case WCD938X_TX_3_4_TXFE3_CLKDIV:
745 	case WCD938X_TX_3_4_TEST_BLK_EN2:
746 	case WCD938X_TX_3_4_TXFE2_CLKDIV:
747 	case WCD938X_TX_3_4_SPARE1:
748 	case WCD938X_TX_3_4_TEST_BLK_EN4:
749 	case WCD938X_TX_3_4_TXFE4_CLKDIV:
750 	case WCD938X_TX_3_4_SPARE2:
751 	case WCD938X_CLASSH_MODE_1:
752 	case WCD938X_CLASSH_MODE_2:
753 	case WCD938X_CLASSH_MODE_3:
754 	case WCD938X_CLASSH_CTRL_VCL_1:
755 	case WCD938X_CLASSH_CTRL_VCL_2:
756 	case WCD938X_CLASSH_CTRL_CCL_1:
757 	case WCD938X_CLASSH_CTRL_CCL_2:
758 	case WCD938X_CLASSH_CTRL_CCL_3:
759 	case WCD938X_CLASSH_CTRL_CCL_4:
760 	case WCD938X_CLASSH_CTRL_CCL_5:
761 	case WCD938X_CLASSH_BUCK_TMUX_A_D:
762 	case WCD938X_CLASSH_BUCK_SW_DRV_CNTL:
763 	case WCD938X_CLASSH_SPARE:
764 	case WCD938X_FLYBACK_EN:
765 	case WCD938X_FLYBACK_VNEG_CTRL_1:
766 	case WCD938X_FLYBACK_VNEG_CTRL_2:
767 	case WCD938X_FLYBACK_VNEG_CTRL_3:
768 	case WCD938X_FLYBACK_VNEG_CTRL_4:
769 	case WCD938X_FLYBACK_VNEG_CTRL_5:
770 	case WCD938X_FLYBACK_VNEG_CTRL_6:
771 	case WCD938X_FLYBACK_VNEG_CTRL_7:
772 	case WCD938X_FLYBACK_VNEG_CTRL_8:
773 	case WCD938X_FLYBACK_VNEG_CTRL_9:
774 	case WCD938X_FLYBACK_VNEGDAC_CTRL_1:
775 	case WCD938X_FLYBACK_VNEGDAC_CTRL_2:
776 	case WCD938X_FLYBACK_VNEGDAC_CTRL_3:
777 	case WCD938X_FLYBACK_CTRL_1:
778 	case WCD938X_FLYBACK_TEST_CTL:
779 	case WCD938X_RX_AUX_SW_CTL:
780 	case WCD938X_RX_PA_AUX_IN_CONN:
781 	case WCD938X_RX_TIMER_DIV:
782 	case WCD938X_RX_OCP_CTL:
783 	case WCD938X_RX_OCP_COUNT:
784 	case WCD938X_RX_BIAS_EAR_DAC:
785 	case WCD938X_RX_BIAS_EAR_AMP:
786 	case WCD938X_RX_BIAS_HPH_LDO:
787 	case WCD938X_RX_BIAS_HPH_PA:
788 	case WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2:
789 	case WCD938X_RX_BIAS_HPH_RDAC_LDO:
790 	case WCD938X_RX_BIAS_HPH_CNP1:
791 	case WCD938X_RX_BIAS_HPH_LOWPOWER:
792 	case WCD938X_RX_BIAS_AUX_DAC:
793 	case WCD938X_RX_BIAS_AUX_AMP:
794 	case WCD938X_RX_BIAS_VNEGDAC_BLEEDER:
795 	case WCD938X_RX_BIAS_MISC:
796 	case WCD938X_RX_BIAS_BUCK_RST:
797 	case WCD938X_RX_BIAS_BUCK_VREF_ERRAMP:
798 	case WCD938X_RX_BIAS_FLYB_ERRAMP:
799 	case WCD938X_RX_BIAS_FLYB_BUFF:
800 	case WCD938X_RX_BIAS_FLYB_MID_RST:
801 	case WCD938X_HPH_CNP_EN:
802 	case WCD938X_HPH_CNP_WG_CTL:
803 	case WCD938X_HPH_CNP_WG_TIME:
804 	case WCD938X_HPH_OCP_CTL:
805 	case WCD938X_HPH_AUTO_CHOP:
806 	case WCD938X_HPH_CHOP_CTL:
807 	case WCD938X_HPH_PA_CTL1:
808 	case WCD938X_HPH_PA_CTL2:
809 	case WCD938X_HPH_L_EN:
810 	case WCD938X_HPH_L_TEST:
811 	case WCD938X_HPH_L_ATEST:
812 	case WCD938X_HPH_R_EN:
813 	case WCD938X_HPH_R_TEST:
814 	case WCD938X_HPH_R_ATEST:
815 	case WCD938X_HPH_RDAC_CLK_CTL1:
816 	case WCD938X_HPH_RDAC_CLK_CTL2:
817 	case WCD938X_HPH_RDAC_LDO_CTL:
818 	case WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL:
819 	case WCD938X_HPH_REFBUFF_UHQA_CTL:
820 	case WCD938X_HPH_REFBUFF_LP_CTL:
821 	case WCD938X_HPH_L_DAC_CTL:
822 	case WCD938X_HPH_R_DAC_CTL:
823 	case WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL:
824 	case WCD938X_HPH_SURGE_HPHLR_SURGE_EN:
825 	case WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1:
826 	case WCD938X_EAR_EAR_EN_REG:
827 	case WCD938X_EAR_EAR_PA_CON:
828 	case WCD938X_EAR_EAR_SP_CON:
829 	case WCD938X_EAR_EAR_DAC_CON:
830 	case WCD938X_EAR_EAR_CNP_FSM_CON:
831 	case WCD938X_EAR_TEST_CTL:
832 	case WCD938X_ANA_NEW_PAGE_REGISTER:
833 	case WCD938X_HPH_NEW_ANA_HPH2:
834 	case WCD938X_HPH_NEW_ANA_HPH3:
835 	case WCD938X_SLEEP_CTL:
836 	case WCD938X_SLEEP_WATCHDOG_CTL:
837 	case WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL:
838 	case WCD938X_MBHC_NEW_CTL_1:
839 	case WCD938X_MBHC_NEW_CTL_2:
840 	case WCD938X_MBHC_NEW_PLUG_DETECT_CTL:
841 	case WCD938X_MBHC_NEW_ZDET_ANA_CTL:
842 	case WCD938X_MBHC_NEW_ZDET_RAMP_CTL:
843 	case WCD938X_TX_NEW_AMIC_MUX_CFG:
844 	case WCD938X_AUX_AUXPA:
845 	case WCD938X_LDORXTX_MODE:
846 	case WCD938X_LDORXTX_CONFIG:
847 	case WCD938X_DIE_CRACK_DIE_CRK_DET_EN:
848 	case WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL:
849 	case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L:
850 	case WCD938X_HPH_NEW_INT_RDAC_VREF_CTL:
851 	case WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL:
852 	case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R:
853 	case WCD938X_HPH_NEW_INT_PA_MISC1:
854 	case WCD938X_HPH_NEW_INT_PA_MISC2:
855 	case WCD938X_HPH_NEW_INT_PA_RDAC_MISC:
856 	case WCD938X_HPH_NEW_INT_HPH_TIMER1:
857 	case WCD938X_HPH_NEW_INT_HPH_TIMER2:
858 	case WCD938X_HPH_NEW_INT_HPH_TIMER3:
859 	case WCD938X_HPH_NEW_INT_HPH_TIMER4:
860 	case WCD938X_HPH_NEW_INT_PA_RDAC_MISC2:
861 	case WCD938X_HPH_NEW_INT_PA_RDAC_MISC3:
862 	case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW:
863 	case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW:
864 	case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI:
865 	case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP:
866 	case WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP:
867 	case WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL:
868 	case WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL:
869 	case WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT:
870 	case WCD938X_MBHC_NEW_INT_SPARE_2:
871 	case WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON:
872 	case WCD938X_EAR_INT_NEW_CNP_VCM_CON1:
873 	case WCD938X_EAR_INT_NEW_CNP_VCM_CON2:
874 	case WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS:
875 	case WCD938X_AUX_INT_EN_REG:
876 	case WCD938X_AUX_INT_PA_CTRL:
877 	case WCD938X_AUX_INT_SP_CTRL:
878 	case WCD938X_AUX_INT_DAC_CTRL:
879 	case WCD938X_AUX_INT_CLK_CTRL:
880 	case WCD938X_AUX_INT_TEST_CTRL:
881 	case WCD938X_AUX_INT_MISC:
882 	case WCD938X_LDORXTX_INT_BIAS:
883 	case WCD938X_LDORXTX_INT_STB_LOADS_DTEST:
884 	case WCD938X_LDORXTX_INT_TEST0:
885 	case WCD938X_LDORXTX_INT_STARTUP_TIMER:
886 	case WCD938X_LDORXTX_INT_TEST1:
887 	case WCD938X_SLEEP_INT_WATCHDOG_CTL_1:
888 	case WCD938X_SLEEP_INT_WATCHDOG_CTL_2:
889 	case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1:
890 	case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2:
891 	case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2:
892 	case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1:
893 	case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0:
894 	case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M:
895 	case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M:
896 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1:
897 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0:
898 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP:
899 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1:
900 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0:
901 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP:
902 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0:
903 	case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP:
904 	case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1:
905 	case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP:
906 	case WCD938X_TX_COM_NEW_INT_TXADC_INT_L2:
907 	case WCD938X_TX_COM_NEW_INT_TXADC_INT_L1:
908 	case WCD938X_TX_COM_NEW_INT_TXADC_INT_L0:
909 	case WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP:
910 	case WCD938X_DIGITAL_PAGE_REGISTER:
911 	case WCD938X_DIGITAL_SWR_TX_CLK_RATE:
912 	case WCD938X_DIGITAL_CDC_RST_CTL:
913 	case WCD938X_DIGITAL_TOP_CLK_CFG:
914 	case WCD938X_DIGITAL_CDC_ANA_CLK_CTL:
915 	case WCD938X_DIGITAL_CDC_DIG_CLK_CTL:
916 	case WCD938X_DIGITAL_SWR_RST_EN:
917 	case WCD938X_DIGITAL_CDC_PATH_MODE:
918 	case WCD938X_DIGITAL_CDC_RX_RST:
919 	case WCD938X_DIGITAL_CDC_RX0_CTL:
920 	case WCD938X_DIGITAL_CDC_RX1_CTL:
921 	case WCD938X_DIGITAL_CDC_RX2_CTL:
922 	case WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1:
923 	case WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3:
924 	case WCD938X_DIGITAL_CDC_COMP_CTL_0:
925 	case WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL:
926 	case WCD938X_DIGITAL_CDC_HPH_DSM_A1_0:
927 	case WCD938X_DIGITAL_CDC_HPH_DSM_A1_1:
928 	case WCD938X_DIGITAL_CDC_HPH_DSM_A2_0:
929 	case WCD938X_DIGITAL_CDC_HPH_DSM_A2_1:
930 	case WCD938X_DIGITAL_CDC_HPH_DSM_A3_0:
931 	case WCD938X_DIGITAL_CDC_HPH_DSM_A3_1:
932 	case WCD938X_DIGITAL_CDC_HPH_DSM_A4_0:
933 	case WCD938X_DIGITAL_CDC_HPH_DSM_A4_1:
934 	case WCD938X_DIGITAL_CDC_HPH_DSM_A5_0:
935 	case WCD938X_DIGITAL_CDC_HPH_DSM_A5_1:
936 	case WCD938X_DIGITAL_CDC_HPH_DSM_A6_0:
937 	case WCD938X_DIGITAL_CDC_HPH_DSM_A7_0:
938 	case WCD938X_DIGITAL_CDC_HPH_DSM_C_0:
939 	case WCD938X_DIGITAL_CDC_HPH_DSM_C_1:
940 	case WCD938X_DIGITAL_CDC_HPH_DSM_C_2:
941 	case WCD938X_DIGITAL_CDC_HPH_DSM_C_3:
942 	case WCD938X_DIGITAL_CDC_HPH_DSM_R1:
943 	case WCD938X_DIGITAL_CDC_HPH_DSM_R2:
944 	case WCD938X_DIGITAL_CDC_HPH_DSM_R3:
945 	case WCD938X_DIGITAL_CDC_HPH_DSM_R4:
946 	case WCD938X_DIGITAL_CDC_HPH_DSM_R5:
947 	case WCD938X_DIGITAL_CDC_HPH_DSM_R6:
948 	case WCD938X_DIGITAL_CDC_HPH_DSM_R7:
949 	case WCD938X_DIGITAL_CDC_AUX_DSM_A1_0:
950 	case WCD938X_DIGITAL_CDC_AUX_DSM_A1_1:
951 	case WCD938X_DIGITAL_CDC_AUX_DSM_A2_0:
952 	case WCD938X_DIGITAL_CDC_AUX_DSM_A2_1:
953 	case WCD938X_DIGITAL_CDC_AUX_DSM_A3_0:
954 	case WCD938X_DIGITAL_CDC_AUX_DSM_A3_1:
955 	case WCD938X_DIGITAL_CDC_AUX_DSM_A4_0:
956 	case WCD938X_DIGITAL_CDC_AUX_DSM_A4_1:
957 	case WCD938X_DIGITAL_CDC_AUX_DSM_A5_0:
958 	case WCD938X_DIGITAL_CDC_AUX_DSM_A5_1:
959 	case WCD938X_DIGITAL_CDC_AUX_DSM_A6_0:
960 	case WCD938X_DIGITAL_CDC_AUX_DSM_A7_0:
961 	case WCD938X_DIGITAL_CDC_AUX_DSM_C_0:
962 	case WCD938X_DIGITAL_CDC_AUX_DSM_C_1:
963 	case WCD938X_DIGITAL_CDC_AUX_DSM_C_2:
964 	case WCD938X_DIGITAL_CDC_AUX_DSM_C_3:
965 	case WCD938X_DIGITAL_CDC_AUX_DSM_R1:
966 	case WCD938X_DIGITAL_CDC_AUX_DSM_R2:
967 	case WCD938X_DIGITAL_CDC_AUX_DSM_R3:
968 	case WCD938X_DIGITAL_CDC_AUX_DSM_R4:
969 	case WCD938X_DIGITAL_CDC_AUX_DSM_R5:
970 	case WCD938X_DIGITAL_CDC_AUX_DSM_R6:
971 	case WCD938X_DIGITAL_CDC_AUX_DSM_R7:
972 	case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0:
973 	case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1:
974 	case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0:
975 	case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1:
976 	case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2:
977 	case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0:
978 	case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1:
979 	case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2:
980 	case WCD938X_DIGITAL_CDC_HPH_GAIN_CTL:
981 	case WCD938X_DIGITAL_CDC_AUX_GAIN_CTL:
982 	case WCD938X_DIGITAL_CDC_EAR_PATH_CTL:
983 	case WCD938X_DIGITAL_CDC_SWR_CLH:
984 	case WCD938X_DIGITAL_SWR_CLH_BYP:
985 	case WCD938X_DIGITAL_CDC_TX0_CTL:
986 	case WCD938X_DIGITAL_CDC_TX1_CTL:
987 	case WCD938X_DIGITAL_CDC_TX2_CTL:
988 	case WCD938X_DIGITAL_CDC_TX_RST:
989 	case WCD938X_DIGITAL_CDC_REQ_CTL:
990 	case WCD938X_DIGITAL_CDC_RST:
991 	case WCD938X_DIGITAL_CDC_AMIC_CTL:
992 	case WCD938X_DIGITAL_CDC_DMIC_CTL:
993 	case WCD938X_DIGITAL_CDC_DMIC1_CTL:
994 	case WCD938X_DIGITAL_CDC_DMIC2_CTL:
995 	case WCD938X_DIGITAL_CDC_DMIC3_CTL:
996 	case WCD938X_DIGITAL_CDC_DMIC4_CTL:
997 	case WCD938X_DIGITAL_EFUSE_PRG_CTL:
998 	case WCD938X_DIGITAL_EFUSE_CTL:
999 	case WCD938X_DIGITAL_CDC_DMIC_RATE_1_2:
1000 	case WCD938X_DIGITAL_CDC_DMIC_RATE_3_4:
1001 	case WCD938X_DIGITAL_PDM_WD_CTL0:
1002 	case WCD938X_DIGITAL_PDM_WD_CTL1:
1003 	case WCD938X_DIGITAL_PDM_WD_CTL2:
1004 	case WCD938X_DIGITAL_INTR_MODE:
1005 	case WCD938X_DIGITAL_INTR_MASK_0:
1006 	case WCD938X_DIGITAL_INTR_MASK_1:
1007 	case WCD938X_DIGITAL_INTR_MASK_2:
1008 	case WCD938X_DIGITAL_INTR_CLEAR_0:
1009 	case WCD938X_DIGITAL_INTR_CLEAR_1:
1010 	case WCD938X_DIGITAL_INTR_CLEAR_2:
1011 	case WCD938X_DIGITAL_INTR_LEVEL_0:
1012 	case WCD938X_DIGITAL_INTR_LEVEL_1:
1013 	case WCD938X_DIGITAL_INTR_LEVEL_2:
1014 	case WCD938X_DIGITAL_INTR_SET_0:
1015 	case WCD938X_DIGITAL_INTR_SET_1:
1016 	case WCD938X_DIGITAL_INTR_SET_2:
1017 	case WCD938X_DIGITAL_INTR_TEST_0:
1018 	case WCD938X_DIGITAL_INTR_TEST_1:
1019 	case WCD938X_DIGITAL_INTR_TEST_2:
1020 	case WCD938X_DIGITAL_TX_MODE_DBG_EN:
1021 	case WCD938X_DIGITAL_TX_MODE_DBG_0_1:
1022 	case WCD938X_DIGITAL_TX_MODE_DBG_2_3:
1023 	case WCD938X_DIGITAL_LB_IN_SEL_CTL:
1024 	case WCD938X_DIGITAL_LOOP_BACK_MODE:
1025 	case WCD938X_DIGITAL_SWR_DAC_TEST:
1026 	case WCD938X_DIGITAL_SWR_HM_TEST_RX_0:
1027 	case WCD938X_DIGITAL_SWR_HM_TEST_TX_0:
1028 	case WCD938X_DIGITAL_SWR_HM_TEST_RX_1:
1029 	case WCD938X_DIGITAL_SWR_HM_TEST_TX_1:
1030 	case WCD938X_DIGITAL_SWR_HM_TEST_TX_2:
1031 	case WCD938X_DIGITAL_PAD_CTL_SWR_0:
1032 	case WCD938X_DIGITAL_PAD_CTL_SWR_1:
1033 	case WCD938X_DIGITAL_I2C_CTL:
1034 	case WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE:
1035 	case WCD938X_DIGITAL_EFUSE_TEST_CTL_0:
1036 	case WCD938X_DIGITAL_EFUSE_TEST_CTL_1:
1037 	case WCD938X_DIGITAL_PAD_CTL_PDM_RX0:
1038 	case WCD938X_DIGITAL_PAD_CTL_PDM_RX1:
1039 	case WCD938X_DIGITAL_PAD_CTL_PDM_TX0:
1040 	case WCD938X_DIGITAL_PAD_CTL_PDM_TX1:
1041 	case WCD938X_DIGITAL_PAD_CTL_PDM_TX2:
1042 	case WCD938X_DIGITAL_PAD_INP_DIS_0:
1043 	case WCD938X_DIGITAL_PAD_INP_DIS_1:
1044 	case WCD938X_DIGITAL_DRIVE_STRENGTH_0:
1045 	case WCD938X_DIGITAL_DRIVE_STRENGTH_1:
1046 	case WCD938X_DIGITAL_DRIVE_STRENGTH_2:
1047 	case WCD938X_DIGITAL_RX_DATA_EDGE_CTL:
1048 	case WCD938X_DIGITAL_TX_DATA_EDGE_CTL:
1049 	case WCD938X_DIGITAL_GPIO_MODE:
1050 	case WCD938X_DIGITAL_PIN_CTL_OE:
1051 	case WCD938X_DIGITAL_PIN_CTL_DATA_0:
1052 	case WCD938X_DIGITAL_PIN_CTL_DATA_1:
1053 	case WCD938X_DIGITAL_DIG_DEBUG_CTL:
1054 	case WCD938X_DIGITAL_DIG_DEBUG_EN:
1055 	case WCD938X_DIGITAL_ANA_CSR_DBG_ADD:
1056 	case WCD938X_DIGITAL_ANA_CSR_DBG_CTL:
1057 	case WCD938X_DIGITAL_SSP_DBG:
1058 	case WCD938X_DIGITAL_SPARE_0:
1059 	case WCD938X_DIGITAL_SPARE_1:
1060 	case WCD938X_DIGITAL_SPARE_2:
1061 	case WCD938X_DIGITAL_TX_REQ_FB_CTL_0:
1062 	case WCD938X_DIGITAL_TX_REQ_FB_CTL_1:
1063 	case WCD938X_DIGITAL_TX_REQ_FB_CTL_2:
1064 	case WCD938X_DIGITAL_TX_REQ_FB_CTL_3:
1065 	case WCD938X_DIGITAL_TX_REQ_FB_CTL_4:
1066 	case WCD938X_DIGITAL_DEM_BYPASS_DATA0:
1067 	case WCD938X_DIGITAL_DEM_BYPASS_DATA1:
1068 	case WCD938X_DIGITAL_DEM_BYPASS_DATA2:
1069 	case WCD938X_DIGITAL_DEM_BYPASS_DATA3:
1070 		return true;
1071 	}
1072 
1073 	return false;
1074 }
1075 
wcd938x_readonly_register(struct device * dev,unsigned int reg)1076 static bool wcd938x_readonly_register(struct device *dev, unsigned int reg)
1077 {
1078 	switch (reg) {
1079 	case WCD938X_ANA_MBHC_RESULT_1:
1080 	case WCD938X_ANA_MBHC_RESULT_2:
1081 	case WCD938X_ANA_MBHC_RESULT_3:
1082 	case WCD938X_MBHC_MOISTURE_DET_FSM_STATUS:
1083 	case WCD938X_TX_1_2_SAR2_ERR:
1084 	case WCD938X_TX_1_2_SAR1_ERR:
1085 	case WCD938X_TX_3_4_SAR4_ERR:
1086 	case WCD938X_TX_3_4_SAR3_ERR:
1087 	case WCD938X_HPH_L_STATUS:
1088 	case WCD938X_HPH_R_STATUS:
1089 	case WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS:
1090 	case WCD938X_EAR_STATUS_REG_1:
1091 	case WCD938X_EAR_STATUS_REG_2:
1092 	case WCD938X_MBHC_NEW_FSM_STATUS:
1093 	case WCD938X_MBHC_NEW_ADC_RESULT:
1094 	case WCD938X_DIE_CRACK_DIE_CRK_DET_OUT:
1095 	case WCD938X_AUX_INT_STATUS_REG:
1096 	case WCD938X_LDORXTX_INT_STATUS:
1097 	case WCD938X_DIGITAL_CHIP_ID0:
1098 	case WCD938X_DIGITAL_CHIP_ID1:
1099 	case WCD938X_DIGITAL_CHIP_ID2:
1100 	case WCD938X_DIGITAL_CHIP_ID3:
1101 	case WCD938X_DIGITAL_INTR_STATUS_0:
1102 	case WCD938X_DIGITAL_INTR_STATUS_1:
1103 	case WCD938X_DIGITAL_INTR_STATUS_2:
1104 	case WCD938X_DIGITAL_INTR_CLEAR_0:
1105 	case WCD938X_DIGITAL_INTR_CLEAR_1:
1106 	case WCD938X_DIGITAL_INTR_CLEAR_2:
1107 	case WCD938X_DIGITAL_SWR_HM_TEST_0:
1108 	case WCD938X_DIGITAL_SWR_HM_TEST_1:
1109 	case WCD938X_DIGITAL_EFUSE_T_DATA_0:
1110 	case WCD938X_DIGITAL_EFUSE_T_DATA_1:
1111 	case WCD938X_DIGITAL_PIN_STATUS_0:
1112 	case WCD938X_DIGITAL_PIN_STATUS_1:
1113 	case WCD938X_DIGITAL_MODE_STATUS_0:
1114 	case WCD938X_DIGITAL_MODE_STATUS_1:
1115 	case WCD938X_DIGITAL_EFUSE_REG_0:
1116 	case WCD938X_DIGITAL_EFUSE_REG_1:
1117 	case WCD938X_DIGITAL_EFUSE_REG_2:
1118 	case WCD938X_DIGITAL_EFUSE_REG_3:
1119 	case WCD938X_DIGITAL_EFUSE_REG_4:
1120 	case WCD938X_DIGITAL_EFUSE_REG_5:
1121 	case WCD938X_DIGITAL_EFUSE_REG_6:
1122 	case WCD938X_DIGITAL_EFUSE_REG_7:
1123 	case WCD938X_DIGITAL_EFUSE_REG_8:
1124 	case WCD938X_DIGITAL_EFUSE_REG_9:
1125 	case WCD938X_DIGITAL_EFUSE_REG_10:
1126 	case WCD938X_DIGITAL_EFUSE_REG_11:
1127 	case WCD938X_DIGITAL_EFUSE_REG_12:
1128 	case WCD938X_DIGITAL_EFUSE_REG_13:
1129 	case WCD938X_DIGITAL_EFUSE_REG_14:
1130 	case WCD938X_DIGITAL_EFUSE_REG_15:
1131 	case WCD938X_DIGITAL_EFUSE_REG_16:
1132 	case WCD938X_DIGITAL_EFUSE_REG_17:
1133 	case WCD938X_DIGITAL_EFUSE_REG_18:
1134 	case WCD938X_DIGITAL_EFUSE_REG_19:
1135 	case WCD938X_DIGITAL_EFUSE_REG_20:
1136 	case WCD938X_DIGITAL_EFUSE_REG_21:
1137 	case WCD938X_DIGITAL_EFUSE_REG_22:
1138 	case WCD938X_DIGITAL_EFUSE_REG_23:
1139 	case WCD938X_DIGITAL_EFUSE_REG_24:
1140 	case WCD938X_DIGITAL_EFUSE_REG_25:
1141 	case WCD938X_DIGITAL_EFUSE_REG_26:
1142 	case WCD938X_DIGITAL_EFUSE_REG_27:
1143 	case WCD938X_DIGITAL_EFUSE_REG_28:
1144 	case WCD938X_DIGITAL_EFUSE_REG_29:
1145 	case WCD938X_DIGITAL_EFUSE_REG_30:
1146 	case WCD938X_DIGITAL_EFUSE_REG_31:
1147 		return true;
1148 	}
1149 	return false;
1150 }
1151 
wcd938x_readable_register(struct device * dev,unsigned int reg)1152 static bool wcd938x_readable_register(struct device *dev, unsigned int reg)
1153 {
1154 	bool ret;
1155 
1156 	ret = wcd938x_readonly_register(dev, reg);
1157 	if (!ret)
1158 		return wcd938x_rdwr_register(dev, reg);
1159 
1160 	return ret;
1161 }
1162 
wcd938x_writeable_register(struct device * dev,unsigned int reg)1163 static bool wcd938x_writeable_register(struct device *dev, unsigned int reg)
1164 {
1165 	return wcd938x_rdwr_register(dev, reg);
1166 }
1167 
wcd938x_volatile_register(struct device * dev,unsigned int reg)1168 static bool wcd938x_volatile_register(struct device *dev, unsigned int reg)
1169 {
1170 	if (reg <= WCD938X_BASE_ADDRESS)
1171 		return false;
1172 
1173 	if (reg == WCD938X_DIGITAL_SWR_TX_CLK_RATE)
1174 		return true;
1175 
1176 	if (wcd938x_readonly_register(dev, reg))
1177 		return true;
1178 
1179 	return false;
1180 }
1181 
1182 static const struct regmap_config wcd938x_regmap_config = {
1183 	.name = "wcd938x_csr",
1184 	.reg_bits = 32,
1185 	.val_bits = 8,
1186 	.cache_type = REGCACHE_MAPLE,
1187 	.reg_defaults = wcd938x_defaults,
1188 	.num_reg_defaults = ARRAY_SIZE(wcd938x_defaults),
1189 	.max_register = WCD938X_MAX_REGISTER,
1190 	.readable_reg = wcd938x_readable_register,
1191 	.writeable_reg = wcd938x_writeable_register,
1192 	.volatile_reg = wcd938x_volatile_register,
1193 };
1194 
1195 static const struct sdw_slave_ops wcd9380_slave_ops = {
1196 	.update_status = wcd9380_update_status,
1197 	.interrupt_callback = wcd9380_interrupt_callback,
1198 	.bus_config = wcd9380_bus_config,
1199 };
1200 
wcd938x_sdw_component_bind(struct device * dev,struct device * master,void * data)1201 static int wcd938x_sdw_component_bind(struct device *dev,
1202 				      struct device *master, void *data)
1203 {
1204 	return 0;
1205 }
1206 
wcd938x_sdw_component_unbind(struct device * dev,struct device * master,void * data)1207 static void wcd938x_sdw_component_unbind(struct device *dev,
1208 					 struct device *master, void *data)
1209 {
1210 }
1211 
1212 static const struct component_ops wcd938x_sdw_component_ops = {
1213 	.bind   = wcd938x_sdw_component_bind,
1214 	.unbind = wcd938x_sdw_component_unbind,
1215 };
1216 
wcd9380_probe(struct sdw_slave * pdev,const struct sdw_device_id * id)1217 static int wcd9380_probe(struct sdw_slave *pdev,
1218 			 const struct sdw_device_id *id)
1219 {
1220 	struct device *dev = &pdev->dev;
1221 	struct wcd938x_sdw_priv *wcd;
1222 	int ret;
1223 
1224 	wcd = devm_kzalloc(dev, sizeof(*wcd), GFP_KERNEL);
1225 	if (!wcd)
1226 		return -ENOMEM;
1227 
1228 	/**
1229 	 * Port map index starts with 0, however the data port for this codec
1230 	 * are from index 1
1231 	 */
1232 	if (of_property_read_bool(dev->of_node, "qcom,tx-port-mapping")) {
1233 		wcd->is_tx = true;
1234 		ret = of_property_read_u32_array(dev->of_node, "qcom,tx-port-mapping",
1235 						 &pdev->m_port_map[1],
1236 						 WCD938X_MAX_TX_SWR_PORTS);
1237 	} else {
1238 		ret = of_property_read_u32_array(dev->of_node, "qcom,rx-port-mapping",
1239 						 &pdev->m_port_map[1],
1240 						 WCD938X_MAX_SWR_PORTS);
1241 	}
1242 
1243 	if (ret < 0)
1244 		dev_info(dev, "Static Port mapping not specified\n");
1245 
1246 	wcd->sdev = pdev;
1247 	dev_set_drvdata(dev, wcd);
1248 
1249 	pdev->prop.scp_int1_mask = SDW_SCP_INT1_IMPL_DEF |
1250 					SDW_SCP_INT1_BUS_CLASH |
1251 					SDW_SCP_INT1_PARITY;
1252 	pdev->prop.lane_control_support = true;
1253 	pdev->prop.simple_clk_stop_capable = true;
1254 	if (wcd->is_tx) {
1255 		pdev->prop.source_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0);
1256 		pdev->prop.src_dpn_prop = wcd938x_dpn_prop;
1257 		wcd->ch_info = &wcd938x_sdw_tx_ch_info[0];
1258 		pdev->prop.wake_capable = true;
1259 	} else {
1260 		pdev->prop.sink_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0);
1261 		pdev->prop.sink_dpn_prop = wcd938x_dpn_prop;
1262 		wcd->ch_info = &wcd938x_sdw_rx_ch_info[0];
1263 	}
1264 
1265 	if (wcd->is_tx) {
1266 		wcd->regmap = devm_regmap_init_sdw(pdev, &wcd938x_regmap_config);
1267 		if (IS_ERR(wcd->regmap))
1268 			return dev_err_probe(dev, PTR_ERR(wcd->regmap),
1269 					     "Regmap init failed\n");
1270 
1271 		/* Start in cache-only until device is enumerated */
1272 		regcache_cache_only(wcd->regmap, true);
1273 	}
1274 
1275 	pm_runtime_set_autosuspend_delay(dev, 3000);
1276 	pm_runtime_use_autosuspend(dev);
1277 	pm_runtime_mark_last_busy(dev);
1278 	pm_runtime_set_active(dev);
1279 	pm_runtime_enable(dev);
1280 
1281 	ret = component_add(dev, &wcd938x_sdw_component_ops);
1282 	if (ret)
1283 		goto err_disable_rpm;
1284 
1285 	return 0;
1286 
1287 err_disable_rpm:
1288 	pm_runtime_disable(dev);
1289 	pm_runtime_set_suspended(dev);
1290 	pm_runtime_dont_use_autosuspend(dev);
1291 
1292 	return ret;
1293 }
1294 
wcd9380_remove(struct sdw_slave * pdev)1295 static int wcd9380_remove(struct sdw_slave *pdev)
1296 {
1297 	struct device *dev = &pdev->dev;
1298 
1299 	component_del(dev, &wcd938x_sdw_component_ops);
1300 
1301 	pm_runtime_disable(dev);
1302 	pm_runtime_set_suspended(dev);
1303 	pm_runtime_dont_use_autosuspend(dev);
1304 
1305 	return 0;
1306 }
1307 
1308 static const struct sdw_device_id wcd9380_slave_id[] = {
1309 	SDW_SLAVE_ENTRY(0x0217, 0x10d, 0),
1310 	{},
1311 };
1312 MODULE_DEVICE_TABLE(sdw, wcd9380_slave_id);
1313 
wcd938x_sdw_runtime_suspend(struct device * dev)1314 static int __maybe_unused wcd938x_sdw_runtime_suspend(struct device *dev)
1315 {
1316 	struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
1317 
1318 	if (wcd->regmap) {
1319 		regcache_cache_only(wcd->regmap, true);
1320 		regcache_mark_dirty(wcd->regmap);
1321 	}
1322 
1323 	return 0;
1324 }
1325 
wcd938x_sdw_runtime_resume(struct device * dev)1326 static int __maybe_unused wcd938x_sdw_runtime_resume(struct device *dev)
1327 {
1328 	struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
1329 
1330 	if (wcd->regmap) {
1331 		regcache_cache_only(wcd->regmap, false);
1332 		regcache_sync(wcd->regmap);
1333 	}
1334 
1335 	pm_runtime_mark_last_busy(dev);
1336 
1337 	return 0;
1338 }
1339 
1340 static const struct dev_pm_ops wcd938x_sdw_pm_ops = {
1341 	SET_RUNTIME_PM_OPS(wcd938x_sdw_runtime_suspend, wcd938x_sdw_runtime_resume, NULL)
1342 };
1343 
1344 
1345 static struct sdw_driver wcd9380_codec_driver = {
1346 	.probe	= wcd9380_probe,
1347 	.remove	= wcd9380_remove,
1348 	.ops = &wcd9380_slave_ops,
1349 	.id_table = wcd9380_slave_id,
1350 	.driver = {
1351 		.name	= "wcd9380-codec",
1352 		.pm = &wcd938x_sdw_pm_ops,
1353 	}
1354 };
1355 module_sdw_driver(wcd9380_codec_driver);
1356 
1357 MODULE_DESCRIPTION("WCD938X SDW codec driver");
1358 MODULE_LICENSE("GPL");
1359