xref: /openbmc/linux/drivers/iio/adc/ti-adc12138.c (revision 76890c3b)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
4  *
5  * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
6  *
7  * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
8  */
9 
10 #include <linux/module.h>
11 #include <linux/interrupt.h>
12 #include <linux/completion.h>
13 #include <linux/clk.h>
14 #include <linux/property.h>
15 #include <linux/spi/spi.h>
16 #include <linux/iio/iio.h>
17 #include <linux/iio/buffer.h>
18 #include <linux/iio/trigger.h>
19 #include <linux/iio/triggered_buffer.h>
20 #include <linux/iio/trigger_consumer.h>
21 #include <linux/regulator/consumer.h>
22 
23 #define ADC12138_MODE_AUTO_CAL			0x08
24 #define ADC12138_MODE_READ_STATUS		0x0c
25 #define ADC12138_MODE_ACQUISITION_TIME_6	0x0e
26 #define ADC12138_MODE_ACQUISITION_TIME_10	0x4e
27 #define ADC12138_MODE_ACQUISITION_TIME_18	0x8e
28 #define ADC12138_MODE_ACQUISITION_TIME_34	0xce
29 
30 #define ADC12138_STATUS_CAL			BIT(6)
31 
32 enum {
33 	adc12130,
34 	adc12132,
35 	adc12138,
36 };
37 
38 struct adc12138 {
39 	struct spi_device *spi;
40 	unsigned int id;
41 	/* conversion clock */
42 	struct clk *cclk;
43 	/* positive analog voltage reference */
44 	struct regulator *vref_p;
45 	/* negative analog voltage reference */
46 	struct regulator *vref_n;
47 	struct mutex lock;
48 	struct completion complete;
49 	/* The number of cclk periods for the S/H's acquisition time */
50 	unsigned int acquisition_time;
51 	/*
52 	 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
53 	 * Less may be need if not all channels are enabled, as long as
54 	 * the 8 byte alignment of the timestamp is maintained.
55 	 */
56 	__be16 data[20] __aligned(8);
57 
58 	u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
59 	u8 rx_buf[2];
60 };
61 
62 #define ADC12138_VOLTAGE_CHANNEL(chan)					\
63 	{								\
64 		.type = IIO_VOLTAGE,					\
65 		.indexed = 1,						\
66 		.channel = chan,					\
67 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
68 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
69 					| BIT(IIO_CHAN_INFO_OFFSET),	\
70 		.scan_index = chan,					\
71 		.scan_type = {						\
72 			.sign = 's',					\
73 			.realbits = 13,					\
74 			.storagebits = 16,				\
75 			.shift = 3,					\
76 			.endianness = IIO_BE,				\
77 		},							\
78 	}
79 
80 #define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si)			\
81 	{								\
82 		.type = IIO_VOLTAGE,					\
83 		.indexed = 1,						\
84 		.channel = (chan1),					\
85 		.channel2 = (chan2),					\
86 		.differential = 1,					\
87 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
88 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
89 					| BIT(IIO_CHAN_INFO_OFFSET),	\
90 		.scan_index = si,					\
91 		.scan_type = {						\
92 			.sign = 's',					\
93 			.realbits = 13,					\
94 			.storagebits = 16,				\
95 			.shift = 3,					\
96 			.endianness = IIO_BE,				\
97 		},							\
98 	}
99 
100 static const struct iio_chan_spec adc12132_channels[] = {
101 	ADC12138_VOLTAGE_CHANNEL(0),
102 	ADC12138_VOLTAGE_CHANNEL(1),
103 	ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
104 	ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
105 	IIO_CHAN_SOFT_TIMESTAMP(4),
106 };
107 
108 static const struct iio_chan_spec adc12138_channels[] = {
109 	ADC12138_VOLTAGE_CHANNEL(0),
110 	ADC12138_VOLTAGE_CHANNEL(1),
111 	ADC12138_VOLTAGE_CHANNEL(2),
112 	ADC12138_VOLTAGE_CHANNEL(3),
113 	ADC12138_VOLTAGE_CHANNEL(4),
114 	ADC12138_VOLTAGE_CHANNEL(5),
115 	ADC12138_VOLTAGE_CHANNEL(6),
116 	ADC12138_VOLTAGE_CHANNEL(7),
117 	ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
118 	ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
119 	ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
120 	ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
121 	ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
122 	ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
123 	ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
124 	ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
125 	IIO_CHAN_SOFT_TIMESTAMP(16),
126 };
127 
adc12138_mode_programming(struct adc12138 * adc,u8 mode,void * rx_buf,int len)128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
129 				     void *rx_buf, int len)
130 {
131 	struct spi_transfer xfer = {
132 		.tx_buf = adc->tx_buf,
133 		.rx_buf = adc->rx_buf,
134 		.len = len,
135 	};
136 	int ret;
137 
138 	/* Skip unused bits for ADC12130 and ADC12132 */
139 	if (adc->id != adc12138)
140 		mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
141 
142 	adc->tx_buf[0] = mode;
143 
144 	ret = spi_sync_transfer(adc->spi, &xfer, 1);
145 	if (ret)
146 		return ret;
147 
148 	memcpy(rx_buf, adc->rx_buf, len);
149 
150 	return 0;
151 }
152 
adc12138_read_status(struct adc12138 * adc)153 static int adc12138_read_status(struct adc12138 *adc)
154 {
155 	u8 rx_buf[2];
156 	int ret;
157 
158 	ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
159 					rx_buf, 2);
160 	if (ret)
161 		return ret;
162 
163 	return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
164 }
165 
__adc12138_start_conv(struct adc12138 * adc,struct iio_chan_spec const * channel,void * data,int len)166 static int __adc12138_start_conv(struct adc12138 *adc,
167 				 struct iio_chan_spec const *channel,
168 				 void *data, int len)
169 
170 {
171 	static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
172 	u8 mode = (ch_to_mux[channel->channel] << 4) |
173 		  (channel->differential ? 0 : 0x80);
174 
175 	return adc12138_mode_programming(adc, mode, data, len);
176 }
177 
adc12138_start_conv(struct adc12138 * adc,struct iio_chan_spec const * channel)178 static int adc12138_start_conv(struct adc12138 *adc,
179 			       struct iio_chan_spec const *channel)
180 {
181 	u8 trash;
182 
183 	return __adc12138_start_conv(adc, channel, &trash, 1);
184 }
185 
adc12138_start_and_read_conv(struct adc12138 * adc,struct iio_chan_spec const * channel,__be16 * data)186 static int adc12138_start_and_read_conv(struct adc12138 *adc,
187 					struct iio_chan_spec const *channel,
188 					__be16 *data)
189 {
190 	return __adc12138_start_conv(adc, channel, data, 2);
191 }
192 
adc12138_read_conv_data(struct adc12138 * adc,__be16 * value)193 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
194 {
195 	/* Issue a read status instruction and read previous conversion data */
196 	return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
197 					 value, sizeof(*value));
198 }
199 
adc12138_wait_eoc(struct adc12138 * adc,unsigned long timeout)200 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
201 {
202 	if (!wait_for_completion_timeout(&adc->complete, timeout))
203 		return -ETIMEDOUT;
204 
205 	return 0;
206 }
207 
adc12138_adc_conversion(struct adc12138 * adc,struct iio_chan_spec const * channel,__be16 * value)208 static int adc12138_adc_conversion(struct adc12138 *adc,
209 				   struct iio_chan_spec const *channel,
210 				   __be16 *value)
211 {
212 	int ret;
213 
214 	reinit_completion(&adc->complete);
215 
216 	ret = adc12138_start_conv(adc, channel);
217 	if (ret)
218 		return ret;
219 
220 	ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
221 	if (ret)
222 		return ret;
223 
224 	return adc12138_read_conv_data(adc, value);
225 }
226 
adc12138_read_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int * value,int * shift,long mask)227 static int adc12138_read_raw(struct iio_dev *iio,
228 			     struct iio_chan_spec const *channel, int *value,
229 			     int *shift, long mask)
230 {
231 	struct adc12138 *adc = iio_priv(iio);
232 	int ret;
233 	__be16 data;
234 
235 	switch (mask) {
236 	case IIO_CHAN_INFO_RAW:
237 		mutex_lock(&adc->lock);
238 		ret = adc12138_adc_conversion(adc, channel, &data);
239 		mutex_unlock(&adc->lock);
240 		if (ret)
241 			return ret;
242 
243 		*value = sign_extend32(be16_to_cpu(data) >> channel->scan_type.shift,
244 				       channel->scan_type.realbits - 1);
245 
246 		return IIO_VAL_INT;
247 	case IIO_CHAN_INFO_SCALE:
248 		ret = regulator_get_voltage(adc->vref_p);
249 		if (ret < 0)
250 			return ret;
251 		*value = ret;
252 
253 		if (!IS_ERR(adc->vref_n)) {
254 			ret = regulator_get_voltage(adc->vref_n);
255 			if (ret < 0)
256 				return ret;
257 			*value -= ret;
258 		}
259 
260 		/* convert regulator output voltage to mV */
261 		*value /= 1000;
262 		*shift = channel->scan_type.realbits - 1;
263 
264 		return IIO_VAL_FRACTIONAL_LOG2;
265 	case IIO_CHAN_INFO_OFFSET:
266 		if (!IS_ERR(adc->vref_n)) {
267 			*value = regulator_get_voltage(adc->vref_n);
268 			if (*value < 0)
269 				return *value;
270 		} else {
271 			*value = 0;
272 		}
273 
274 		/* convert regulator output voltage to mV */
275 		*value /= 1000;
276 
277 		return IIO_VAL_INT;
278 	}
279 
280 	return -EINVAL;
281 }
282 
283 static const struct iio_info adc12138_info = {
284 	.read_raw = adc12138_read_raw,
285 };
286 
adc12138_init(struct adc12138 * adc)287 static int adc12138_init(struct adc12138 *adc)
288 {
289 	int ret;
290 	int status;
291 	u8 mode;
292 	u8 trash;
293 
294 	reinit_completion(&adc->complete);
295 
296 	ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
297 	if (ret)
298 		return ret;
299 
300 	/* data output at this time has no significance */
301 	status = adc12138_read_status(adc);
302 	if (status < 0)
303 		return status;
304 
305 	adc12138_wait_eoc(adc, msecs_to_jiffies(100));
306 
307 	status = adc12138_read_status(adc);
308 	if (status & ADC12138_STATUS_CAL) {
309 		dev_warn(&adc->spi->dev,
310 			"Auto Cal sequence is still in progress: %#x\n",
311 			status);
312 		return -EIO;
313 	}
314 
315 	switch (adc->acquisition_time) {
316 	case 6:
317 		mode = ADC12138_MODE_ACQUISITION_TIME_6;
318 		break;
319 	case 10:
320 		mode = ADC12138_MODE_ACQUISITION_TIME_10;
321 		break;
322 	case 18:
323 		mode = ADC12138_MODE_ACQUISITION_TIME_18;
324 		break;
325 	case 34:
326 		mode = ADC12138_MODE_ACQUISITION_TIME_34;
327 		break;
328 	default:
329 		return -EINVAL;
330 	}
331 
332 	return adc12138_mode_programming(adc, mode, &trash, 1);
333 }
334 
adc12138_trigger_handler(int irq,void * p)335 static irqreturn_t adc12138_trigger_handler(int irq, void *p)
336 {
337 	struct iio_poll_func *pf = p;
338 	struct iio_dev *indio_dev = pf->indio_dev;
339 	struct adc12138 *adc = iio_priv(indio_dev);
340 	__be16 trash;
341 	int ret;
342 	int scan_index;
343 	int i = 0;
344 
345 	mutex_lock(&adc->lock);
346 
347 	for_each_set_bit(scan_index, indio_dev->active_scan_mask,
348 			 indio_dev->masklength) {
349 		const struct iio_chan_spec *scan_chan =
350 				&indio_dev->channels[scan_index];
351 
352 		reinit_completion(&adc->complete);
353 
354 		ret = adc12138_start_and_read_conv(adc, scan_chan,
355 					i ? &adc->data[i - 1] : &trash);
356 		if (ret) {
357 			dev_warn(&adc->spi->dev,
358 				 "failed to start conversion\n");
359 			goto out;
360 		}
361 
362 		ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
363 		if (ret) {
364 			dev_warn(&adc->spi->dev, "wait eoc timeout\n");
365 			goto out;
366 		}
367 
368 		i++;
369 	}
370 
371 	if (i) {
372 		ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
373 		if (ret) {
374 			dev_warn(&adc->spi->dev,
375 				 "failed to get conversion data\n");
376 			goto out;
377 		}
378 	}
379 
380 	iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
381 					   iio_get_time_ns(indio_dev));
382 out:
383 	mutex_unlock(&adc->lock);
384 
385 	iio_trigger_notify_done(indio_dev->trig);
386 
387 	return IRQ_HANDLED;
388 }
389 
adc12138_eoc_handler(int irq,void * p)390 static irqreturn_t adc12138_eoc_handler(int irq, void *p)
391 {
392 	struct iio_dev *indio_dev = p;
393 	struct adc12138 *adc = iio_priv(indio_dev);
394 
395 	complete(&adc->complete);
396 
397 	return IRQ_HANDLED;
398 }
399 
adc12138_probe(struct spi_device * spi)400 static int adc12138_probe(struct spi_device *spi)
401 {
402 	struct iio_dev *indio_dev;
403 	struct adc12138 *adc;
404 	int ret;
405 
406 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
407 	if (!indio_dev)
408 		return -ENOMEM;
409 
410 	adc = iio_priv(indio_dev);
411 	adc->spi = spi;
412 	adc->id = spi_get_device_id(spi)->driver_data;
413 	mutex_init(&adc->lock);
414 	init_completion(&adc->complete);
415 
416 	indio_dev->name = spi_get_device_id(spi)->name;
417 	indio_dev->info = &adc12138_info;
418 	indio_dev->modes = INDIO_DIRECT_MODE;
419 
420 	switch (adc->id) {
421 	case adc12130:
422 	case adc12132:
423 		indio_dev->channels = adc12132_channels;
424 		indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
425 		break;
426 	case adc12138:
427 		indio_dev->channels = adc12138_channels;
428 		indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
429 		break;
430 	default:
431 		return -EINVAL;
432 	}
433 
434 	ret = device_property_read_u32(&spi->dev, "ti,acquisition-time",
435 				       &adc->acquisition_time);
436 	if (ret)
437 		adc->acquisition_time = 10;
438 
439 	adc->cclk = devm_clk_get(&spi->dev, NULL);
440 	if (IS_ERR(adc->cclk))
441 		return PTR_ERR(adc->cclk);
442 
443 	adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
444 	if (IS_ERR(adc->vref_p))
445 		return PTR_ERR(adc->vref_p);
446 
447 	adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
448 	if (IS_ERR(adc->vref_n)) {
449 		/*
450 		 * Assume vref_n is 0V if an optional regulator is not
451 		 * specified, otherwise return the error code.
452 		 */
453 		ret = PTR_ERR(adc->vref_n);
454 		if (ret != -ENODEV)
455 			return ret;
456 	}
457 
458 	ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
459 			       IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
460 	if (ret)
461 		return ret;
462 
463 	ret = clk_prepare_enable(adc->cclk);
464 	if (ret)
465 		return ret;
466 
467 	ret = regulator_enable(adc->vref_p);
468 	if (ret)
469 		goto err_clk_disable;
470 
471 	if (!IS_ERR(adc->vref_n)) {
472 		ret = regulator_enable(adc->vref_n);
473 		if (ret)
474 			goto err_vref_p_disable;
475 	}
476 
477 	ret = adc12138_init(adc);
478 	if (ret)
479 		goto err_vref_n_disable;
480 
481 	spi_set_drvdata(spi, indio_dev);
482 
483 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
484 					 adc12138_trigger_handler, NULL);
485 	if (ret)
486 		goto err_vref_n_disable;
487 
488 	ret = iio_device_register(indio_dev);
489 	if (ret)
490 		goto err_buffer_cleanup;
491 
492 	return 0;
493 err_buffer_cleanup:
494 	iio_triggered_buffer_cleanup(indio_dev);
495 err_vref_n_disable:
496 	if (!IS_ERR(adc->vref_n))
497 		regulator_disable(adc->vref_n);
498 err_vref_p_disable:
499 	regulator_disable(adc->vref_p);
500 err_clk_disable:
501 	clk_disable_unprepare(adc->cclk);
502 
503 	return ret;
504 }
505 
adc12138_remove(struct spi_device * spi)506 static void adc12138_remove(struct spi_device *spi)
507 {
508 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
509 	struct adc12138 *adc = iio_priv(indio_dev);
510 
511 	iio_device_unregister(indio_dev);
512 	iio_triggered_buffer_cleanup(indio_dev);
513 	if (!IS_ERR(adc->vref_n))
514 		regulator_disable(adc->vref_n);
515 	regulator_disable(adc->vref_p);
516 	clk_disable_unprepare(adc->cclk);
517 }
518 
519 static const struct of_device_id adc12138_dt_ids[] = {
520 	{ .compatible = "ti,adc12130", },
521 	{ .compatible = "ti,adc12132", },
522 	{ .compatible = "ti,adc12138", },
523 	{}
524 };
525 MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
526 
527 static const struct spi_device_id adc12138_id[] = {
528 	{ "adc12130", adc12130 },
529 	{ "adc12132", adc12132 },
530 	{ "adc12138", adc12138 },
531 	{}
532 };
533 MODULE_DEVICE_TABLE(spi, adc12138_id);
534 
535 static struct spi_driver adc12138_driver = {
536 	.driver = {
537 		.name = "adc12138",
538 		.of_match_table = adc12138_dt_ids,
539 	},
540 	.probe = adc12138_probe,
541 	.remove = adc12138_remove,
542 	.id_table = adc12138_id,
543 };
544 module_spi_driver(adc12138_driver);
545 
546 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
547 MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
548 MODULE_LICENSE("GPL v2");
549