1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * VGIC: KVM DEVICE API
4 *
5 * Copyright (C) 2015 ARM Ltd.
6 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 */
8 #include <linux/kvm_host.h>
9 #include <kvm/arm_vgic.h>
10 #include <linux/uaccess.h>
11 #include <asm/kvm_mmu.h>
12 #include <asm/cputype.h>
13 #include "vgic.h"
14
15 /* common helpers */
16
vgic_check_iorange(struct kvm * kvm,phys_addr_t ioaddr,phys_addr_t addr,phys_addr_t alignment,phys_addr_t size)17 int vgic_check_iorange(struct kvm *kvm, phys_addr_t ioaddr,
18 phys_addr_t addr, phys_addr_t alignment,
19 phys_addr_t size)
20 {
21 if (!IS_VGIC_ADDR_UNDEF(ioaddr))
22 return -EEXIST;
23
24 if (!IS_ALIGNED(addr, alignment) || !IS_ALIGNED(size, alignment))
25 return -EINVAL;
26
27 if (addr + size < addr)
28 return -EINVAL;
29
30 if (addr & ~kvm_phys_mask(kvm) || addr + size > kvm_phys_size(kvm))
31 return -E2BIG;
32
33 return 0;
34 }
35
vgic_check_type(struct kvm * kvm,int type_needed)36 static int vgic_check_type(struct kvm *kvm, int type_needed)
37 {
38 if (kvm->arch.vgic.vgic_model != type_needed)
39 return -ENODEV;
40 else
41 return 0;
42 }
43
kvm_set_legacy_vgic_v2_addr(struct kvm * kvm,struct kvm_arm_device_addr * dev_addr)44 int kvm_set_legacy_vgic_v2_addr(struct kvm *kvm, struct kvm_arm_device_addr *dev_addr)
45 {
46 struct vgic_dist *vgic = &kvm->arch.vgic;
47 int r;
48
49 mutex_lock(&kvm->arch.config_lock);
50 switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) {
51 case KVM_VGIC_V2_ADDR_TYPE_DIST:
52 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
53 if (!r)
54 r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr,
55 SZ_4K, KVM_VGIC_V2_DIST_SIZE);
56 if (!r)
57 vgic->vgic_dist_base = dev_addr->addr;
58 break;
59 case KVM_VGIC_V2_ADDR_TYPE_CPU:
60 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
61 if (!r)
62 r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr,
63 SZ_4K, KVM_VGIC_V2_CPU_SIZE);
64 if (!r)
65 vgic->vgic_cpu_base = dev_addr->addr;
66 break;
67 default:
68 r = -ENODEV;
69 }
70
71 mutex_unlock(&kvm->arch.config_lock);
72
73 return r;
74 }
75
76 /**
77 * kvm_vgic_addr - set or get vgic VM base addresses
78 * @kvm: pointer to the vm struct
79 * @attr: pointer to the attribute being retrieved/updated
80 * @write: if true set the address in the VM address space, if false read the
81 * address
82 *
83 * Set or get the vgic base addresses for the distributor and the virtual CPU
84 * interface in the VM physical address space. These addresses are properties
85 * of the emulated core/SoC and therefore user space initially knows this
86 * information.
87 * Check them for sanity (alignment, double assignment). We can't check for
88 * overlapping regions in case of a virtual GICv3 here, since we don't know
89 * the number of VCPUs yet, so we defer this check to map_resources().
90 */
kvm_vgic_addr(struct kvm * kvm,struct kvm_device_attr * attr,bool write)91 static int kvm_vgic_addr(struct kvm *kvm, struct kvm_device_attr *attr, bool write)
92 {
93 u64 __user *uaddr = (u64 __user *)attr->addr;
94 struct vgic_dist *vgic = &kvm->arch.vgic;
95 phys_addr_t *addr_ptr, alignment, size;
96 u64 undef_value = VGIC_ADDR_UNDEF;
97 u64 addr;
98 int r;
99
100 /* Reading a redistributor region addr implies getting the index */
101 if (write || attr->attr == KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION)
102 if (get_user(addr, uaddr))
103 return -EFAULT;
104
105 /*
106 * Since we can't hold config_lock while registering the redistributor
107 * iodevs, take the slots_lock immediately.
108 */
109 mutex_lock(&kvm->slots_lock);
110 switch (attr->attr) {
111 case KVM_VGIC_V2_ADDR_TYPE_DIST:
112 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
113 addr_ptr = &vgic->vgic_dist_base;
114 alignment = SZ_4K;
115 size = KVM_VGIC_V2_DIST_SIZE;
116 break;
117 case KVM_VGIC_V2_ADDR_TYPE_CPU:
118 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
119 addr_ptr = &vgic->vgic_cpu_base;
120 alignment = SZ_4K;
121 size = KVM_VGIC_V2_CPU_SIZE;
122 break;
123 case KVM_VGIC_V3_ADDR_TYPE_DIST:
124 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
125 addr_ptr = &vgic->vgic_dist_base;
126 alignment = SZ_64K;
127 size = KVM_VGIC_V3_DIST_SIZE;
128 break;
129 case KVM_VGIC_V3_ADDR_TYPE_REDIST: {
130 struct vgic_redist_region *rdreg;
131
132 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
133 if (r)
134 break;
135 if (write) {
136 r = vgic_v3_set_redist_base(kvm, 0, addr, 0);
137 goto out;
138 }
139 rdreg = list_first_entry_or_null(&vgic->rd_regions,
140 struct vgic_redist_region, list);
141 if (!rdreg)
142 addr_ptr = &undef_value;
143 else
144 addr_ptr = &rdreg->base;
145 break;
146 }
147 case KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION:
148 {
149 struct vgic_redist_region *rdreg;
150 u8 index;
151
152 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3);
153 if (r)
154 break;
155
156 index = addr & KVM_VGIC_V3_RDIST_INDEX_MASK;
157
158 if (write) {
159 gpa_t base = addr & KVM_VGIC_V3_RDIST_BASE_MASK;
160 u32 count = FIELD_GET(KVM_VGIC_V3_RDIST_COUNT_MASK, addr);
161 u8 flags = FIELD_GET(KVM_VGIC_V3_RDIST_FLAGS_MASK, addr);
162
163 if (!count || flags)
164 r = -EINVAL;
165 else
166 r = vgic_v3_set_redist_base(kvm, index,
167 base, count);
168 goto out;
169 }
170
171 rdreg = vgic_v3_rdist_region_from_index(kvm, index);
172 if (!rdreg) {
173 r = -ENOENT;
174 goto out;
175 }
176
177 addr = index;
178 addr |= rdreg->base;
179 addr |= (u64)rdreg->count << KVM_VGIC_V3_RDIST_COUNT_SHIFT;
180 goto out;
181 }
182 default:
183 r = -ENODEV;
184 }
185
186 if (r)
187 goto out;
188
189 mutex_lock(&kvm->arch.config_lock);
190 if (write) {
191 r = vgic_check_iorange(kvm, *addr_ptr, addr, alignment, size);
192 if (!r)
193 *addr_ptr = addr;
194 } else {
195 addr = *addr_ptr;
196 }
197 mutex_unlock(&kvm->arch.config_lock);
198
199 out:
200 mutex_unlock(&kvm->slots_lock);
201
202 if (!r && !write)
203 r = put_user(addr, uaddr);
204
205 return r;
206 }
207
vgic_set_common_attr(struct kvm_device * dev,struct kvm_device_attr * attr)208 static int vgic_set_common_attr(struct kvm_device *dev,
209 struct kvm_device_attr *attr)
210 {
211 int r;
212
213 switch (attr->group) {
214 case KVM_DEV_ARM_VGIC_GRP_ADDR:
215 r = kvm_vgic_addr(dev->kvm, attr, true);
216 return (r == -ENODEV) ? -ENXIO : r;
217 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
218 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
219 u32 val;
220 int ret = 0;
221
222 if (get_user(val, uaddr))
223 return -EFAULT;
224
225 /*
226 * We require:
227 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
228 * - at most 1024 interrupts
229 * - a multiple of 32 interrupts
230 */
231 if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
232 val > VGIC_MAX_RESERVED ||
233 (val & 31))
234 return -EINVAL;
235
236 mutex_lock(&dev->kvm->arch.config_lock);
237
238 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
239 ret = -EBUSY;
240 else
241 dev->kvm->arch.vgic.nr_spis =
242 val - VGIC_NR_PRIVATE_IRQS;
243
244 mutex_unlock(&dev->kvm->arch.config_lock);
245
246 return ret;
247 }
248 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
249 switch (attr->attr) {
250 case KVM_DEV_ARM_VGIC_CTRL_INIT:
251 mutex_lock(&dev->kvm->arch.config_lock);
252 r = vgic_init(dev->kvm);
253 mutex_unlock(&dev->kvm->arch.config_lock);
254 return r;
255 case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
256 /*
257 * OK, this one isn't common at all, but we
258 * want to handle all control group attributes
259 * in a single place.
260 */
261 if (vgic_check_type(dev->kvm, KVM_DEV_TYPE_ARM_VGIC_V3))
262 return -ENXIO;
263 mutex_lock(&dev->kvm->lock);
264
265 if (!lock_all_vcpus(dev->kvm)) {
266 mutex_unlock(&dev->kvm->lock);
267 return -EBUSY;
268 }
269
270 mutex_lock(&dev->kvm->arch.config_lock);
271 r = vgic_v3_save_pending_tables(dev->kvm);
272 mutex_unlock(&dev->kvm->arch.config_lock);
273 unlock_all_vcpus(dev->kvm);
274 mutex_unlock(&dev->kvm->lock);
275 return r;
276 }
277 break;
278 }
279 }
280
281 return -ENXIO;
282 }
283
vgic_get_common_attr(struct kvm_device * dev,struct kvm_device_attr * attr)284 static int vgic_get_common_attr(struct kvm_device *dev,
285 struct kvm_device_attr *attr)
286 {
287 int r = -ENXIO;
288
289 switch (attr->group) {
290 case KVM_DEV_ARM_VGIC_GRP_ADDR:
291 r = kvm_vgic_addr(dev->kvm, attr, false);
292 return (r == -ENODEV) ? -ENXIO : r;
293 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
294 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
295
296 r = put_user(dev->kvm->arch.vgic.nr_spis +
297 VGIC_NR_PRIVATE_IRQS, uaddr);
298 break;
299 }
300 }
301
302 return r;
303 }
304
vgic_create(struct kvm_device * dev,u32 type)305 static int vgic_create(struct kvm_device *dev, u32 type)
306 {
307 return kvm_vgic_create(dev->kvm, type);
308 }
309
vgic_destroy(struct kvm_device * dev)310 static void vgic_destroy(struct kvm_device *dev)
311 {
312 kfree(dev);
313 }
314
kvm_register_vgic_device(unsigned long type)315 int kvm_register_vgic_device(unsigned long type)
316 {
317 int ret = -ENODEV;
318
319 switch (type) {
320 case KVM_DEV_TYPE_ARM_VGIC_V2:
321 ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
322 KVM_DEV_TYPE_ARM_VGIC_V2);
323 break;
324 case KVM_DEV_TYPE_ARM_VGIC_V3:
325 ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
326 KVM_DEV_TYPE_ARM_VGIC_V3);
327
328 if (ret)
329 break;
330 ret = kvm_vgic_register_its_device();
331 break;
332 }
333
334 return ret;
335 }
336
vgic_v2_parse_attr(struct kvm_device * dev,struct kvm_device_attr * attr,struct vgic_reg_attr * reg_attr)337 int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
338 struct vgic_reg_attr *reg_attr)
339 {
340 int cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr->attr);
341
342 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
343 reg_attr->vcpu = kvm_get_vcpu_by_id(dev->kvm, cpuid);
344 if (!reg_attr->vcpu)
345 return -EINVAL;
346
347 return 0;
348 }
349
350 /**
351 * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
352 *
353 * @dev: kvm device handle
354 * @attr: kvm device attribute
355 * @is_write: true if userspace is writing a register
356 */
vgic_v2_attr_regs_access(struct kvm_device * dev,struct kvm_device_attr * attr,bool is_write)357 static int vgic_v2_attr_regs_access(struct kvm_device *dev,
358 struct kvm_device_attr *attr,
359 bool is_write)
360 {
361 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
362 struct vgic_reg_attr reg_attr;
363 gpa_t addr;
364 struct kvm_vcpu *vcpu;
365 int ret;
366 u32 val;
367
368 ret = vgic_v2_parse_attr(dev, attr, ®_attr);
369 if (ret)
370 return ret;
371
372 vcpu = reg_attr.vcpu;
373 addr = reg_attr.addr;
374
375 if (is_write)
376 if (get_user(val, uaddr))
377 return -EFAULT;
378
379 mutex_lock(&dev->kvm->lock);
380
381 if (!lock_all_vcpus(dev->kvm)) {
382 mutex_unlock(&dev->kvm->lock);
383 return -EBUSY;
384 }
385
386 mutex_lock(&dev->kvm->arch.config_lock);
387
388 ret = vgic_init(dev->kvm);
389 if (ret)
390 goto out;
391
392 switch (attr->group) {
393 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
394 ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, &val);
395 break;
396 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
397 ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, &val);
398 break;
399 default:
400 ret = -EINVAL;
401 break;
402 }
403
404 out:
405 mutex_unlock(&dev->kvm->arch.config_lock);
406 unlock_all_vcpus(dev->kvm);
407 mutex_unlock(&dev->kvm->lock);
408
409 if (!ret && !is_write)
410 ret = put_user(val, uaddr);
411
412 return ret;
413 }
414
vgic_v2_set_attr(struct kvm_device * dev,struct kvm_device_attr * attr)415 static int vgic_v2_set_attr(struct kvm_device *dev,
416 struct kvm_device_attr *attr)
417 {
418 switch (attr->group) {
419 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
420 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
421 return vgic_v2_attr_regs_access(dev, attr, true);
422 default:
423 return vgic_set_common_attr(dev, attr);
424 }
425 }
426
vgic_v2_get_attr(struct kvm_device * dev,struct kvm_device_attr * attr)427 static int vgic_v2_get_attr(struct kvm_device *dev,
428 struct kvm_device_attr *attr)
429 {
430 switch (attr->group) {
431 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
432 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
433 return vgic_v2_attr_regs_access(dev, attr, false);
434 default:
435 return vgic_get_common_attr(dev, attr);
436 }
437 }
438
vgic_v2_has_attr(struct kvm_device * dev,struct kvm_device_attr * attr)439 static int vgic_v2_has_attr(struct kvm_device *dev,
440 struct kvm_device_attr *attr)
441 {
442 switch (attr->group) {
443 case KVM_DEV_ARM_VGIC_GRP_ADDR:
444 switch (attr->attr) {
445 case KVM_VGIC_V2_ADDR_TYPE_DIST:
446 case KVM_VGIC_V2_ADDR_TYPE_CPU:
447 return 0;
448 }
449 break;
450 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
451 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
452 return vgic_v2_has_attr_regs(dev, attr);
453 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
454 return 0;
455 case KVM_DEV_ARM_VGIC_GRP_CTRL:
456 switch (attr->attr) {
457 case KVM_DEV_ARM_VGIC_CTRL_INIT:
458 return 0;
459 }
460 }
461 return -ENXIO;
462 }
463
464 struct kvm_device_ops kvm_arm_vgic_v2_ops = {
465 .name = "kvm-arm-vgic-v2",
466 .create = vgic_create,
467 .destroy = vgic_destroy,
468 .set_attr = vgic_v2_set_attr,
469 .get_attr = vgic_v2_get_attr,
470 .has_attr = vgic_v2_has_attr,
471 };
472
vgic_v3_parse_attr(struct kvm_device * dev,struct kvm_device_attr * attr,struct vgic_reg_attr * reg_attr)473 int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
474 struct vgic_reg_attr *reg_attr)
475 {
476 unsigned long vgic_mpidr, mpidr_reg;
477
478 /*
479 * For KVM_DEV_ARM_VGIC_GRP_DIST_REGS group,
480 * attr might not hold MPIDR. Hence assume vcpu0.
481 */
482 if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) {
483 vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >>
484 KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT;
485
486 mpidr_reg = VGIC_TO_MPIDR(vgic_mpidr);
487 reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg);
488 } else {
489 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0);
490 }
491
492 if (!reg_attr->vcpu)
493 return -EINVAL;
494
495 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
496
497 return 0;
498 }
499
500 /*
501 * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
502 *
503 * @dev: kvm device handle
504 * @attr: kvm device attribute
505 * @is_write: true if userspace is writing a register
506 */
vgic_v3_attr_regs_access(struct kvm_device * dev,struct kvm_device_attr * attr,bool is_write)507 static int vgic_v3_attr_regs_access(struct kvm_device *dev,
508 struct kvm_device_attr *attr,
509 bool is_write)
510 {
511 struct vgic_reg_attr reg_attr;
512 gpa_t addr;
513 struct kvm_vcpu *vcpu;
514 bool uaccess;
515 u32 val;
516 int ret;
517
518 ret = vgic_v3_parse_attr(dev, attr, ®_attr);
519 if (ret)
520 return ret;
521
522 vcpu = reg_attr.vcpu;
523 addr = reg_attr.addr;
524
525 switch (attr->group) {
526 case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
527 /* Sysregs uaccess is performed by the sysreg handling code */
528 uaccess = false;
529 break;
530 default:
531 uaccess = true;
532 }
533
534 if (uaccess && is_write) {
535 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
536 if (get_user(val, uaddr))
537 return -EFAULT;
538 }
539
540 mutex_lock(&dev->kvm->lock);
541
542 if (!lock_all_vcpus(dev->kvm)) {
543 mutex_unlock(&dev->kvm->lock);
544 return -EBUSY;
545 }
546
547 mutex_lock(&dev->kvm->arch.config_lock);
548
549 if (unlikely(!vgic_initialized(dev->kvm))) {
550 ret = -EBUSY;
551 goto out;
552 }
553
554 switch (attr->group) {
555 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
556 ret = vgic_v3_dist_uaccess(vcpu, is_write, addr, &val);
557 break;
558 case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
559 ret = vgic_v3_redist_uaccess(vcpu, is_write, addr, &val);
560 break;
561 case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
562 ret = vgic_v3_cpu_sysregs_uaccess(vcpu, attr, is_write);
563 break;
564 case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
565 unsigned int info, intid;
566
567 info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
568 KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT;
569 if (info == VGIC_LEVEL_INFO_LINE_LEVEL) {
570 intid = attr->attr &
571 KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK;
572 ret = vgic_v3_line_level_info_uaccess(vcpu, is_write,
573 intid, &val);
574 } else {
575 ret = -EINVAL;
576 }
577 break;
578 }
579 default:
580 ret = -EINVAL;
581 break;
582 }
583
584 out:
585 mutex_unlock(&dev->kvm->arch.config_lock);
586 unlock_all_vcpus(dev->kvm);
587 mutex_unlock(&dev->kvm->lock);
588
589 if (!ret && uaccess && !is_write) {
590 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr;
591 ret = put_user(val, uaddr);
592 }
593
594 return ret;
595 }
596
vgic_v3_set_attr(struct kvm_device * dev,struct kvm_device_attr * attr)597 static int vgic_v3_set_attr(struct kvm_device *dev,
598 struct kvm_device_attr *attr)
599 {
600 switch (attr->group) {
601 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
602 case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
603 case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
604 case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:
605 return vgic_v3_attr_regs_access(dev, attr, true);
606 default:
607 return vgic_set_common_attr(dev, attr);
608 }
609 }
610
vgic_v3_get_attr(struct kvm_device * dev,struct kvm_device_attr * attr)611 static int vgic_v3_get_attr(struct kvm_device *dev,
612 struct kvm_device_attr *attr)
613 {
614 switch (attr->group) {
615 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
616 case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
617 case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
618 case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO:
619 return vgic_v3_attr_regs_access(dev, attr, false);
620 default:
621 return vgic_get_common_attr(dev, attr);
622 }
623 }
624
vgic_v3_has_attr(struct kvm_device * dev,struct kvm_device_attr * attr)625 static int vgic_v3_has_attr(struct kvm_device *dev,
626 struct kvm_device_attr *attr)
627 {
628 switch (attr->group) {
629 case KVM_DEV_ARM_VGIC_GRP_ADDR:
630 switch (attr->attr) {
631 case KVM_VGIC_V3_ADDR_TYPE_DIST:
632 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
633 case KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION:
634 return 0;
635 }
636 break;
637 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
638 case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
639 case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
640 return vgic_v3_has_attr_regs(dev, attr);
641 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
642 return 0;
643 case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
644 if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
645 KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) ==
646 VGIC_LEVEL_INFO_LINE_LEVEL)
647 return 0;
648 break;
649 }
650 case KVM_DEV_ARM_VGIC_GRP_CTRL:
651 switch (attr->attr) {
652 case KVM_DEV_ARM_VGIC_CTRL_INIT:
653 return 0;
654 case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
655 return 0;
656 }
657 }
658 return -ENXIO;
659 }
660
661 struct kvm_device_ops kvm_arm_vgic_v3_ops = {
662 .name = "kvm-arm-vgic-v3",
663 .create = vgic_create,
664 .destroy = vgic_destroy,
665 .set_attr = vgic_v3_set_attr,
666 .get_attr = vgic_v3_get_attr,
667 .has_attr = vgic_v3_has_attr,
668 };
669