1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Code used by both U-Boot and SPL for Compulab CM-FX6
4 *
5 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
6 *
7 * Author: Nikita Kiryanov <nikita@compulab.co.il>
8 */
9
10 #include <common.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/gpio.h>
13 #include <asm/mach-imx/spi.h>
14 #include <fsl_esdhc.h>
15 #include "common.h"
16
17 #ifdef CONFIG_FSL_ESDHC
18 #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
19 PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
20 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
21
22 static iomux_v3_cfg_t const usdhc_pads[] = {
23 IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
24 IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
25 IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
26 IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
27 IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
28 IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
29
30 IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
31 IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
32 IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
33 IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
34 IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
35 IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
36
37 IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
38 IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
39 IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
40 IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
41 IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
42 IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
43 IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
44 IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
45 IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
46 IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
47 };
48
cm_fx6_set_usdhc_iomux(void)49 void cm_fx6_set_usdhc_iomux(void)
50 {
51 SETUP_IOMUX_PADS(usdhc_pads);
52 }
53
54 /* CINS bit doesn't work, so always try to access the MMC card */
board_mmc_getcd(struct mmc * mmc)55 int board_mmc_getcd(struct mmc *mmc)
56 {
57 return 1;
58 }
59 #endif
60
61 #ifdef CONFIG_MXC_SPI
62 #define ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
63 PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
64
65 static iomux_v3_cfg_t const ecspi_pads[] = {
66 IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
67 IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
68 IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
69 IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
70 IOMUX_PADS(PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
71 };
72
cm_fx6_set_ecspi_iomux(void)73 void cm_fx6_set_ecspi_iomux(void)
74 {
75 SETUP_IOMUX_PADS(ecspi_pads);
76 }
77
board_spi_cs_gpio(unsigned bus,unsigned cs)78 int board_spi_cs_gpio(unsigned bus, unsigned cs)
79 {
80 return (bus == 0 && cs == 0) ? (CM_FX6_ECSPI_BUS0_CS0) : -1;
81 }
82 #endif
83