xref: /openbmc/linux/arch/arm/mach-ep93xx/ts72xx.c (revision 75577fbe)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * arch/arm/mach-ep93xx/ts72xx.c
4  * Technologic Systems TS72xx SBC support.
5  *
6  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
7  */
8 
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/io.h>
15 #include <linux/mtd/platnand.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/spi/mmc_spi.h>
19 #include <linux/mmc/host.h>
20 #include <linux/platform_data/spi-ep93xx.h>
21 #include <linux/gpio/machine.h>
22 
23 #include "gpio-ep93xx.h"
24 #include "hardware.h"
25 
26 #include <asm/mach-types.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/arch.h>
29 
30 #include "soc.h"
31 #include "ts72xx.h"
32 
33 /*************************************************************************
34  * IO map
35  *************************************************************************/
36 static struct map_desc ts72xx_io_desc[] __initdata = {
37 	{
38 		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
39 		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
40 		.length		= TS72XX_MODEL_SIZE,
41 		.type		= MT_DEVICE,
42 	}, {
43 		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
44 		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
45 		.length		= TS72XX_OPTIONS_SIZE,
46 		.type		= MT_DEVICE,
47 	}, {
48 		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
49 		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
50 		.length		= TS72XX_OPTIONS2_SIZE,
51 		.type		= MT_DEVICE,
52 	}, {
53 		.virtual	= (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
54 		.pfn		= __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
55 		.length		= TS72XX_CPLDVER_SIZE,
56 		.type		= MT_DEVICE,
57 	}
58 };
59 
ts72xx_map_io(void)60 static void __init ts72xx_map_io(void)
61 {
62 	ep93xx_map_io();
63 	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
64 }
65 
66 
67 /*************************************************************************
68  * NAND flash
69  *************************************************************************/
70 #define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
71 #define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */
72 
ts72xx_nand_hwcontrol(struct nand_chip * chip,int cmd,unsigned int ctrl)73 static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
74 				  int cmd, unsigned int ctrl)
75 {
76 	if (ctrl & NAND_CTRL_CHANGE) {
77 		void __iomem *addr = chip->legacy.IO_ADDR_R;
78 		unsigned char bits;
79 
80 		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
81 
82 		bits = __raw_readb(addr) & ~0x07;
83 		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
84 		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
85 		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */
86 
87 		__raw_writeb(bits, addr);
88 	}
89 
90 	if (cmd != NAND_CMD_NONE)
91 		__raw_writeb(cmd, chip->legacy.IO_ADDR_W);
92 }
93 
ts72xx_nand_device_ready(struct nand_chip * chip)94 static int ts72xx_nand_device_ready(struct nand_chip *chip)
95 {
96 	void __iomem *addr = chip->legacy.IO_ADDR_R;
97 
98 	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
99 
100 	return !!(__raw_readb(addr) & 0x20);
101 }
102 
103 #define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
104 #define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)
105 
106 static struct mtd_partition ts72xx_nand_parts[] = {
107 	{
108 		.name		= "TS-BOOTROM",
109 		.offset		= 0,
110 		.size		= TS72XX_BOOTROM_PART_SIZE,
111 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
112 	}, {
113 		.name		= "Linux",
114 		.offset		= MTDPART_OFS_RETAIN,
115 		.size		= TS72XX_REDBOOT_PART_SIZE,
116 				/* leave so much for last partition */
117 	}, {
118 		.name		= "RedBoot",
119 		.offset		= MTDPART_OFS_APPEND,
120 		.size		= MTDPART_SIZ_FULL,
121 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
122 	},
123 };
124 
125 static struct platform_nand_data ts72xx_nand_data = {
126 	.chip = {
127 		.nr_chips	= 1,
128 		.chip_offset	= 0,
129 		.chip_delay	= 15,
130 	},
131 	.ctrl = {
132 		.cmd_ctrl	= ts72xx_nand_hwcontrol,
133 		.dev_ready	= ts72xx_nand_device_ready,
134 	},
135 };
136 
137 static struct resource ts72xx_nand_resource[] = {
138 	{
139 		.start		= 0,			/* filled in later */
140 		.end		= 0,			/* filled in later */
141 		.flags		= IORESOURCE_MEM,
142 	},
143 };
144 
145 static struct platform_device ts72xx_nand_flash = {
146 	.name			= "gen_nand",
147 	.id			= -1,
148 	.dev.platform_data	= &ts72xx_nand_data,
149 	.resource		= ts72xx_nand_resource,
150 	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
151 };
152 
ts72xx_register_flash(struct mtd_partition * parts,int n,resource_size_t start)153 static void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
154 				  resource_size_t start)
155 {
156 	/*
157 	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
158 	 */
159 	if (board_is_ts7200()) {
160 		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
161 	} else {
162 		ts72xx_nand_resource[0].start = start;
163 		ts72xx_nand_resource[0].end = start + SZ_16M - 1;
164 
165 		ts72xx_nand_data.chip.partitions = parts;
166 		ts72xx_nand_data.chip.nr_partitions = n;
167 
168 		platform_device_register(&ts72xx_nand_flash);
169 	}
170 }
171 
172 /*************************************************************************
173  * RTC M48T86
174  *************************************************************************/
175 #define TS72XX_RTC_INDEX_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x00800000)
176 #define TS72XX_RTC_DATA_PHYS_BASE	(EP93XX_CS1_PHYS_BASE + 0x01700000)
177 
178 static struct resource ts72xx_rtc_resources[] = {
179 	DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
180 	DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
181 };
182 
183 static struct platform_device ts72xx_rtc_device = {
184 	.name		= "rtc-m48t86",
185 	.id		= -1,
186 	.resource	= ts72xx_rtc_resources,
187 	.num_resources 	= ARRAY_SIZE(ts72xx_rtc_resources),
188 };
189 
190 /*************************************************************************
191  * Watchdog (in CPLD)
192  *************************************************************************/
193 #define TS72XX_WDT_CONTROL_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03800000)
194 #define TS72XX_WDT_FEED_PHYS_BASE	(EP93XX_CS2_PHYS_BASE + 0x03c00000)
195 
196 static struct resource ts72xx_wdt_resources[] = {
197 	DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
198 	DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
199 };
200 
201 static struct platform_device ts72xx_wdt_device = {
202 	.name		= "ts72xx-wdt",
203 	.id		= -1,
204 	.resource	= ts72xx_wdt_resources,
205 	.num_resources	= ARRAY_SIZE(ts72xx_wdt_resources),
206 };
207 
208 /*************************************************************************
209  * ETH
210  *************************************************************************/
211 static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
212 	.phy_id		= 1,
213 };
214 
215 /*************************************************************************
216  * SPI SD/MMC host
217  *************************************************************************/
218 #define BK3_EN_SDCARD_PHYS_BASE         0x12400000
219 #define BK3_EN_SDCARD_PWR 0x0
220 #define BK3_DIS_SDCARD_PWR 0x0C
bk3_mmc_spi_setpower(struct device * dev,unsigned int vdd)221 static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
222 {
223 	void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
224 
225 	if (!pwr_sd) {
226 		pr_err("Failed to enable SD card power!");
227 		return;
228 	}
229 
230 	pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
231 		 !!vdd ? "ON" : "OFF", vdd);
232 
233 	if (!!vdd)
234 		__raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
235 	else
236 		__raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
237 
238 	iounmap(pwr_sd);
239 }
240 
241 static struct mmc_spi_platform_data bk3_spi_mmc_data = {
242 	.detect_delay	= 500,
243 	.powerup_msecs	= 100,
244 	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
245 	.caps		= MMC_CAP_NONREMOVABLE,
246 	.setpower       = bk3_mmc_spi_setpower,
247 };
248 
249 /*************************************************************************
250  * SPI Bus - SD card access
251  *************************************************************************/
252 static struct spi_board_info bk3_spi_board_info[] __initdata = {
253 	{
254 		.modalias		= "mmc_spi",
255 		.platform_data		= &bk3_spi_mmc_data,
256 		.max_speed_hz		= 7.4E6,
257 		.bus_num		= 0,
258 		.chip_select		= 0,
259 		.mode			= SPI_MODE_0,
260 	},
261 };
262 
263 /*
264  * This is a stub -> the FGPIO[3] pin is not connected on the schematic
265  * The all work is performed automatically by !SPI_FRAME (SFRM1) and
266  * goes through CPLD
267  */
268 static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
269 	.dev_id = "spi0",
270 	.table = {
271 		GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
272 		{ },
273 	},
274 };
275 
276 static struct ep93xx_spi_info bk3_spi_master __initdata = {
277 	.use_dma	= 1,
278 };
279 
280 /*************************************************************************
281  * TS72XX support code
282  *************************************************************************/
283 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
284 
285 /* Relative to EP93XX_CS1_PHYS_BASE */
286 #define TS73XX_FPGA_LOADER_BASE		0x03c00000
287 
288 static struct resource ts73xx_fpga_resources[] = {
289 	{
290 		.start	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
291 		.end	= EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
292 		.flags	= IORESOURCE_MEM,
293 	},
294 };
295 
296 static struct platform_device ts73xx_fpga_device = {
297 	.name	= "ts73xx-fpga-mgr",
298 	.id	= -1,
299 	.resource = ts73xx_fpga_resources,
300 	.num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
301 };
302 
303 #endif
304 
305 /*************************************************************************
306  * SPI Bus
307  *************************************************************************/
308 static struct spi_board_info ts72xx_spi_devices[] __initdata = {
309 	{
310 		.modalias		= "tmp122",
311 		.max_speed_hz		= 2 * 1000 * 1000,
312 		.bus_num		= 0,
313 		.chip_select		= 0,
314 	},
315 };
316 
317 static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
318 	.dev_id = "spi0",
319 	.table = {
320 		/* DIO_17 */
321 		GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
322 		{ },
323 	},
324 };
325 
326 static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
327 	/* Intentionally left blank */
328 };
329 
ts72xx_init_machine(void)330 static void __init ts72xx_init_machine(void)
331 {
332 	ep93xx_init_devices();
333 	ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
334 			      is_ts9420_installed() ?
335 			      EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
336 	platform_device_register(&ts72xx_rtc_device);
337 	platform_device_register(&ts72xx_wdt_device);
338 
339 	ep93xx_register_eth(&ts72xx_eth_data, 1);
340 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
341 	if (board_is_ts7300())
342 		platform_device_register(&ts73xx_fpga_device);
343 #endif
344 	gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
345 	ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
346 			    ARRAY_SIZE(ts72xx_spi_devices));
347 }
348 
349 MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
350 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
351 	.atag_offset	= 0x100,
352 	.nr_irqs	= NR_EP93XX_IRQS,
353 	.map_io		= ts72xx_map_io,
354 	.init_irq	= ep93xx_init_irq,
355 	.init_time	= ep93xx_timer_init,
356 	.init_machine	= ts72xx_init_machine,
357 	.restart	= ep93xx_restart,
358 MACHINE_END
359 
360 /*************************************************************************
361  * EP93xx I2S audio peripheral handling
362  *************************************************************************/
363 static struct resource ep93xx_i2s_resource[] = {
364 	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
365 	DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
366 };
367 
368 static struct platform_device ep93xx_i2s_device = {
369 	.name		= "ep93xx-spilink-i2s",
370 	.id		= -1,
371 	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
372 	.resource	= ep93xx_i2s_resource,
373 };
374 
375 /*************************************************************************
376  * BK3 support code
377  *************************************************************************/
378 static struct mtd_partition bk3_nand_parts[] = {
379 	{
380 		.name		= "System",
381 		.offset	= 0x00000000,
382 		.size		= 0x01e00000,
383 	}, {
384 		.name		= "Data",
385 		.offset	= 0x01e00000,
386 		.size		= 0x05f20000
387 	}, {
388 		.name		= "RedBoot",
389 		.offset	= 0x07d20000,
390 		.size		= 0x002e0000,
391 		.mask_flags	= MTD_WRITEABLE,	/* force RO */
392 	},
393 };
394 
bk3_init_machine(void)395 static void __init bk3_init_machine(void)
396 {
397 	ep93xx_init_devices();
398 
399 	ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
400 			      EP93XX_CS6_PHYS_BASE);
401 
402 	ep93xx_register_eth(&ts72xx_eth_data, 1);
403 
404 	gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
405 	ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
406 			    ARRAY_SIZE(bk3_spi_board_info));
407 
408 	/* Configure ep93xx's I2S to use AC97 pins */
409 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
410 	platform_device_register(&ep93xx_i2s_device);
411 }
412 
413 MACHINE_START(BK3, "Liebherr controller BK3.1")
414 	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
415 	.atag_offset	= 0x100,
416 	.nr_irqs	= NR_EP93XX_IRQS,
417 	.map_io		= ts72xx_map_io,
418 	.init_irq	= ep93xx_init_irq,
419 	.init_time	= ep93xx_timer_init,
420 	.init_machine	= bk3_init_machine,
421 	.restart	= ep93xx_restart,
422 MACHINE_END
423