1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Teranetics PHY drivers
4 *
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 */
8 #include <common.h>
9 #include <phy.h>
10
11 #ifndef CONFIG_PHYLIB_10G
12 #error The Teranetics PHY needs 10G support
13 #endif
14
tn2020_config(struct phy_device * phydev)15 int tn2020_config(struct phy_device *phydev)
16 {
17 if (phydev->port == PORT_FIBRE) {
18 unsigned short restart_an = (MDIO_AN_CTRL1_RESTART |
19 MDIO_AN_CTRL1_ENABLE |
20 MDIO_AN_CTRL1_XNP);
21 u8 phy_hwversion;
22
23 /*
24 * bit 15:12 of register 30.32 indicates PHY hardware
25 * version. It can be used to distinguish TN80xx from
26 * TN2020. TN2020 needs write 0x2 to 30.93, but TN80xx
27 * needs 0x1.
28 */
29 phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf;
30 if (phy_hwversion <= 3) {
31 phy_write(phydev, 30, 93, 2);
32 phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an);
33 } else {
34 phy_write(phydev, 30, 93, 1);
35 }
36 }
37
38 return 0;
39 }
40
tn2020_startup(struct phy_device * phydev)41 int tn2020_startup(struct phy_device *phydev)
42 {
43 unsigned int timeout = 5 * 1000; /* 5 second timeout */
44
45 #define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \
46 MDIO_PHYXS_LNSTAT_SYNC1 | \
47 MDIO_PHYXS_LNSTAT_SYNC2 | \
48 MDIO_PHYXS_LNSTAT_SYNC3 | \
49 MDIO_PHYXS_LNSTAT_ALIGN)
50
51 /*
52 * Wait for the XAUI-SERDES lanes to align first. Under normal
53 * circumstances, this can take up to three seconds.
54 */
55 while (--timeout) {
56 int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT);
57 if (reg < 0) {
58 printf("TN2020: Error reading from PHY at "
59 "address %u\n", phydev->addr);
60 break;
61 }
62 if ((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY)
63 break;
64 udelay(1000);
65 }
66 if (!timeout) {
67 /*
68 * A timeout is bad, but it may not be fatal, so don't
69 * return an error. Display a warning instead.
70 */
71 printf("TN2020: Timeout waiting for PHY at address %u to "
72 "align.\n", phydev->addr);
73 }
74
75 if (phydev->port != PORT_FIBRE)
76 return gen10g_startup(phydev);
77
78 /*
79 * The TN2020 only pretends to support fiber.
80 * It works, but it doesn't look like it works,
81 * so the link status reports no link.
82 */
83 phydev->link = 1;
84
85 /* For now just lie and say it's 10G all the time */
86 phydev->speed = SPEED_10000;
87 phydev->duplex = DUPLEX_FULL;
88
89 return 0;
90 }
91
92 struct phy_driver tn2020_driver = {
93 .name = "Teranetics TN2020",
94 .uid = PHY_UID_TN2020,
95 .mask = 0xfffffff0,
96 .features = PHY_10G_FEATURES,
97 .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
98 MDIO_DEVS_PHYXS | MDIO_DEVS_AN |
99 MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2),
100 .config = &tn2020_config,
101 .startup = &tn2020_startup,
102 .shutdown = &gen10g_shutdown,
103 };
104
phy_teranetics_init(void)105 int phy_teranetics_init(void)
106 {
107 phy_register(&tn2020_driver);
108
109 return 0;
110 }
111