1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5 */
6
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_crtc.h>
10 #include <drm/drm_gem_dma_helper.h>
11 #include <drm/drm_vblank.h>
12
13 #include "tidss_crtc.h"
14 #include "tidss_dispc.h"
15 #include "tidss_drv.h"
16 #include "tidss_irq.h"
17 #include "tidss_plane.h"
18
19 /* Page flip and frame done IRQs */
20
tidss_crtc_finish_page_flip(struct tidss_crtc * tcrtc)21 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc)
22 {
23 struct drm_device *ddev = tcrtc->crtc.dev;
24 struct tidss_device *tidss = to_tidss(ddev);
25 struct drm_pending_vblank_event *event;
26 unsigned long flags;
27 bool busy;
28
29 spin_lock_irqsave(&ddev->event_lock, flags);
30
31 /*
32 * New settings are taken into use at VFP, and GO bit is cleared at
33 * the same time. This happens before the vertical blank interrupt.
34 * So there is a small change that the driver sets GO bit after VFP, but
35 * before vblank, and we have to check for that case here.
36 */
37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport);
38 if (busy) {
39 spin_unlock_irqrestore(&ddev->event_lock, flags);
40 return;
41 }
42
43 event = tcrtc->event;
44 tcrtc->event = NULL;
45
46 if (!event) {
47 spin_unlock_irqrestore(&ddev->event_lock, flags);
48 return;
49 }
50
51 drm_crtc_send_vblank_event(&tcrtc->crtc, event);
52
53 spin_unlock_irqrestore(&ddev->event_lock, flags);
54
55 drm_crtc_vblank_put(&tcrtc->crtc);
56 }
57
tidss_crtc_vblank_irq(struct drm_crtc * crtc)58 void tidss_crtc_vblank_irq(struct drm_crtc *crtc)
59 {
60 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
61
62 drm_crtc_handle_vblank(crtc);
63
64 tidss_crtc_finish_page_flip(tcrtc);
65 }
66
tidss_crtc_framedone_irq(struct drm_crtc * crtc)67 void tidss_crtc_framedone_irq(struct drm_crtc *crtc)
68 {
69 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
70
71 complete(&tcrtc->framedone_completion);
72 }
73
tidss_crtc_error_irq(struct drm_crtc * crtc,u64 irqstatus)74 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus)
75 {
76 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
77
78 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n",
79 tcrtc->hw_videoport, irqstatus);
80 }
81
82 /* drm_crtc_helper_funcs */
83
tidss_crtc_atomic_check(struct drm_crtc * crtc,struct drm_atomic_state * state)84 static int tidss_crtc_atomic_check(struct drm_crtc *crtc,
85 struct drm_atomic_state *state)
86 {
87 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
88 crtc);
89 struct drm_device *ddev = crtc->dev;
90 struct tidss_device *tidss = to_tidss(ddev);
91 struct dispc_device *dispc = tidss->dispc;
92 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
93 u32 hw_videoport = tcrtc->hw_videoport;
94 const struct drm_display_mode *mode;
95 enum drm_mode_status ok;
96
97 dev_dbg(ddev->dev, "%s\n", __func__);
98
99 if (!crtc_state->enable)
100 return 0;
101
102 mode = &crtc_state->adjusted_mode;
103
104 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode);
105 if (ok != MODE_OK) {
106 dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n",
107 __func__, mode->hdisplay, mode->vdisplay, mode->clock);
108 return -EINVAL;
109 }
110
111 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state);
112 }
113
114 /*
115 * This needs all affected planes to be present in the atomic
116 * state. The untouched planes are added to the state in
117 * tidss_atomic_check().
118 */
tidss_crtc_position_planes(struct tidss_device * tidss,struct drm_crtc * crtc,struct drm_crtc_state * old_state,bool newmodeset)119 static void tidss_crtc_position_planes(struct tidss_device *tidss,
120 struct drm_crtc *crtc,
121 struct drm_crtc_state *old_state,
122 bool newmodeset)
123 {
124 struct drm_atomic_state *ostate = old_state->state;
125 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
126 struct drm_crtc_state *cstate = crtc->state;
127 int layer;
128
129 if (!newmodeset && !cstate->zpos_changed &&
130 !to_tidss_crtc_state(cstate)->plane_pos_changed)
131 return;
132
133 for (layer = 0; layer < tidss->feat->num_planes; layer++) {
134 struct drm_plane_state *pstate;
135 struct drm_plane *plane;
136 bool layer_active = false;
137 int i;
138
139 for_each_new_plane_in_state(ostate, plane, pstate, i) {
140 if (pstate->crtc != crtc || !pstate->visible)
141 continue;
142
143 if (pstate->normalized_zpos == layer) {
144 layer_active = true;
145 break;
146 }
147 }
148
149 if (layer_active) {
150 struct tidss_plane *tplane = to_tidss_plane(plane);
151
152 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id,
153 tcrtc->hw_videoport,
154 pstate->crtc_x, pstate->crtc_y,
155 layer);
156 }
157 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
158 layer_active);
159 }
160 }
161
tidss_crtc_atomic_flush(struct drm_crtc * crtc,struct drm_atomic_state * state)162 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc,
163 struct drm_atomic_state *state)
164 {
165 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
166 crtc);
167 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
168 struct drm_device *ddev = crtc->dev;
169 struct tidss_device *tidss = to_tidss(ddev);
170 unsigned long flags;
171
172 dev_dbg(ddev->dev, "%s: %s is %sactive, %s modeset, event %p\n",
173 __func__, crtc->name, crtc->state->active ? "" : "not ",
174 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need",
175 crtc->state->event);
176
177 /* There is nothing to do if CRTC is not going to be enabled. */
178 if (!crtc->state->active)
179 return;
180
181 /*
182 * Flush CRTC changes with go bit only if new modeset is not
183 * coming, so CRTC is enabled trough out the commit.
184 */
185 if (drm_atomic_crtc_needs_modeset(crtc->state))
186 return;
187
188 /* If the GO bit is stuck we better quit here. */
189 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport)))
190 return;
191
192 /* We should have event if CRTC is enabled through out this commit. */
193 if (WARN_ON(!crtc->state->event))
194 return;
195
196 /* Write vp properties to HW if needed. */
197 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false);
198
199 /* Update plane positions if needed. */
200 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false);
201
202 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
203
204 spin_lock_irqsave(&ddev->event_lock, flags);
205 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport);
206
207 WARN_ON(tcrtc->event);
208
209 tcrtc->event = crtc->state->event;
210 crtc->state->event = NULL;
211
212 spin_unlock_irqrestore(&ddev->event_lock, flags);
213 }
214
tidss_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)215 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
216 struct drm_atomic_state *state)
217 {
218 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
219 crtc);
220 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
221 struct drm_device *ddev = crtc->dev;
222 struct tidss_device *tidss = to_tidss(ddev);
223 const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
224 unsigned long flags;
225 int r;
226
227 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
228
229 tidss_runtime_get(tidss);
230
231 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport,
232 mode->clock * 1000);
233 if (r != 0)
234 return;
235
236 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport);
237 if (r != 0)
238 return;
239
240 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true);
241 tidss_crtc_position_planes(tidss, crtc, old_state, true);
242
243 /* Turn vertical blanking interrupt reporting on. */
244 drm_crtc_vblank_on(crtc);
245
246 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state);
247
248 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state);
249
250 spin_lock_irqsave(&ddev->event_lock, flags);
251
252 if (crtc->state->event) {
253 drm_crtc_send_vblank_event(crtc, crtc->state->event);
254 crtc->state->event = NULL;
255 }
256
257 spin_unlock_irqrestore(&ddev->event_lock, flags);
258 }
259
tidss_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * state)260 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc,
261 struct drm_atomic_state *state)
262 {
263 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
264 struct drm_device *ddev = crtc->dev;
265 struct tidss_device *tidss = to_tidss(ddev);
266 unsigned long flags;
267
268 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event);
269
270 reinit_completion(&tcrtc->framedone_completion);
271
272 /*
273 * If a layer is left enabled when the videoport is disabled, and the
274 * vid pipeline that was used for the layer is taken into use on
275 * another videoport, the DSS will report sync lost issues. Disable all
276 * the layers here as a work-around.
277 */
278 for (u32 layer = 0; layer < tidss->feat->num_planes; layer++)
279 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer,
280 false);
281
282 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport);
283
284 if (!wait_for_completion_timeout(&tcrtc->framedone_completion,
285 msecs_to_jiffies(500)))
286 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d",
287 tcrtc->hw_videoport);
288
289 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport);
290
291 spin_lock_irqsave(&ddev->event_lock, flags);
292 if (crtc->state->event) {
293 drm_crtc_send_vblank_event(crtc, crtc->state->event);
294 crtc->state->event = NULL;
295 }
296 spin_unlock_irqrestore(&ddev->event_lock, flags);
297
298 drm_crtc_vblank_off(crtc);
299
300 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport);
301
302 tidss_runtime_put(tidss);
303 }
304
305 static
tidss_crtc_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * mode)306 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc,
307 const struct drm_display_mode *mode)
308 {
309 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
310 struct drm_device *ddev = crtc->dev;
311 struct tidss_device *tidss = to_tidss(ddev);
312
313 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode);
314 }
315
316 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = {
317 .atomic_check = tidss_crtc_atomic_check,
318 .atomic_flush = tidss_crtc_atomic_flush,
319 .atomic_enable = tidss_crtc_atomic_enable,
320 .atomic_disable = tidss_crtc_atomic_disable,
321
322 .mode_valid = tidss_crtc_mode_valid,
323 };
324
325 /* drm_crtc_funcs */
326
tidss_crtc_enable_vblank(struct drm_crtc * crtc)327 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc)
328 {
329 struct drm_device *ddev = crtc->dev;
330 struct tidss_device *tidss = to_tidss(ddev);
331
332 dev_dbg(ddev->dev, "%s\n", __func__);
333
334 tidss_runtime_get(tidss);
335
336 tidss_irq_enable_vblank(crtc);
337
338 return 0;
339 }
340
tidss_crtc_disable_vblank(struct drm_crtc * crtc)341 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc)
342 {
343 struct drm_device *ddev = crtc->dev;
344 struct tidss_device *tidss = to_tidss(ddev);
345
346 dev_dbg(ddev->dev, "%s\n", __func__);
347
348 tidss_irq_disable_vblank(crtc);
349
350 tidss_runtime_put(tidss);
351 }
352
tidss_crtc_reset(struct drm_crtc * crtc)353 static void tidss_crtc_reset(struct drm_crtc *crtc)
354 {
355 struct tidss_crtc_state *tcrtc;
356
357 if (crtc->state)
358 __drm_atomic_helper_crtc_destroy_state(crtc->state);
359
360 kfree(crtc->state);
361
362 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
363 if (!tcrtc) {
364 crtc->state = NULL;
365 return;
366 }
367
368 __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base);
369 }
370
tidss_crtc_duplicate_state(struct drm_crtc * crtc)371 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc)
372 {
373 struct tidss_crtc_state *state, *current_state;
374
375 if (WARN_ON(!crtc->state))
376 return NULL;
377
378 current_state = to_tidss_crtc_state(crtc->state);
379
380 state = kmalloc(sizeof(*state), GFP_KERNEL);
381 if (!state)
382 return NULL;
383
384 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
385
386 state->plane_pos_changed = false;
387
388 state->bus_format = current_state->bus_format;
389 state->bus_flags = current_state->bus_flags;
390
391 return &state->base;
392 }
393
tidss_crtc_destroy(struct drm_crtc * crtc)394 static void tidss_crtc_destroy(struct drm_crtc *crtc)
395 {
396 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
397
398 drm_crtc_cleanup(crtc);
399 kfree(tcrtc);
400 }
401
402 static const struct drm_crtc_funcs tidss_crtc_funcs = {
403 .reset = tidss_crtc_reset,
404 .destroy = tidss_crtc_destroy,
405 .set_config = drm_atomic_helper_set_config,
406 .page_flip = drm_atomic_helper_page_flip,
407 .atomic_duplicate_state = tidss_crtc_duplicate_state,
408 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
409 .enable_vblank = tidss_crtc_enable_vblank,
410 .disable_vblank = tidss_crtc_disable_vblank,
411 };
412
tidss_crtc_create(struct tidss_device * tidss,u32 hw_videoport,struct drm_plane * primary)413 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss,
414 u32 hw_videoport,
415 struct drm_plane *primary)
416 {
417 struct tidss_crtc *tcrtc;
418 struct drm_crtc *crtc;
419 unsigned int gamma_lut_size = 0;
420 bool has_ctm = tidss->feat->vp_feat.color.has_ctm;
421 int ret;
422
423 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
424 if (!tcrtc)
425 return ERR_PTR(-ENOMEM);
426
427 tcrtc->hw_videoport = hw_videoport;
428 init_completion(&tcrtc->framedone_completion);
429
430 crtc = &tcrtc->crtc;
431
432 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,
433 NULL, &tidss_crtc_funcs, NULL);
434 if (ret < 0) {
435 kfree(tcrtc);
436 return ERR_PTR(ret);
437 }
438
439 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);
440
441 /*
442 * The dispc gamma functions adapt to what ever size we ask
443 * from it no matter what HW supports. X-server assumes 256
444 * element gamma tables so lets use that.
445 */
446 if (tidss->feat->vp_feat.color.gamma_size)
447 gamma_lut_size = 256;
448
449 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size);
450 if (gamma_lut_size)
451 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);
452
453 return tcrtc;
454 }
455