1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Driver for the Texas Instruments TAS2764 CODEC
4 // Copyright (C) 2020 Texas Instruments Inc.
5
6 #include <linux/module.h>
7 #include <linux/moduleparam.h>
8 #include <linux/err.h>
9 #include <linux/init.h>
10 #include <linux/delay.h>
11 #include <linux/pm.h>
12 #include <linux/i2c.h>
13 #include <linux/gpio.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/regmap.h>
17 #include <linux/of.h>
18 #include <linux/of_gpio.h>
19 #include <linux/slab.h>
20 #include <sound/soc.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/initval.h>
24 #include <sound/tlv.h>
25
26 #include "tas2764.h"
27
28 struct tas2764_priv {
29 struct snd_soc_component *component;
30 struct gpio_desc *reset_gpio;
31 struct gpio_desc *sdz_gpio;
32 struct regmap *regmap;
33 struct device *dev;
34 int irq;
35
36 int v_sense_slot;
37 int i_sense_slot;
38
39 bool dac_powered;
40 bool unmuted;
41 };
42
43 static const char *tas2764_int_ltch0_msgs[8] = {
44 "fault: over temperature", /* INT_LTCH0 & BIT(0) */
45 "fault: over current",
46 "fault: bad TDM clock",
47 "limiter active",
48 "fault: PVDD below limiter inflection point",
49 "fault: limiter max attenuation",
50 "fault: BOP infinite hold",
51 "fault: BOP mute", /* INT_LTCH0 & BIT(7) */
52 };
53
54 static const unsigned int tas2764_int_readout_regs[6] = {
55 TAS2764_INT_LTCH0,
56 TAS2764_INT_LTCH1,
57 TAS2764_INT_LTCH1_0,
58 TAS2764_INT_LTCH2,
59 TAS2764_INT_LTCH3,
60 TAS2764_INT_LTCH4,
61 };
62
tas2764_irq(int irq,void * data)63 static irqreturn_t tas2764_irq(int irq, void *data)
64 {
65 struct tas2764_priv *tas2764 = data;
66 u8 latched[6] = {0, 0, 0, 0, 0, 0};
67 int ret = IRQ_NONE;
68 int i;
69
70 for (i = 0; i < ARRAY_SIZE(latched); i++)
71 latched[i] = snd_soc_component_read(tas2764->component,
72 tas2764_int_readout_regs[i]);
73
74 for (i = 0; i < 8; i++) {
75 if (latched[0] & BIT(i)) {
76 dev_crit_ratelimited(tas2764->dev, "%s\n",
77 tas2764_int_ltch0_msgs[i]);
78 ret = IRQ_HANDLED;
79 }
80 }
81
82 if (latched[0]) {
83 dev_err_ratelimited(tas2764->dev, "other context to the fault: %02x,%02x,%02x,%02x,%02x",
84 latched[1], latched[2], latched[3], latched[4], latched[5]);
85 snd_soc_component_update_bits(tas2764->component,
86 TAS2764_INT_CLK_CFG,
87 TAS2764_INT_CLK_CFG_IRQZ_CLR,
88 TAS2764_INT_CLK_CFG_IRQZ_CLR);
89 }
90
91 return ret;
92 }
93
tas2764_reset(struct tas2764_priv * tas2764)94 static void tas2764_reset(struct tas2764_priv *tas2764)
95 {
96 if (tas2764->reset_gpio) {
97 gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
98 msleep(20);
99 gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
100 usleep_range(1000, 2000);
101 }
102
103 snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
104 TAS2764_RST);
105 usleep_range(1000, 2000);
106 }
107
tas2764_update_pwr_ctrl(struct tas2764_priv * tas2764)108 static int tas2764_update_pwr_ctrl(struct tas2764_priv *tas2764)
109 {
110 struct snd_soc_component *component = tas2764->component;
111 unsigned int val;
112 int ret;
113
114 if (tas2764->dac_powered)
115 val = tas2764->unmuted ?
116 TAS2764_PWR_CTRL_ACTIVE : TAS2764_PWR_CTRL_MUTE;
117 else
118 val = TAS2764_PWR_CTRL_SHUTDOWN;
119
120 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
121 TAS2764_PWR_CTRL_MASK, val);
122 if (ret < 0)
123 return ret;
124
125 return 0;
126 }
127
128 #ifdef CONFIG_PM
tas2764_codec_suspend(struct snd_soc_component * component)129 static int tas2764_codec_suspend(struct snd_soc_component *component)
130 {
131 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
132 int ret;
133
134 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
135 TAS2764_PWR_CTRL_MASK,
136 TAS2764_PWR_CTRL_SHUTDOWN);
137
138 if (ret < 0)
139 return ret;
140
141 if (tas2764->sdz_gpio)
142 gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
143
144 regcache_cache_only(tas2764->regmap, true);
145 regcache_mark_dirty(tas2764->regmap);
146
147 return 0;
148 }
149
tas2764_codec_resume(struct snd_soc_component * component)150 static int tas2764_codec_resume(struct snd_soc_component *component)
151 {
152 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
153 int ret;
154
155 if (tas2764->sdz_gpio) {
156 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
157 usleep_range(1000, 2000);
158 }
159
160 ret = tas2764_update_pwr_ctrl(tas2764);
161
162 if (ret < 0)
163 return ret;
164
165 regcache_cache_only(tas2764->regmap, false);
166
167 return regcache_sync(tas2764->regmap);
168 }
169 #else
170 #define tas2764_codec_suspend NULL
171 #define tas2764_codec_resume NULL
172 #endif
173
174 static const char * const tas2764_ASI1_src[] = {
175 "I2C offset", "Left", "Right", "LeftRightDiv2",
176 };
177
178 static SOC_ENUM_SINGLE_DECL(
179 tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, TAS2764_TDM_CFG2_SCFG_SHIFT,
180 tas2764_ASI1_src);
181
182 static const struct snd_kcontrol_new tas2764_asi1_mux =
183 SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
184
185 static const struct snd_kcontrol_new isense_switch =
186 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
187 static const struct snd_kcontrol_new vsense_switch =
188 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
189
190 static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
191 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
192 SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
193 SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
194 1, &isense_switch),
195 SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
196 1, &vsense_switch),
197 SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
198 SND_SOC_DAPM_OUTPUT("OUT"),
199 SND_SOC_DAPM_SIGGEN("VMON"),
200 SND_SOC_DAPM_SIGGEN("IMON")
201 };
202
203 static const struct snd_soc_dapm_route tas2764_audio_map[] = {
204 {"ASI1 Sel", "I2C offset", "ASI1"},
205 {"ASI1 Sel", "Left", "ASI1"},
206 {"ASI1 Sel", "Right", "ASI1"},
207 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
208 {"DAC", NULL, "ASI1 Sel"},
209 {"OUT", NULL, "DAC"},
210 {"ISENSE", "Switch", "IMON"},
211 {"VSENSE", "Switch", "VMON"},
212 };
213
tas2764_mute(struct snd_soc_dai * dai,int mute,int direction)214 static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
215 {
216 struct tas2764_priv *tas2764 =
217 snd_soc_component_get_drvdata(dai->component);
218 int ret;
219
220 if (!mute) {
221 tas2764->dac_powered = true;
222 ret = tas2764_update_pwr_ctrl(tas2764);
223 if (ret)
224 return ret;
225 }
226
227 tas2764->unmuted = !mute;
228 ret = tas2764_update_pwr_ctrl(tas2764);
229 if (ret)
230 return ret;
231
232 if (mute) {
233 tas2764->dac_powered = false;
234 ret = tas2764_update_pwr_ctrl(tas2764);
235 if (ret)
236 return ret;
237 }
238
239 return 0;
240 }
241
tas2764_set_bitwidth(struct tas2764_priv * tas2764,int bitwidth)242 static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
243 {
244 struct snd_soc_component *component = tas2764->component;
245 int sense_en;
246 int val;
247 int ret;
248
249 switch (bitwidth) {
250 case SNDRV_PCM_FORMAT_S16_LE:
251 ret = snd_soc_component_update_bits(component,
252 TAS2764_TDM_CFG2,
253 TAS2764_TDM_CFG2_RXW_MASK,
254 TAS2764_TDM_CFG2_RXW_16BITS);
255 break;
256 case SNDRV_PCM_FORMAT_S24_LE:
257 ret = snd_soc_component_update_bits(component,
258 TAS2764_TDM_CFG2,
259 TAS2764_TDM_CFG2_RXW_MASK,
260 TAS2764_TDM_CFG2_RXW_24BITS);
261 break;
262 case SNDRV_PCM_FORMAT_S32_LE:
263 ret = snd_soc_component_update_bits(component,
264 TAS2764_TDM_CFG2,
265 TAS2764_TDM_CFG2_RXW_MASK,
266 TAS2764_TDM_CFG2_RXW_32BITS);
267 break;
268
269 default:
270 return -EINVAL;
271 }
272
273 if (ret < 0)
274 return ret;
275
276 val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
277 if (val < 0)
278 return val;
279
280 if (val & (1 << TAS2764_VSENSE_POWER_EN))
281 sense_en = 0;
282 else
283 sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
284
285 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
286 TAS2764_TDM_CFG5_VSNS_ENABLE,
287 sense_en);
288 if (ret < 0)
289 return ret;
290
291 if (val & (1 << TAS2764_ISENSE_POWER_EN))
292 sense_en = 0;
293 else
294 sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
295
296 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
297 TAS2764_TDM_CFG6_ISNS_ENABLE,
298 sense_en);
299 if (ret < 0)
300 return ret;
301
302 return 0;
303 }
304
tas2764_set_samplerate(struct tas2764_priv * tas2764,int samplerate)305 static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
306 {
307 struct snd_soc_component *component = tas2764->component;
308 int ramp_rate_val;
309 int ret;
310
311 switch (samplerate) {
312 case 48000:
313 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
314 TAS2764_TDM_CFG0_44_1_48KHZ;
315 break;
316 case 44100:
317 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
318 TAS2764_TDM_CFG0_44_1_48KHZ;
319 break;
320 case 96000:
321 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
322 TAS2764_TDM_CFG0_88_2_96KHZ;
323 break;
324 case 88200:
325 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
326 TAS2764_TDM_CFG0_88_2_96KHZ;
327 break;
328 default:
329 return -EINVAL;
330 }
331
332 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
333 TAS2764_TDM_CFG0_SMP_MASK |
334 TAS2764_TDM_CFG0_MASK,
335 ramp_rate_val);
336 if (ret < 0)
337 return ret;
338
339 return 0;
340 }
341
tas2764_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)342 static int tas2764_hw_params(struct snd_pcm_substream *substream,
343 struct snd_pcm_hw_params *params,
344 struct snd_soc_dai *dai)
345 {
346 struct snd_soc_component *component = dai->component;
347 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
348 int ret;
349
350 ret = tas2764_set_bitwidth(tas2764, params_format(params));
351 if (ret < 0)
352 return ret;
353
354 return tas2764_set_samplerate(tas2764, params_rate(params));
355 }
356
tas2764_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)357 static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
358 {
359 struct snd_soc_component *component = dai->component;
360 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
361 u8 tdm_rx_start_slot = 0, asi_cfg_0 = 0, asi_cfg_1 = 0, asi_cfg_4 = 0;
362 int ret;
363
364 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
365 case SND_SOC_DAIFMT_NB_IF:
366 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
367 fallthrough;
368 case SND_SOC_DAIFMT_NB_NF:
369 asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
370 asi_cfg_4 = TAS2764_TDM_CFG4_TX_FALLING;
371 break;
372 case SND_SOC_DAIFMT_IB_IF:
373 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
374 fallthrough;
375 case SND_SOC_DAIFMT_IB_NF:
376 asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
377 asi_cfg_4 = TAS2764_TDM_CFG4_TX_RISING;
378 break;
379 }
380
381 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
382 TAS2764_TDM_CFG1_RX_MASK,
383 asi_cfg_1);
384 if (ret < 0)
385 return ret;
386
387 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG4,
388 TAS2764_TDM_CFG4_TX_MASK,
389 asi_cfg_4);
390 if (ret < 0)
391 return ret;
392
393 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
394 case SND_SOC_DAIFMT_I2S:
395 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
396 fallthrough;
397 case SND_SOC_DAIFMT_DSP_A:
398 tdm_rx_start_slot = 1;
399 break;
400 case SND_SOC_DAIFMT_DSP_B:
401 case SND_SOC_DAIFMT_LEFT_J:
402 tdm_rx_start_slot = 0;
403 break;
404 default:
405 dev_err(tas2764->dev,
406 "DAI Format is not found, fmt=0x%x\n", fmt);
407 return -EINVAL;
408 }
409
410 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
411 TAS2764_TDM_CFG0_FRAME_START,
412 asi_cfg_0);
413 if (ret < 0)
414 return ret;
415
416 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
417 TAS2764_TDM_CFG1_MASK,
418 (tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
419 if (ret < 0)
420 return ret;
421
422 return 0;
423 }
424
tas2764_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)425 static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
426 unsigned int tx_mask,
427 unsigned int rx_mask,
428 int slots, int slot_width)
429 {
430 struct snd_soc_component *component = dai->component;
431 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
432 int left_slot, right_slot;
433 int slots_cfg;
434 int slot_size;
435 int ret;
436
437 if (tx_mask == 0 || rx_mask != 0)
438 return -EINVAL;
439
440 left_slot = __ffs(tx_mask);
441 tx_mask &= ~(1 << left_slot);
442 if (tx_mask == 0) {
443 right_slot = left_slot;
444 } else {
445 right_slot = __ffs(tx_mask);
446 tx_mask &= ~(1 << right_slot);
447 }
448
449 if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
450 return -EINVAL;
451
452 slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
453
454 ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
455 if (ret)
456 return ret;
457
458 switch (slot_width) {
459 case 16:
460 slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
461 break;
462 case 24:
463 slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
464 break;
465 case 32:
466 slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
467 break;
468 default:
469 return -EINVAL;
470 }
471
472 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
473 TAS2764_TDM_CFG2_RXS_MASK,
474 slot_size);
475 if (ret < 0)
476 return ret;
477
478 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
479 TAS2764_TDM_CFG5_50_MASK,
480 tas2764->v_sense_slot);
481 if (ret < 0)
482 return ret;
483
484 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
485 TAS2764_TDM_CFG6_50_MASK,
486 tas2764->i_sense_slot);
487 if (ret < 0)
488 return ret;
489
490 return 0;
491 }
492
493 static const struct snd_soc_dai_ops tas2764_dai_ops = {
494 .mute_stream = tas2764_mute,
495 .hw_params = tas2764_hw_params,
496 .set_fmt = tas2764_set_fmt,
497 .set_tdm_slot = tas2764_set_dai_tdm_slot,
498 .no_capture_mute = 1,
499 };
500
501 #define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
502 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
503
504 #define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
505 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
506
507 static struct snd_soc_dai_driver tas2764_dai_driver[] = {
508 {
509 .name = "tas2764 ASI1",
510 .id = 0,
511 .playback = {
512 .stream_name = "ASI1 Playback",
513 .channels_min = 1,
514 .channels_max = 2,
515 .rates = TAS2764_RATES,
516 .formats = TAS2764_FORMATS,
517 },
518 .capture = {
519 .stream_name = "ASI1 Capture",
520 .channels_min = 0,
521 .channels_max = 2,
522 .rates = TAS2764_RATES,
523 .formats = TAS2764_FORMATS,
524 },
525 .ops = &tas2764_dai_ops,
526 .symmetric_rate = 1,
527 },
528 };
529
tas2764_codec_probe(struct snd_soc_component * component)530 static int tas2764_codec_probe(struct snd_soc_component *component)
531 {
532 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
533 int ret;
534
535 tas2764->component = component;
536
537 if (tas2764->sdz_gpio) {
538 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
539 usleep_range(1000, 2000);
540 }
541
542 tas2764_reset(tas2764);
543
544 if (tas2764->irq) {
545 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK0, 0x00);
546 if (ret < 0)
547 return ret;
548
549 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK1, 0xff);
550 if (ret < 0)
551 return ret;
552
553 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK2, 0xff);
554 if (ret < 0)
555 return ret;
556
557 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK3, 0xff);
558 if (ret < 0)
559 return ret;
560
561 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK4, 0xff);
562 if (ret < 0)
563 return ret;
564
565 ret = devm_request_threaded_irq(tas2764->dev, tas2764->irq, NULL, tas2764_irq,
566 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_LOW,
567 "tas2764", tas2764);
568 if (ret)
569 dev_warn(tas2764->dev, "failed to request IRQ: %d\n", ret);
570 }
571
572 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
573 TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
574 if (ret < 0)
575 return ret;
576
577 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
578 TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
579 if (ret < 0)
580 return ret;
581
582 return 0;
583 }
584
585 static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
586 static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10050, 50, 1);
587
588 static const char * const tas2764_hpf_texts[] = {
589 "Disabled", "2 Hz", "50 Hz", "100 Hz", "200 Hz",
590 "400 Hz", "800 Hz"
591 };
592
593 static SOC_ENUM_SINGLE_DECL(
594 tas2764_hpf_enum, TAS2764_DC_BLK0,
595 TAS2764_DC_BLK0_HPF_FREQ_PB_SHIFT, tas2764_hpf_texts);
596
597 static const struct snd_kcontrol_new tas2764_snd_controls[] = {
598 SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
599 TAS2764_DVC_MAX, 1, tas2764_playback_volume),
600 SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 1, 0x14, 0,
601 tas2764_digital_tlv),
602 SOC_ENUM("HPF Corner Frequency", tas2764_hpf_enum),
603 };
604
605 static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
606 .probe = tas2764_codec_probe,
607 .suspend = tas2764_codec_suspend,
608 .resume = tas2764_codec_resume,
609 .controls = tas2764_snd_controls,
610 .num_controls = ARRAY_SIZE(tas2764_snd_controls),
611 .dapm_widgets = tas2764_dapm_widgets,
612 .num_dapm_widgets = ARRAY_SIZE(tas2764_dapm_widgets),
613 .dapm_routes = tas2764_audio_map,
614 .num_dapm_routes = ARRAY_SIZE(tas2764_audio_map),
615 .idle_bias_on = 1,
616 .endianness = 1,
617 };
618
619 static const struct reg_default tas2764_reg_defaults[] = {
620 { TAS2764_PAGE, 0x00 },
621 { TAS2764_SW_RST, 0x00 },
622 { TAS2764_PWR_CTRL, 0x1a },
623 { TAS2764_DVC, 0x00 },
624 { TAS2764_CHNL_0, 0x28 },
625 { TAS2764_TDM_CFG0, 0x09 },
626 { TAS2764_TDM_CFG1, 0x02 },
627 { TAS2764_TDM_CFG2, 0x0a },
628 { TAS2764_TDM_CFG3, 0x10 },
629 { TAS2764_TDM_CFG5, 0x42 },
630 { TAS2764_INT_CLK_CFG, 0x19 },
631 };
632
633 static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
634 {
635 .range_min = 0,
636 .range_max = 1 * 128,
637 .selector_reg = TAS2764_PAGE,
638 .selector_mask = 0xff,
639 .selector_shift = 0,
640 .window_start = 0,
641 .window_len = 128,
642 },
643 };
644
tas2764_volatile_register(struct device * dev,unsigned int reg)645 static bool tas2764_volatile_register(struct device *dev, unsigned int reg)
646 {
647 switch (reg) {
648 case TAS2764_SW_RST:
649 case TAS2764_INT_LTCH0 ... TAS2764_INT_LTCH4:
650 case TAS2764_INT_CLK_CFG:
651 return true;
652 default:
653 return false;
654 }
655 }
656
657 static const struct regmap_config tas2764_i2c_regmap = {
658 .reg_bits = 8,
659 .val_bits = 8,
660 .volatile_reg = tas2764_volatile_register,
661 .reg_defaults = tas2764_reg_defaults,
662 .num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
663 .cache_type = REGCACHE_RBTREE,
664 .ranges = tas2764_regmap_ranges,
665 .num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
666 .max_register = 1 * 128,
667 };
668
tas2764_parse_dt(struct device * dev,struct tas2764_priv * tas2764)669 static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
670 {
671 int ret = 0;
672
673 tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
674 GPIOD_OUT_HIGH);
675 if (IS_ERR(tas2764->reset_gpio)) {
676 if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
677 tas2764->reset_gpio = NULL;
678 return -EPROBE_DEFER;
679 }
680 }
681
682 tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
683 if (IS_ERR(tas2764->sdz_gpio)) {
684 if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
685 return -EPROBE_DEFER;
686
687 tas2764->sdz_gpio = NULL;
688 }
689
690 ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
691 &tas2764->i_sense_slot);
692 if (ret)
693 tas2764->i_sense_slot = 0;
694
695 ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
696 &tas2764->v_sense_slot);
697 if (ret)
698 tas2764->v_sense_slot = 2;
699
700 return 0;
701 }
702
tas2764_i2c_probe(struct i2c_client * client)703 static int tas2764_i2c_probe(struct i2c_client *client)
704 {
705 struct tas2764_priv *tas2764;
706 int result;
707
708 tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
709 GFP_KERNEL);
710 if (!tas2764)
711 return -ENOMEM;
712
713 tas2764->dev = &client->dev;
714 tas2764->irq = client->irq;
715 i2c_set_clientdata(client, tas2764);
716 dev_set_drvdata(&client->dev, tas2764);
717
718 tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
719 if (IS_ERR(tas2764->regmap)) {
720 result = PTR_ERR(tas2764->regmap);
721 dev_err(&client->dev, "Failed to allocate register map: %d\n",
722 result);
723 return result;
724 }
725
726 if (client->dev.of_node) {
727 result = tas2764_parse_dt(&client->dev, tas2764);
728 if (result) {
729 dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
730 __func__);
731 return result;
732 }
733 }
734
735 return devm_snd_soc_register_component(tas2764->dev,
736 &soc_component_driver_tas2764,
737 tas2764_dai_driver,
738 ARRAY_SIZE(tas2764_dai_driver));
739 }
740
741 static const struct i2c_device_id tas2764_i2c_id[] = {
742 { "tas2764", 0},
743 { }
744 };
745 MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
746
747 #if defined(CONFIG_OF)
748 static const struct of_device_id tas2764_of_match[] = {
749 { .compatible = "ti,tas2764" },
750 {},
751 };
752 MODULE_DEVICE_TABLE(of, tas2764_of_match);
753 #endif
754
755 static struct i2c_driver tas2764_i2c_driver = {
756 .driver = {
757 .name = "tas2764",
758 .of_match_table = of_match_ptr(tas2764_of_match),
759 },
760 .probe = tas2764_i2c_probe,
761 .id_table = tas2764_i2c_id,
762 };
763 module_i2c_driver(tas2764_i2c_driver);
764
765 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
766 MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
767 MODULE_LICENSE("GPL v2");
768