xref: /openbmc/u-boot/drivers/reset/stm32-reset.c (revision e0ed8332)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5  */
6 
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <reset-uclass.h>
11 #include <stm32_rcc.h>
12 #include <asm/io.h>
13 
14 /* reset clear offset for STM32MP RCC */
15 #define RCC_CL 0x4
16 
17 struct stm32_reset_priv {
18 	fdt_addr_t base;
19 };
20 
stm32_reset_request(struct reset_ctl * reset_ctl)21 static int stm32_reset_request(struct reset_ctl *reset_ctl)
22 {
23 	return 0;
24 }
25 
stm32_reset_free(struct reset_ctl * reset_ctl)26 static int stm32_reset_free(struct reset_ctl *reset_ctl)
27 {
28 	return 0;
29 }
30 
stm32_reset_assert(struct reset_ctl * reset_ctl)31 static int stm32_reset_assert(struct reset_ctl *reset_ctl)
32 {
33 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
34 	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
35 	int offset = reset_ctl->id % BITS_PER_LONG;
36 	debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
37 	      reset_ctl->id, bank, offset);
38 
39 	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
40 		/* reset assert is done in rcc set register */
41 		writel(BIT(offset), priv->base + bank);
42 	else
43 		setbits_le32(priv->base + bank, BIT(offset));
44 
45 	return 0;
46 }
47 
stm32_reset_deassert(struct reset_ctl * reset_ctl)48 static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
49 {
50 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
51 	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
52 	int offset = reset_ctl->id % BITS_PER_LONG;
53 	debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__,
54 	      reset_ctl->id, bank, offset);
55 
56 	if (dev_get_driver_data(reset_ctl->dev) == STM32MP1)
57 		/* reset deassert is done in rcc clr register */
58 		writel(BIT(offset), priv->base + bank + RCC_CL);
59 	else
60 		clrbits_le32(priv->base + bank, BIT(offset));
61 
62 	return 0;
63 }
64 
65 static const struct reset_ops stm32_reset_ops = {
66 	.request	= stm32_reset_request,
67 	.free		= stm32_reset_free,
68 	.rst_assert	= stm32_reset_assert,
69 	.rst_deassert	= stm32_reset_deassert,
70 };
71 
stm32_reset_probe(struct udevice * dev)72 static int stm32_reset_probe(struct udevice *dev)
73 {
74 	struct stm32_reset_priv *priv = dev_get_priv(dev);
75 
76 	priv->base = dev_read_addr(dev);
77 	if (priv->base == FDT_ADDR_T_NONE) {
78 		/* for MFD, get address of parent */
79 		priv->base = dev_read_addr(dev->parent);
80 		if (priv->base == FDT_ADDR_T_NONE)
81 			return -EINVAL;
82 	}
83 
84 	return 0;
85 }
86 
87 U_BOOT_DRIVER(stm32_rcc_reset) = {
88 	.name			= "stm32_rcc_reset",
89 	.id			= UCLASS_RESET,
90 	.probe			= stm32_reset_probe,
91 	.priv_auto_alloc_size	= sizeof(struct stm32_reset_priv),
92 	.ops			= &stm32_reset_ops,
93 };
94