xref: /openbmc/linux/drivers/ssb/main.c (revision 8574cdab)
1 /*
2  * Sonics Silicon Backplane
3  * Subsystem core
4  *
5  * Copyright 2005, Broadcom Corporation
6  * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
7  *
8  * Licensed under the GNU/GPL. See COPYING for details.
9  */
10 
11 #include "ssb_private.h"
12 
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/ssb/ssb.h>
18 #include <linux/ssb/ssb_regs.h>
19 #include <linux/ssb/ssb_driver_gige.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/pci.h>
22 #include <linux/mmc/sdio_func.h>
23 #include <linux/slab.h>
24 
25 #include <pcmcia/cistpl.h>
26 #include <pcmcia/ds.h>
27 
28 
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
31 
32 
33 /* Temporary list of yet-to-be-attached buses */
34 static LIST_HEAD(attach_queue);
35 /* List if running buses */
36 static LIST_HEAD(buses);
37 /* Software ID counter */
38 static unsigned int next_busnumber;
39 /* buses_mutes locks the two buslists and the next_busnumber.
40  * Don't lock this directly, but use ssb_buses_[un]lock() below.
41  */
42 static DEFINE_MUTEX(buses_mutex);
43 
44 /* There are differences in the codeflow, if the bus is
45  * initialized from early boot, as various needed services
46  * are not available early. This is a mechanism to delay
47  * these initializations to after early boot has finished.
48  * It's also used to avoid mutex locking, as that's not
49  * available and needed early.
50  */
51 static bool ssb_is_early_boot = 1;
52 
53 static void ssb_buses_lock(void);
54 static void ssb_buses_unlock(void);
55 
56 
57 #ifdef CONFIG_SSB_PCIHOST
ssb_pci_dev_to_bus(struct pci_dev * pdev)58 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
59 {
60 	struct ssb_bus *bus;
61 
62 	ssb_buses_lock();
63 	list_for_each_entry(bus, &buses, list) {
64 		if (bus->bustype == SSB_BUSTYPE_PCI &&
65 		    bus->host_pci == pdev)
66 			goto found;
67 	}
68 	bus = NULL;
69 found:
70 	ssb_buses_unlock();
71 
72 	return bus;
73 }
74 #endif /* CONFIG_SSB_PCIHOST */
75 
76 #ifdef CONFIG_SSB_PCMCIAHOST
ssb_pcmcia_dev_to_bus(struct pcmcia_device * pdev)77 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
78 {
79 	struct ssb_bus *bus;
80 
81 	ssb_buses_lock();
82 	list_for_each_entry(bus, &buses, list) {
83 		if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
84 		    bus->host_pcmcia == pdev)
85 			goto found;
86 	}
87 	bus = NULL;
88 found:
89 	ssb_buses_unlock();
90 
91 	return bus;
92 }
93 #endif /* CONFIG_SSB_PCMCIAHOST */
94 
ssb_for_each_bus_call(unsigned long data,int (* func)(struct ssb_bus * bus,unsigned long data))95 int ssb_for_each_bus_call(unsigned long data,
96 			  int (*func)(struct ssb_bus *bus, unsigned long data))
97 {
98 	struct ssb_bus *bus;
99 	int res;
100 
101 	ssb_buses_lock();
102 	list_for_each_entry(bus, &buses, list) {
103 		res = func(bus, data);
104 		if (res >= 0) {
105 			ssb_buses_unlock();
106 			return res;
107 		}
108 	}
109 	ssb_buses_unlock();
110 
111 	return -ENODEV;
112 }
113 
ssb_device_get(struct ssb_device * dev)114 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
115 {
116 	if (dev)
117 		get_device(dev->dev);
118 	return dev;
119 }
120 
ssb_device_put(struct ssb_device * dev)121 static void ssb_device_put(struct ssb_device *dev)
122 {
123 	if (dev)
124 		put_device(dev->dev);
125 }
126 
ssb_device_resume(struct device * dev)127 static int ssb_device_resume(struct device *dev)
128 {
129 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
130 	struct ssb_driver *ssb_drv;
131 	int err = 0;
132 
133 	if (dev->driver) {
134 		ssb_drv = drv_to_ssb_drv(dev->driver);
135 		if (ssb_drv && ssb_drv->resume)
136 			err = ssb_drv->resume(ssb_dev);
137 		if (err)
138 			goto out;
139 	}
140 out:
141 	return err;
142 }
143 
ssb_device_suspend(struct device * dev,pm_message_t state)144 static int ssb_device_suspend(struct device *dev, pm_message_t state)
145 {
146 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
147 	struct ssb_driver *ssb_drv;
148 	int err = 0;
149 
150 	if (dev->driver) {
151 		ssb_drv = drv_to_ssb_drv(dev->driver);
152 		if (ssb_drv && ssb_drv->suspend)
153 			err = ssb_drv->suspend(ssb_dev, state);
154 		if (err)
155 			goto out;
156 	}
157 out:
158 	return err;
159 }
160 
ssb_bus_resume(struct ssb_bus * bus)161 int ssb_bus_resume(struct ssb_bus *bus)
162 {
163 	int err;
164 
165 	/* Reset HW state information in memory, so that HW is
166 	 * completely reinitialized.
167 	 */
168 	bus->mapped_device = NULL;
169 #ifdef CONFIG_SSB_DRIVER_PCICORE
170 	bus->pcicore.setup_done = 0;
171 #endif
172 
173 	err = ssb_bus_powerup(bus, 0);
174 	if (err)
175 		return err;
176 	err = ssb_pcmcia_hardware_setup(bus);
177 	if (err) {
178 		ssb_bus_may_powerdown(bus);
179 		return err;
180 	}
181 	ssb_chipco_resume(&bus->chipco);
182 	ssb_bus_may_powerdown(bus);
183 
184 	return 0;
185 }
186 EXPORT_SYMBOL(ssb_bus_resume);
187 
ssb_bus_suspend(struct ssb_bus * bus)188 int ssb_bus_suspend(struct ssb_bus *bus)
189 {
190 	ssb_chipco_suspend(&bus->chipco);
191 	ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
192 
193 	return 0;
194 }
195 EXPORT_SYMBOL(ssb_bus_suspend);
196 
197 #ifdef CONFIG_SSB_SPROM
198 /** ssb_devices_freeze - Freeze all devices on the bus.
199  *
200  * After freezing no device driver will be handling a device
201  * on this bus anymore. ssb_devices_thaw() must be called after
202  * a successful freeze to reactivate the devices.
203  *
204  * @bus: The bus.
205  * @ctx: Context structure. Pass this to ssb_devices_thaw().
206  */
ssb_devices_freeze(struct ssb_bus * bus,struct ssb_freeze_context * ctx)207 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
208 {
209 	struct ssb_device *sdev;
210 	struct ssb_driver *sdrv;
211 	unsigned int i;
212 
213 	memset(ctx, 0, sizeof(*ctx));
214 	ctx->bus = bus;
215 	WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
216 
217 	for (i = 0; i < bus->nr_devices; i++) {
218 		sdev = ssb_device_get(&bus->devices[i]);
219 
220 		if (!sdev->dev || !sdev->dev->driver ||
221 		    !device_is_registered(sdev->dev)) {
222 			ssb_device_put(sdev);
223 			continue;
224 		}
225 		sdrv = drv_to_ssb_drv(sdev->dev->driver);
226 		if (WARN_ON(!sdrv->remove))
227 			continue;
228 		sdrv->remove(sdev);
229 		ctx->device_frozen[i] = 1;
230 	}
231 
232 	return 0;
233 }
234 
235 /** ssb_devices_thaw - Unfreeze all devices on the bus.
236  *
237  * This will re-attach the device drivers and re-init the devices.
238  *
239  * @ctx: The context structure from ssb_devices_freeze()
240  */
ssb_devices_thaw(struct ssb_freeze_context * ctx)241 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
242 {
243 	struct ssb_bus *bus = ctx->bus;
244 	struct ssb_device *sdev;
245 	struct ssb_driver *sdrv;
246 	unsigned int i;
247 	int err, result = 0;
248 
249 	for (i = 0; i < bus->nr_devices; i++) {
250 		if (!ctx->device_frozen[i])
251 			continue;
252 		sdev = &bus->devices[i];
253 
254 		if (WARN_ON(!sdev->dev || !sdev->dev->driver))
255 			continue;
256 		sdrv = drv_to_ssb_drv(sdev->dev->driver);
257 		if (WARN_ON(!sdrv || !sdrv->probe))
258 			continue;
259 
260 		err = sdrv->probe(sdev, &sdev->id);
261 		if (err) {
262 			dev_err(sdev->dev,
263 				"Failed to thaw device %s\n",
264 				dev_name(sdev->dev));
265 			result = err;
266 		}
267 		ssb_device_put(sdev);
268 	}
269 
270 	return result;
271 }
272 #endif /* CONFIG_SSB_SPROM */
273 
ssb_device_shutdown(struct device * dev)274 static void ssb_device_shutdown(struct device *dev)
275 {
276 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
277 	struct ssb_driver *ssb_drv;
278 
279 	if (!dev->driver)
280 		return;
281 	ssb_drv = drv_to_ssb_drv(dev->driver);
282 	if (ssb_drv && ssb_drv->shutdown)
283 		ssb_drv->shutdown(ssb_dev);
284 }
285 
ssb_device_remove(struct device * dev)286 static void ssb_device_remove(struct device *dev)
287 {
288 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
289 	struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
290 
291 	if (ssb_drv && ssb_drv->remove)
292 		ssb_drv->remove(ssb_dev);
293 	ssb_device_put(ssb_dev);
294 }
295 
ssb_device_probe(struct device * dev)296 static int ssb_device_probe(struct device *dev)
297 {
298 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
299 	struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
300 	int err = 0;
301 
302 	ssb_device_get(ssb_dev);
303 	if (ssb_drv && ssb_drv->probe)
304 		err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
305 	if (err)
306 		ssb_device_put(ssb_dev);
307 
308 	return err;
309 }
310 
ssb_match_devid(const struct ssb_device_id * tabid,const struct ssb_device_id * devid)311 static int ssb_match_devid(const struct ssb_device_id *tabid,
312 			   const struct ssb_device_id *devid)
313 {
314 	if ((tabid->vendor != devid->vendor) &&
315 	    tabid->vendor != SSB_ANY_VENDOR)
316 		return 0;
317 	if ((tabid->coreid != devid->coreid) &&
318 	    tabid->coreid != SSB_ANY_ID)
319 		return 0;
320 	if ((tabid->revision != devid->revision) &&
321 	    tabid->revision != SSB_ANY_REV)
322 		return 0;
323 	return 1;
324 }
325 
ssb_bus_match(struct device * dev,struct device_driver * drv)326 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
327 {
328 	struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
329 	struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
330 	const struct ssb_device_id *id;
331 
332 	for (id = ssb_drv->id_table;
333 	     id->vendor || id->coreid || id->revision;
334 	     id++) {
335 		if (ssb_match_devid(id, &ssb_dev->id))
336 			return 1; /* found */
337 	}
338 
339 	return 0;
340 }
341 
ssb_device_uevent(const struct device * dev,struct kobj_uevent_env * env)342 static int ssb_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
343 {
344 	const struct ssb_device *ssb_dev;
345 
346 	if (!dev)
347 		return -ENODEV;
348 
349 	ssb_dev = dev_to_ssb_dev(dev);
350 
351 	return add_uevent_var(env,
352 			     "MODALIAS=ssb:v%04Xid%04Xrev%02X",
353 			     ssb_dev->id.vendor, ssb_dev->id.coreid,
354 			     ssb_dev->id.revision);
355 }
356 
357 #define ssb_config_attr(attrib, field, format_string) \
358 static ssize_t \
359 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
360 { \
361 	return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
362 } \
363 static DEVICE_ATTR_RO(attrib);
364 
365 ssb_config_attr(core_num, core_index, "%u\n")
366 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
367 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
368 ssb_config_attr(revision, id.revision, "%u\n")
369 ssb_config_attr(irq, irq, "%u\n")
370 static ssize_t
name_show(struct device * dev,struct device_attribute * attr,char * buf)371 name_show(struct device *dev, struct device_attribute *attr, char *buf)
372 {
373 	return sprintf(buf, "%s\n",
374 		       ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
375 }
376 static DEVICE_ATTR_RO(name);
377 
378 static struct attribute *ssb_device_attrs[] = {
379 	&dev_attr_name.attr,
380 	&dev_attr_core_num.attr,
381 	&dev_attr_coreid.attr,
382 	&dev_attr_vendor.attr,
383 	&dev_attr_revision.attr,
384 	&dev_attr_irq.attr,
385 	NULL,
386 };
387 ATTRIBUTE_GROUPS(ssb_device);
388 
389 static struct bus_type ssb_bustype = {
390 	.name		= "ssb",
391 	.match		= ssb_bus_match,
392 	.probe		= ssb_device_probe,
393 	.remove		= ssb_device_remove,
394 	.shutdown	= ssb_device_shutdown,
395 	.suspend	= ssb_device_suspend,
396 	.resume		= ssb_device_resume,
397 	.uevent		= ssb_device_uevent,
398 	.dev_groups	= ssb_device_groups,
399 };
400 
ssb_buses_lock(void)401 static void ssb_buses_lock(void)
402 {
403 	/* See the comment at the ssb_is_early_boot definition */
404 	if (!ssb_is_early_boot)
405 		mutex_lock(&buses_mutex);
406 }
407 
ssb_buses_unlock(void)408 static void ssb_buses_unlock(void)
409 {
410 	/* See the comment at the ssb_is_early_boot definition */
411 	if (!ssb_is_early_boot)
412 		mutex_unlock(&buses_mutex);
413 }
414 
ssb_devices_unregister(struct ssb_bus * bus)415 static void ssb_devices_unregister(struct ssb_bus *bus)
416 {
417 	struct ssb_device *sdev;
418 	int i;
419 
420 	for (i = bus->nr_devices - 1; i >= 0; i--) {
421 		sdev = &(bus->devices[i]);
422 		if (sdev->dev)
423 			device_unregister(sdev->dev);
424 	}
425 
426 #ifdef CONFIG_SSB_EMBEDDED
427 	if (bus->bustype == SSB_BUSTYPE_SSB)
428 		platform_device_unregister(bus->watchdog);
429 #endif
430 }
431 
ssb_bus_unregister(struct ssb_bus * bus)432 void ssb_bus_unregister(struct ssb_bus *bus)
433 {
434 	int err;
435 
436 	err = ssb_gpio_unregister(bus);
437 	if (err)
438 		pr_debug("Can not unregister GPIO driver: %i\n", err);
439 
440 	ssb_buses_lock();
441 	ssb_devices_unregister(bus);
442 	list_del(&bus->list);
443 	ssb_buses_unlock();
444 
445 	ssb_pcmcia_exit(bus);
446 	ssb_pci_exit(bus);
447 	ssb_iounmap(bus);
448 }
449 EXPORT_SYMBOL(ssb_bus_unregister);
450 
ssb_release_dev(struct device * dev)451 static void ssb_release_dev(struct device *dev)
452 {
453 	struct __ssb_dev_wrapper *devwrap;
454 
455 	devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
456 	kfree(devwrap);
457 }
458 
ssb_devices_register(struct ssb_bus * bus)459 static int ssb_devices_register(struct ssb_bus *bus)
460 {
461 	struct ssb_device *sdev;
462 	struct device *dev;
463 	struct __ssb_dev_wrapper *devwrap;
464 	int i, err = 0;
465 	int dev_idx = 0;
466 
467 	for (i = 0; i < bus->nr_devices; i++) {
468 		sdev = &(bus->devices[i]);
469 
470 		/* We don't register SSB-system devices to the kernel,
471 		 * as the drivers for them are built into SSB.
472 		 */
473 		switch (sdev->id.coreid) {
474 		case SSB_DEV_CHIPCOMMON:
475 		case SSB_DEV_PCI:
476 		case SSB_DEV_PCIE:
477 		case SSB_DEV_PCMCIA:
478 		case SSB_DEV_MIPS:
479 		case SSB_DEV_MIPS_3302:
480 		case SSB_DEV_EXTIF:
481 			continue;
482 		}
483 
484 		devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
485 		if (!devwrap) {
486 			err = -ENOMEM;
487 			goto error;
488 		}
489 		dev = &devwrap->dev;
490 		devwrap->sdev = sdev;
491 
492 		dev->release = ssb_release_dev;
493 		dev->bus = &ssb_bustype;
494 		dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
495 
496 		switch (bus->bustype) {
497 		case SSB_BUSTYPE_PCI:
498 #ifdef CONFIG_SSB_PCIHOST
499 			sdev->irq = bus->host_pci->irq;
500 			dev->parent = &bus->host_pci->dev;
501 			sdev->dma_dev = dev->parent;
502 #endif
503 			break;
504 		case SSB_BUSTYPE_PCMCIA:
505 #ifdef CONFIG_SSB_PCMCIAHOST
506 			sdev->irq = bus->host_pcmcia->irq;
507 			dev->parent = &bus->host_pcmcia->dev;
508 #endif
509 			break;
510 		case SSB_BUSTYPE_SDIO:
511 #ifdef CONFIG_SSB_SDIOHOST
512 			dev->parent = &bus->host_sdio->dev;
513 #endif
514 			break;
515 		case SSB_BUSTYPE_SSB:
516 			dev->dma_mask = &dev->coherent_dma_mask;
517 			sdev->dma_dev = dev;
518 			break;
519 		}
520 
521 		sdev->dev = dev;
522 		err = device_register(dev);
523 		if (err) {
524 			pr_err("Could not register %s\n", dev_name(dev));
525 			/* Set dev to NULL to not unregister
526 			 * dev on error unwinding.
527 			 */
528 			sdev->dev = NULL;
529 			put_device(dev);
530 			goto error;
531 		}
532 		dev_idx++;
533 	}
534 
535 #ifdef CONFIG_SSB_DRIVER_MIPS
536 	if (bus->mipscore.pflash.present) {
537 		err = platform_device_register(&ssb_pflash_dev);
538 		if (err)
539 			pr_err("Error registering parallel flash\n");
540 	}
541 #endif
542 
543 #ifdef CONFIG_SSB_SFLASH
544 	if (bus->mipscore.sflash.present) {
545 		err = platform_device_register(&ssb_sflash_dev);
546 		if (err)
547 			pr_err("Error registering serial flash\n");
548 	}
549 #endif
550 
551 	return 0;
552 error:
553 	/* Unwind the already registered devices. */
554 	ssb_devices_unregister(bus);
555 	return err;
556 }
557 
558 /* Needs ssb_buses_lock() */
ssb_attach_queued_buses(void)559 static int ssb_attach_queued_buses(void)
560 {
561 	struct ssb_bus *bus, *n;
562 	int err = 0;
563 	int drop_them_all = 0;
564 
565 	list_for_each_entry_safe(bus, n, &attach_queue, list) {
566 		if (drop_them_all) {
567 			list_del(&bus->list);
568 			continue;
569 		}
570 		/* Can't init the PCIcore in ssb_bus_register(), as that
571 		 * is too early in boot for embedded systems
572 		 * (no udelay() available). So do it here in attach stage.
573 		 */
574 		err = ssb_bus_powerup(bus, 0);
575 		if (err)
576 			goto error;
577 		ssb_pcicore_init(&bus->pcicore);
578 		if (bus->bustype == SSB_BUSTYPE_SSB)
579 			ssb_watchdog_register(bus);
580 
581 		err = ssb_gpio_init(bus);
582 		if (err == -ENOTSUPP)
583 			pr_debug("GPIO driver not activated\n");
584 		else if (err)
585 			pr_debug("Error registering GPIO driver: %i\n", err);
586 
587 		ssb_bus_may_powerdown(bus);
588 
589 		err = ssb_devices_register(bus);
590 error:
591 		if (err) {
592 			drop_them_all = 1;
593 			list_del(&bus->list);
594 			continue;
595 		}
596 		list_move_tail(&bus->list, &buses);
597 	}
598 
599 	return err;
600 }
601 
ssb_fetch_invariants(struct ssb_bus * bus,ssb_invariants_func_t get_invariants)602 static int ssb_fetch_invariants(struct ssb_bus *bus,
603 				ssb_invariants_func_t get_invariants)
604 {
605 	struct ssb_init_invariants iv;
606 	int err;
607 
608 	memset(&iv, 0, sizeof(iv));
609 	err = get_invariants(bus, &iv);
610 	if (err)
611 		goto out;
612 	memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
613 	memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
614 	bus->has_cardbus_slot = iv.has_cardbus_slot;
615 out:
616 	return err;
617 }
618 
619 static int __maybe_unused
ssb_bus_register(struct ssb_bus * bus,ssb_invariants_func_t get_invariants,unsigned long baseaddr)620 ssb_bus_register(struct ssb_bus *bus,
621 		 ssb_invariants_func_t get_invariants,
622 		 unsigned long baseaddr)
623 {
624 	int err;
625 
626 	spin_lock_init(&bus->bar_lock);
627 	INIT_LIST_HEAD(&bus->list);
628 #ifdef CONFIG_SSB_EMBEDDED
629 	spin_lock_init(&bus->gpio_lock);
630 #endif
631 
632 	/* Powerup the bus */
633 	err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
634 	if (err)
635 		goto out;
636 
637 	/* Init SDIO-host device (if any), before the scan */
638 	err = ssb_sdio_init(bus);
639 	if (err)
640 		goto err_disable_xtal;
641 
642 	ssb_buses_lock();
643 	bus->busnumber = next_busnumber;
644 	/* Scan for devices (cores) */
645 	err = ssb_bus_scan(bus, baseaddr);
646 	if (err)
647 		goto err_sdio_exit;
648 
649 	/* Init PCI-host device (if any) */
650 	err = ssb_pci_init(bus);
651 	if (err)
652 		goto err_unmap;
653 	/* Init PCMCIA-host device (if any) */
654 	err = ssb_pcmcia_init(bus);
655 	if (err)
656 		goto err_pci_exit;
657 
658 	/* Initialize basic system devices (if available) */
659 	err = ssb_bus_powerup(bus, 0);
660 	if (err)
661 		goto err_pcmcia_exit;
662 	ssb_chipcommon_init(&bus->chipco);
663 	ssb_extif_init(&bus->extif);
664 	ssb_mipscore_init(&bus->mipscore);
665 	err = ssb_fetch_invariants(bus, get_invariants);
666 	if (err) {
667 		ssb_bus_may_powerdown(bus);
668 		goto err_pcmcia_exit;
669 	}
670 	ssb_bus_may_powerdown(bus);
671 
672 	/* Queue it for attach.
673 	 * See the comment at the ssb_is_early_boot definition.
674 	 */
675 	list_add_tail(&bus->list, &attach_queue);
676 	if (!ssb_is_early_boot) {
677 		/* This is not early boot, so we must attach the bus now */
678 		err = ssb_attach_queued_buses();
679 		if (err)
680 			goto err_dequeue;
681 	}
682 	next_busnumber++;
683 	ssb_buses_unlock();
684 
685 out:
686 	return err;
687 
688 err_dequeue:
689 	list_del(&bus->list);
690 err_pcmcia_exit:
691 	ssb_pcmcia_exit(bus);
692 err_pci_exit:
693 	ssb_pci_exit(bus);
694 err_unmap:
695 	ssb_iounmap(bus);
696 err_sdio_exit:
697 	ssb_sdio_exit(bus);
698 err_disable_xtal:
699 	ssb_buses_unlock();
700 	ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
701 	return err;
702 }
703 
704 #ifdef CONFIG_SSB_PCIHOST
ssb_bus_pcibus_register(struct ssb_bus * bus,struct pci_dev * host_pci)705 int ssb_bus_pcibus_register(struct ssb_bus *bus, struct pci_dev *host_pci)
706 {
707 	int err;
708 
709 	bus->bustype = SSB_BUSTYPE_PCI;
710 	bus->host_pci = host_pci;
711 	bus->ops = &ssb_pci_ops;
712 
713 	err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
714 	if (!err) {
715 		dev_info(&host_pci->dev,
716 			 "Sonics Silicon Backplane found on PCI device %s\n",
717 			 dev_name(&host_pci->dev));
718 	} else {
719 		dev_err(&host_pci->dev,
720 			"Failed to register PCI version of SSB with error %d\n",
721 			err);
722 	}
723 
724 	return err;
725 }
726 #endif /* CONFIG_SSB_PCIHOST */
727 
728 #ifdef CONFIG_SSB_PCMCIAHOST
ssb_bus_pcmciabus_register(struct ssb_bus * bus,struct pcmcia_device * pcmcia_dev,unsigned long baseaddr)729 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
730 			       struct pcmcia_device *pcmcia_dev,
731 			       unsigned long baseaddr)
732 {
733 	int err;
734 
735 	bus->bustype = SSB_BUSTYPE_PCMCIA;
736 	bus->host_pcmcia = pcmcia_dev;
737 	bus->ops = &ssb_pcmcia_ops;
738 
739 	err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
740 	if (!err) {
741 		dev_info(&pcmcia_dev->dev,
742 			 "Sonics Silicon Backplane found on PCMCIA device %s\n",
743 			 pcmcia_dev->devname);
744 	}
745 
746 	return err;
747 }
748 #endif /* CONFIG_SSB_PCMCIAHOST */
749 
750 #ifdef CONFIG_SSB_SDIOHOST
ssb_bus_sdiobus_register(struct ssb_bus * bus,struct sdio_func * func,unsigned int quirks)751 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
752 			     unsigned int quirks)
753 {
754 	int err;
755 
756 	bus->bustype = SSB_BUSTYPE_SDIO;
757 	bus->host_sdio = func;
758 	bus->ops = &ssb_sdio_ops;
759 	bus->quirks = quirks;
760 
761 	err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
762 	if (!err) {
763 		dev_info(&func->dev,
764 			 "Sonics Silicon Backplane found on SDIO device %s\n",
765 			 sdio_func_id(func));
766 	}
767 
768 	return err;
769 }
770 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
771 #endif /* CONFIG_SSB_PCMCIAHOST */
772 
773 #ifdef CONFIG_SSB_HOST_SOC
ssb_bus_host_soc_register(struct ssb_bus * bus,unsigned long baseaddr)774 int ssb_bus_host_soc_register(struct ssb_bus *bus, unsigned long baseaddr)
775 {
776 	int err;
777 
778 	bus->bustype = SSB_BUSTYPE_SSB;
779 	bus->ops = &ssb_host_soc_ops;
780 
781 	err = ssb_bus_register(bus, ssb_host_soc_get_invariants, baseaddr);
782 	if (!err) {
783 		pr_info("Sonics Silicon Backplane found at address 0x%08lX\n",
784 			baseaddr);
785 	}
786 
787 	return err;
788 }
789 #endif
790 
__ssb_driver_register(struct ssb_driver * drv,struct module * owner)791 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
792 {
793 	drv->drv.name = drv->name;
794 	drv->drv.bus = &ssb_bustype;
795 	drv->drv.owner = owner;
796 
797 	return driver_register(&drv->drv);
798 }
799 EXPORT_SYMBOL(__ssb_driver_register);
800 
ssb_driver_unregister(struct ssb_driver * drv)801 void ssb_driver_unregister(struct ssb_driver *drv)
802 {
803 	driver_unregister(&drv->drv);
804 }
805 EXPORT_SYMBOL(ssb_driver_unregister);
806 
ssb_set_devtypedata(struct ssb_device * dev,void * data)807 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
808 {
809 	struct ssb_bus *bus = dev->bus;
810 	struct ssb_device *ent;
811 	int i;
812 
813 	for (i = 0; i < bus->nr_devices; i++) {
814 		ent = &(bus->devices[i]);
815 		if (ent->id.vendor != dev->id.vendor)
816 			continue;
817 		if (ent->id.coreid != dev->id.coreid)
818 			continue;
819 
820 		ent->devtypedata = data;
821 	}
822 }
823 EXPORT_SYMBOL(ssb_set_devtypedata);
824 
clkfactor_f6_resolve(u32 v)825 static u32 clkfactor_f6_resolve(u32 v)
826 {
827 	/* map the magic values */
828 	switch (v) {
829 	case SSB_CHIPCO_CLK_F6_2:
830 		return 2;
831 	case SSB_CHIPCO_CLK_F6_3:
832 		return 3;
833 	case SSB_CHIPCO_CLK_F6_4:
834 		return 4;
835 	case SSB_CHIPCO_CLK_F6_5:
836 		return 5;
837 	case SSB_CHIPCO_CLK_F6_6:
838 		return 6;
839 	case SSB_CHIPCO_CLK_F6_7:
840 		return 7;
841 	}
842 	return 1;
843 }
844 
845 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
ssb_calc_clock_rate(u32 plltype,u32 n,u32 m)846 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
847 {
848 	u32 n1, n2, clock, m1, m2, m3, mc;
849 
850 	n1 = (n & SSB_CHIPCO_CLK_N1);
851 	n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
852 
853 	switch (plltype) {
854 	case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
855 		if (m & SSB_CHIPCO_CLK_T6_MMASK)
856 			return SSB_CHIPCO_CLK_T6_M1;
857 		return SSB_CHIPCO_CLK_T6_M0;
858 	case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
859 	case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
860 	case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
861 	case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
862 		n1 = clkfactor_f6_resolve(n1);
863 		n2 += SSB_CHIPCO_CLK_F5_BIAS;
864 		break;
865 	case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
866 		n1 += SSB_CHIPCO_CLK_T2_BIAS;
867 		n2 += SSB_CHIPCO_CLK_T2_BIAS;
868 		WARN_ON(!((n1 >= 2) && (n1 <= 7)));
869 		WARN_ON(!((n2 >= 5) && (n2 <= 23)));
870 		break;
871 	case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
872 		return 100000000;
873 	default:
874 		WARN_ON(1);
875 	}
876 
877 	switch (plltype) {
878 	case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
879 	case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
880 		clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
881 		break;
882 	default:
883 		clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
884 	}
885 	if (!clock)
886 		return 0;
887 
888 	m1 = (m & SSB_CHIPCO_CLK_M1);
889 	m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
890 	m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
891 	mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
892 
893 	switch (plltype) {
894 	case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
895 	case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
896 	case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
897 	case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
898 		m1 = clkfactor_f6_resolve(m1);
899 		if ((plltype == SSB_PLLTYPE_1) ||
900 		    (plltype == SSB_PLLTYPE_3))
901 			m2 += SSB_CHIPCO_CLK_F5_BIAS;
902 		else
903 			m2 = clkfactor_f6_resolve(m2);
904 		m3 = clkfactor_f6_resolve(m3);
905 
906 		switch (mc) {
907 		case SSB_CHIPCO_CLK_MC_BYPASS:
908 			return clock;
909 		case SSB_CHIPCO_CLK_MC_M1:
910 			return (clock / m1);
911 		case SSB_CHIPCO_CLK_MC_M1M2:
912 			return (clock / (m1 * m2));
913 		case SSB_CHIPCO_CLK_MC_M1M2M3:
914 			return (clock / (m1 * m2 * m3));
915 		case SSB_CHIPCO_CLK_MC_M1M3:
916 			return (clock / (m1 * m3));
917 		}
918 		return 0;
919 	case SSB_PLLTYPE_2:
920 		m1 += SSB_CHIPCO_CLK_T2_BIAS;
921 		m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
922 		m3 += SSB_CHIPCO_CLK_T2_BIAS;
923 		WARN_ON(!((m1 >= 2) && (m1 <= 7)));
924 		WARN_ON(!((m2 >= 3) && (m2 <= 10)));
925 		WARN_ON(!((m3 >= 2) && (m3 <= 7)));
926 
927 		if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
928 			clock /= m1;
929 		if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
930 			clock /= m2;
931 		if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
932 			clock /= m3;
933 		return clock;
934 	default:
935 		WARN_ON(1);
936 	}
937 	return 0;
938 }
939 
940 /* Get the current speed the backplane is running at */
ssb_clockspeed(struct ssb_bus * bus)941 u32 ssb_clockspeed(struct ssb_bus *bus)
942 {
943 	u32 rate;
944 	u32 plltype;
945 	u32 clkctl_n, clkctl_m;
946 
947 	if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
948 		return ssb_pmu_get_controlclock(&bus->chipco);
949 
950 	if (ssb_extif_available(&bus->extif))
951 		ssb_extif_get_clockcontrol(&bus->extif, &plltype,
952 					   &clkctl_n, &clkctl_m);
953 	else if (bus->chipco.dev)
954 		ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
955 					    &clkctl_n, &clkctl_m);
956 	else
957 		return 0;
958 
959 	if (bus->chip_id == 0x5365) {
960 		rate = 100000000;
961 	} else {
962 		rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
963 		if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
964 			rate /= 2;
965 	}
966 
967 	return rate;
968 }
969 EXPORT_SYMBOL(ssb_clockspeed);
970 
ssb_tmslow_reject_bitmask(struct ssb_device * dev)971 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
972 {
973 	u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
974 
975 	/* The REJECT bit seems to be different for Backplane rev 2.3 */
976 	switch (rev) {
977 	case SSB_IDLOW_SSBREV_22:
978 	case SSB_IDLOW_SSBREV_24:
979 	case SSB_IDLOW_SSBREV_26:
980 		return SSB_TMSLOW_REJECT;
981 	case SSB_IDLOW_SSBREV_23:
982 		return SSB_TMSLOW_REJECT_23;
983 	case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
984 	case SSB_IDLOW_SSBREV_27:     /* same here */
985 		return SSB_TMSLOW_REJECT;	/* this is a guess */
986 	case SSB_IDLOW_SSBREV:
987 		break;
988 	default:
989 		WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
990 	}
991 	return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
992 }
993 
ssb_device_is_enabled(struct ssb_device * dev)994 int ssb_device_is_enabled(struct ssb_device *dev)
995 {
996 	u32 val;
997 	u32 reject;
998 
999 	reject = ssb_tmslow_reject_bitmask(dev);
1000 	val = ssb_read32(dev, SSB_TMSLOW);
1001 	val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1002 
1003 	return (val == SSB_TMSLOW_CLOCK);
1004 }
1005 EXPORT_SYMBOL(ssb_device_is_enabled);
1006 
ssb_flush_tmslow(struct ssb_device * dev)1007 static void ssb_flush_tmslow(struct ssb_device *dev)
1008 {
1009 	/* Make _really_ sure the device has finished the TMSLOW
1010 	 * register write transaction, as we risk running into
1011 	 * a machine check exception otherwise.
1012 	 * Do this by reading the register back to commit the
1013 	 * PCI write and delay an additional usec for the device
1014 	 * to react to the change.
1015 	 */
1016 	ssb_read32(dev, SSB_TMSLOW);
1017 	udelay(1);
1018 }
1019 
ssb_device_enable(struct ssb_device * dev,u32 core_specific_flags)1020 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1021 {
1022 	u32 val;
1023 
1024 	ssb_device_disable(dev, core_specific_flags);
1025 	ssb_write32(dev, SSB_TMSLOW,
1026 		    SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1027 		    SSB_TMSLOW_FGC | core_specific_flags);
1028 	ssb_flush_tmslow(dev);
1029 
1030 	/* Clear SERR if set. This is a hw bug workaround. */
1031 	if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1032 		ssb_write32(dev, SSB_TMSHIGH, 0);
1033 
1034 	val = ssb_read32(dev, SSB_IMSTATE);
1035 	if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1036 		val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1037 		ssb_write32(dev, SSB_IMSTATE, val);
1038 	}
1039 
1040 	ssb_write32(dev, SSB_TMSLOW,
1041 		    SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1042 		    core_specific_flags);
1043 	ssb_flush_tmslow(dev);
1044 
1045 	ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1046 		    core_specific_flags);
1047 	ssb_flush_tmslow(dev);
1048 }
1049 EXPORT_SYMBOL(ssb_device_enable);
1050 
1051 /* Wait for bitmask in a register to get set or cleared.
1052  * timeout is in units of ten-microseconds
1053  */
ssb_wait_bits(struct ssb_device * dev,u16 reg,u32 bitmask,int timeout,int set)1054 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1055 			 int timeout, int set)
1056 {
1057 	int i;
1058 	u32 val;
1059 
1060 	for (i = 0; i < timeout; i++) {
1061 		val = ssb_read32(dev, reg);
1062 		if (set) {
1063 			if ((val & bitmask) == bitmask)
1064 				return 0;
1065 		} else {
1066 			if (!(val & bitmask))
1067 				return 0;
1068 		}
1069 		udelay(10);
1070 	}
1071 	dev_err(dev->dev,
1072 		"Timeout waiting for bitmask %08X on register %04X to %s\n",
1073 		bitmask, reg, set ? "set" : "clear");
1074 
1075 	return -ETIMEDOUT;
1076 }
1077 
ssb_device_disable(struct ssb_device * dev,u32 core_specific_flags)1078 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1079 {
1080 	u32 reject, val;
1081 
1082 	if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1083 		return;
1084 
1085 	reject = ssb_tmslow_reject_bitmask(dev);
1086 
1087 	if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1088 		ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1089 		ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1090 		ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1091 
1092 		if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1093 			val = ssb_read32(dev, SSB_IMSTATE);
1094 			val |= SSB_IMSTATE_REJECT;
1095 			ssb_write32(dev, SSB_IMSTATE, val);
1096 			ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1097 				      0);
1098 		}
1099 
1100 		ssb_write32(dev, SSB_TMSLOW,
1101 			SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1102 			reject | SSB_TMSLOW_RESET |
1103 			core_specific_flags);
1104 		ssb_flush_tmslow(dev);
1105 
1106 		if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1107 			val = ssb_read32(dev, SSB_IMSTATE);
1108 			val &= ~SSB_IMSTATE_REJECT;
1109 			ssb_write32(dev, SSB_IMSTATE, val);
1110 		}
1111 	}
1112 
1113 	ssb_write32(dev, SSB_TMSLOW,
1114 		    reject | SSB_TMSLOW_RESET |
1115 		    core_specific_flags);
1116 	ssb_flush_tmslow(dev);
1117 }
1118 EXPORT_SYMBOL(ssb_device_disable);
1119 
1120 /* Some chipsets need routing known for PCIe and 64-bit DMA */
ssb_dma_translation_special_bit(struct ssb_device * dev)1121 static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1122 {
1123 	u16 chip_id = dev->bus->chip_id;
1124 
1125 	if (dev->id.coreid == SSB_DEV_80211) {
1126 		return (chip_id == 0x4322 || chip_id == 43221 ||
1127 			chip_id == 43231 || chip_id == 43222);
1128 	}
1129 
1130 	return false;
1131 }
1132 
ssb_dma_translation(struct ssb_device * dev)1133 u32 ssb_dma_translation(struct ssb_device *dev)
1134 {
1135 	switch (dev->bus->bustype) {
1136 	case SSB_BUSTYPE_SSB:
1137 		return 0;
1138 	case SSB_BUSTYPE_PCI:
1139 		if (pci_is_pcie(dev->bus->host_pci) &&
1140 		    ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1141 			return SSB_PCIE_DMA_H32;
1142 		} else {
1143 			if (ssb_dma_translation_special_bit(dev))
1144 				return SSB_PCIE_DMA_H32;
1145 			else
1146 				return SSB_PCI_DMA;
1147 		}
1148 	default:
1149 		__ssb_dma_not_implemented(dev);
1150 	}
1151 	return 0;
1152 }
1153 EXPORT_SYMBOL(ssb_dma_translation);
1154 
ssb_bus_may_powerdown(struct ssb_bus * bus)1155 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1156 {
1157 	struct ssb_chipcommon *cc;
1158 	int err = 0;
1159 
1160 	/* On buses where more than one core may be working
1161 	 * at a time, we must not powerdown stuff if there are
1162 	 * still cores that may want to run.
1163 	 */
1164 	if (bus->bustype == SSB_BUSTYPE_SSB)
1165 		goto out;
1166 
1167 	cc = &bus->chipco;
1168 
1169 	if (!cc->dev)
1170 		goto out;
1171 	if (cc->dev->id.revision < 5)
1172 		goto out;
1173 
1174 	ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1175 	err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1176 	if (err)
1177 		goto error;
1178 out:
1179 	bus->powered_up = 0;
1180 	return err;
1181 error:
1182 	pr_err("Bus powerdown failed\n");
1183 	goto out;
1184 }
1185 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1186 
ssb_bus_powerup(struct ssb_bus * bus,bool dynamic_pctl)1187 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1188 {
1189 	int err;
1190 	enum ssb_clkmode mode;
1191 
1192 	err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1193 	if (err)
1194 		goto error;
1195 
1196 	bus->powered_up = 1;
1197 
1198 	mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1199 	ssb_chipco_set_clockmode(&bus->chipco, mode);
1200 
1201 	return 0;
1202 error:
1203 	pr_err("Bus powerup failed\n");
1204 	return err;
1205 }
1206 EXPORT_SYMBOL(ssb_bus_powerup);
1207 
ssb_broadcast_value(struct ssb_device * dev,u32 address,u32 data)1208 static void ssb_broadcast_value(struct ssb_device *dev,
1209 				u32 address, u32 data)
1210 {
1211 #ifdef CONFIG_SSB_DRIVER_PCICORE
1212 	/* This is used for both, PCI and ChipCommon core, so be careful. */
1213 	BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1214 	BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1215 #endif
1216 
1217 	ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1218 	ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1219 	ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1220 	ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1221 }
1222 
ssb_commit_settings(struct ssb_bus * bus)1223 void ssb_commit_settings(struct ssb_bus *bus)
1224 {
1225 	struct ssb_device *dev;
1226 
1227 #ifdef CONFIG_SSB_DRIVER_PCICORE
1228 	dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1229 #else
1230 	dev = bus->chipco.dev;
1231 #endif
1232 	if (WARN_ON(!dev))
1233 		return;
1234 	/* This forces an update of the cached registers. */
1235 	ssb_broadcast_value(dev, 0xFD8, 0);
1236 }
1237 EXPORT_SYMBOL(ssb_commit_settings);
1238 
ssb_admatch_base(u32 adm)1239 u32 ssb_admatch_base(u32 adm)
1240 {
1241 	u32 base = 0;
1242 
1243 	switch (adm & SSB_ADM_TYPE) {
1244 	case SSB_ADM_TYPE0:
1245 		base = (adm & SSB_ADM_BASE0);
1246 		break;
1247 	case SSB_ADM_TYPE1:
1248 		WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1249 		base = (adm & SSB_ADM_BASE1);
1250 		break;
1251 	case SSB_ADM_TYPE2:
1252 		WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1253 		base = (adm & SSB_ADM_BASE2);
1254 		break;
1255 	default:
1256 		WARN_ON(1);
1257 	}
1258 
1259 	return base;
1260 }
1261 EXPORT_SYMBOL(ssb_admatch_base);
1262 
ssb_admatch_size(u32 adm)1263 u32 ssb_admatch_size(u32 adm)
1264 {
1265 	u32 size = 0;
1266 
1267 	switch (adm & SSB_ADM_TYPE) {
1268 	case SSB_ADM_TYPE0:
1269 		size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1270 		break;
1271 	case SSB_ADM_TYPE1:
1272 		WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1273 		size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1274 		break;
1275 	case SSB_ADM_TYPE2:
1276 		WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1277 		size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1278 		break;
1279 	default:
1280 		WARN_ON(1);
1281 	}
1282 	size = (1 << (size + 1));
1283 
1284 	return size;
1285 }
1286 EXPORT_SYMBOL(ssb_admatch_size);
1287 
ssb_modinit(void)1288 static int __init ssb_modinit(void)
1289 {
1290 	int err;
1291 
1292 	/* See the comment at the ssb_is_early_boot definition */
1293 	ssb_is_early_boot = 0;
1294 	err = bus_register(&ssb_bustype);
1295 	if (err)
1296 		return err;
1297 
1298 	/* Maybe we already registered some buses at early boot.
1299 	 * Check for this and attach them
1300 	 */
1301 	ssb_buses_lock();
1302 	err = ssb_attach_queued_buses();
1303 	ssb_buses_unlock();
1304 	if (err) {
1305 		bus_unregister(&ssb_bustype);
1306 		goto out;
1307 	}
1308 
1309 	err = b43_pci_ssb_bridge_init();
1310 	if (err) {
1311 		pr_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
1312 		/* don't fail SSB init because of this */
1313 	}
1314 	err = ssb_host_pcmcia_init();
1315 	if (err) {
1316 		pr_err("PCMCIA host initialization failed\n");
1317 		/* don't fail SSB init because of this */
1318 	}
1319 	err = ssb_gige_init();
1320 	if (err) {
1321 		pr_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
1322 		/* don't fail SSB init because of this */
1323 		err = 0;
1324 	}
1325 out:
1326 	return err;
1327 }
1328 /* ssb must be initialized after PCI but before the ssb drivers.
1329  * That means we must use some initcall between subsys_initcall
1330  * and device_initcall.
1331  */
1332 fs_initcall(ssb_modinit);
1333 
ssb_modexit(void)1334 static void __exit ssb_modexit(void)
1335 {
1336 	ssb_gige_exit();
1337 	ssb_host_pcmcia_exit();
1338 	b43_pci_ssb_bridge_exit();
1339 	bus_unregister(&ssb_bustype);
1340 }
1341 module_exit(ssb_modexit)
1342