xref: /openbmc/linux/arch/sparc/kernel/irq_32.c (revision b2441318)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Interrupt request handling routines. On the
4  * Sparc the IRQs are basically 'cast in stone'
5  * and you are supposed to probe the prom's device
6  * node trees to find out who's got which IRQ.
7  *
8  *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
9  *  Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
10  *  Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com)
11  *  Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
12  *  Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
13  */
14 
15 #include <linux/kernel_stat.h>
16 #include <linux/seq_file.h>
17 #include <linux/export.h>
18 
19 #include <asm/cacheflush.h>
20 #include <asm/cpudata.h>
21 #include <asm/setup.h>
22 #include <asm/pcic.h>
23 #include <asm/leon.h>
24 
25 #include "kernel.h"
26 #include "irq.h"
27 
28 /* platform specific irq setup */
29 struct sparc_config sparc_config;
30 
arch_local_irq_save(void)31 unsigned long arch_local_irq_save(void)
32 {
33 	unsigned long retval;
34 	unsigned long tmp;
35 
36 	__asm__ __volatile__(
37 		"rd	%%psr, %0\n\t"
38 		"or	%0, %2, %1\n\t"
39 		"wr	%1, 0, %%psr\n\t"
40 		"nop; nop; nop\n"
41 		: "=&r" (retval), "=r" (tmp)
42 		: "i" (PSR_PIL)
43 		: "memory");
44 
45 	return retval;
46 }
47 EXPORT_SYMBOL(arch_local_irq_save);
48 
arch_local_irq_enable(void)49 void arch_local_irq_enable(void)
50 {
51 	unsigned long tmp;
52 
53 	__asm__ __volatile__(
54 		"rd	%%psr, %0\n\t"
55 		"andn	%0, %1, %0\n\t"
56 		"wr	%0, 0, %%psr\n\t"
57 		"nop; nop; nop\n"
58 		: "=&r" (tmp)
59 		: "i" (PSR_PIL)
60 		: "memory");
61 }
62 EXPORT_SYMBOL(arch_local_irq_enable);
63 
arch_local_irq_restore(unsigned long old_psr)64 void arch_local_irq_restore(unsigned long old_psr)
65 {
66 	unsigned long tmp;
67 
68 	__asm__ __volatile__(
69 		"rd	%%psr, %0\n\t"
70 		"and	%2, %1, %2\n\t"
71 		"andn	%0, %1, %0\n\t"
72 		"wr	%0, %2, %%psr\n\t"
73 		"nop; nop; nop\n"
74 		: "=&r" (tmp)
75 		: "i" (PSR_PIL), "r" (old_psr)
76 		: "memory");
77 }
78 EXPORT_SYMBOL(arch_local_irq_restore);
79 
80 /*
81  * Dave Redman (djhr@tadpole.co.uk)
82  *
83  * IRQ numbers.. These are no longer restricted to 15..
84  *
85  * this is done to enable SBUS cards and onboard IO to be masked
86  * correctly. using the interrupt level isn't good enough.
87  *
88  * For example:
89  *   A device interrupting at sbus level6 and the Floppy both come in
90  *   at IRQ11, but enabling and disabling them requires writing to
91  *   different bits in the SLAVIO/SEC.
92  *
93  * As a result of these changes sun4m machines could now support
94  * directed CPU interrupts using the existing enable/disable irq code
95  * with tweaks.
96  *
97  * Sun4d complicates things even further.  IRQ numbers are arbitrary
98  * 32-bit values in that case.  Since this is similar to sparc64,
99  * we adopt a virtual IRQ numbering scheme as is done there.
100  * Virutal interrupt numbers are allocated by build_irq().  So NR_IRQS
101  * just becomes a limit of how many interrupt sources we can handle in
102  * a single system.  Even fully loaded SS2000 machines top off at
103  * about 32 interrupt sources or so, therefore a NR_IRQS value of 64
104  * is more than enough.
105   *
106  * We keep a map of per-PIL enable interrupts.  These get wired
107  * up via the irq_chip->startup() method which gets invoked by
108  * the generic IRQ layer during request_irq().
109  */
110 
111 
112 /* Table of allocated irqs. Unused entries has irq == 0 */
113 static struct irq_bucket irq_table[NR_IRQS];
114 /* Protect access to irq_table */
115 static DEFINE_SPINLOCK(irq_table_lock);
116 
117 /* Map between the irq identifier used in hw to the irq_bucket. */
118 struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
119 /* Protect access to irq_map */
120 static DEFINE_SPINLOCK(irq_map_lock);
121 
122 /* Allocate a new irq from the irq_table */
irq_alloc(unsigned int real_irq,unsigned int pil)123 unsigned int irq_alloc(unsigned int real_irq, unsigned int pil)
124 {
125 	unsigned long flags;
126 	unsigned int i;
127 
128 	spin_lock_irqsave(&irq_table_lock, flags);
129 	for (i = 1; i < NR_IRQS; i++) {
130 		if (irq_table[i].real_irq == real_irq && irq_table[i].pil == pil)
131 			goto found;
132 	}
133 
134 	for (i = 1; i < NR_IRQS; i++) {
135 		if (!irq_table[i].irq)
136 			break;
137 	}
138 
139 	if (i < NR_IRQS) {
140 		irq_table[i].real_irq = real_irq;
141 		irq_table[i].irq = i;
142 		irq_table[i].pil = pil;
143 	} else {
144 		printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
145 		i = 0;
146 	}
147 found:
148 	spin_unlock_irqrestore(&irq_table_lock, flags);
149 
150 	return i;
151 }
152 
153 /* Based on a single pil handler_irq may need to call several
154  * interrupt handlers. Use irq_map as entry to irq_table,
155  * and let each entry in irq_table point to the next entry.
156  */
irq_link(unsigned int irq)157 void irq_link(unsigned int irq)
158 {
159 	struct irq_bucket *p;
160 	unsigned long flags;
161 	unsigned int pil;
162 
163 	BUG_ON(irq >= NR_IRQS);
164 
165 	spin_lock_irqsave(&irq_map_lock, flags);
166 
167 	p = &irq_table[irq];
168 	pil = p->pil;
169 	BUG_ON(pil >= SUN4D_MAX_IRQ);
170 	p->next = irq_map[pil];
171 	irq_map[pil] = p;
172 
173 	spin_unlock_irqrestore(&irq_map_lock, flags);
174 }
175 
irq_unlink(unsigned int irq)176 void irq_unlink(unsigned int irq)
177 {
178 	struct irq_bucket *p, **pnext;
179 	unsigned long flags;
180 
181 	BUG_ON(irq >= NR_IRQS);
182 
183 	spin_lock_irqsave(&irq_map_lock, flags);
184 
185 	p = &irq_table[irq];
186 	BUG_ON(p->pil >= SUN4D_MAX_IRQ);
187 	pnext = &irq_map[p->pil];
188 	while (*pnext != p)
189 		pnext = &(*pnext)->next;
190 	*pnext = p->next;
191 
192 	spin_unlock_irqrestore(&irq_map_lock, flags);
193 }
194 
195 
196 /* /proc/interrupts printing */
arch_show_interrupts(struct seq_file * p,int prec)197 int arch_show_interrupts(struct seq_file *p, int prec)
198 {
199 	int j;
200 
201 #ifdef CONFIG_SMP
202 	seq_printf(p, "RES: ");
203 	for_each_online_cpu(j)
204 		seq_printf(p, "%10u ", cpu_data(j).irq_resched_count);
205 	seq_printf(p, "     IPI rescheduling interrupts\n");
206 	seq_printf(p, "CAL: ");
207 	for_each_online_cpu(j)
208 		seq_printf(p, "%10u ", cpu_data(j).irq_call_count);
209 	seq_printf(p, "     IPI function call interrupts\n");
210 #endif
211 	seq_printf(p, "NMI: ");
212 	for_each_online_cpu(j)
213 		seq_printf(p, "%10u ", cpu_data(j).counter);
214 	seq_printf(p, "     Non-maskable interrupts\n");
215 	return 0;
216 }
217 
handler_irq(unsigned int pil,struct pt_regs * regs)218 void handler_irq(unsigned int pil, struct pt_regs *regs)
219 {
220 	struct pt_regs *old_regs;
221 	struct irq_bucket *p;
222 
223 	BUG_ON(pil > 15);
224 	old_regs = set_irq_regs(regs);
225 	irq_enter();
226 
227 	p = irq_map[pil];
228 	while (p) {
229 		struct irq_bucket *next = p->next;
230 
231 		generic_handle_irq(p->irq);
232 		p = next;
233 	}
234 	irq_exit();
235 	set_irq_regs(old_regs);
236 }
237 
238 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
239 static unsigned int floppy_irq;
240 
sparc_floppy_request_irq(unsigned int irq,irq_handler_t irq_handler)241 int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler)
242 {
243 	unsigned int cpu_irq;
244 	int err;
245 
246 
247 	err = request_irq(irq, irq_handler, 0, "floppy", NULL);
248 	if (err)
249 		return -1;
250 
251 	/* Save for later use in floppy interrupt handler */
252 	floppy_irq = irq;
253 
254 	cpu_irq = (irq & (NR_IRQS - 1));
255 
256 	/* Dork with trap table if we get this far. */
257 #define INSTANTIATE(table) \
258 	table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \
259 	table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \
260 		SPARC_BRANCH((unsigned long) floppy_hardint, \
261 			     (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\
262 	table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \
263 	table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;
264 
265 	INSTANTIATE(sparc_ttable)
266 
267 #if defined CONFIG_SMP
268 	if (sparc_cpu_model != sparc_leon) {
269 		struct tt_entry *trap_table;
270 
271 		trap_table = &trapbase_cpu1;
272 		INSTANTIATE(trap_table)
273 		trap_table = &trapbase_cpu2;
274 		INSTANTIATE(trap_table)
275 		trap_table = &trapbase_cpu3;
276 		INSTANTIATE(trap_table)
277 	}
278 #endif
279 #undef INSTANTIATE
280 	/*
281 	 * XXX Correct thing whould be to flush only I- and D-cache lines
282 	 * which contain the handler in question. But as of time of the
283 	 * writing we have no CPU-neutral interface to fine-grained flushes.
284 	 */
285 	flush_cache_all();
286 	return 0;
287 }
288 EXPORT_SYMBOL(sparc_floppy_request_irq);
289 
290 /*
291  * These variables are used to access state from the assembler
292  * interrupt handler, floppy_hardint, so we cannot put these in
293  * the floppy driver image because that would not work in the
294  * modular case.
295  */
296 volatile unsigned char *fdc_status;
297 EXPORT_SYMBOL(fdc_status);
298 
299 char *pdma_vaddr;
300 EXPORT_SYMBOL(pdma_vaddr);
301 
302 unsigned long pdma_size;
303 EXPORT_SYMBOL(pdma_size);
304 
305 volatile int doing_pdma;
306 EXPORT_SYMBOL(doing_pdma);
307 
308 char *pdma_base;
309 EXPORT_SYMBOL(pdma_base);
310 
311 unsigned long pdma_areasize;
312 EXPORT_SYMBOL(pdma_areasize);
313 
314 /* Use the generic irq support to call floppy_interrupt
315  * which was setup using request_irq() in sparc_floppy_request_irq().
316  * We only have one floppy interrupt so we do not need to check
317  * for additional handlers being wired up by irq_link()
318  */
sparc_floppy_irq(int irq,void * dev_id,struct pt_regs * regs)319 void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)
320 {
321 	struct pt_regs *old_regs;
322 
323 	old_regs = set_irq_regs(regs);
324 	irq_enter();
325 	generic_handle_irq(floppy_irq);
326 	irq_exit();
327 	set_irq_regs(old_regs);
328 }
329 #endif
330 
331 /* djhr
332  * This could probably be made indirect too and assigned in the CPU
333  * bits of the code. That would be much nicer I think and would also
334  * fit in with the idea of being able to tune your kernel for your machine
335  * by removing unrequired machine and device support.
336  *
337  */
338 
init_IRQ(void)339 void __init init_IRQ(void)
340 {
341 	switch (sparc_cpu_model) {
342 	case sun4m:
343 		pcic_probe();
344 		if (pcic_present())
345 			sun4m_pci_init_IRQ();
346 		else
347 			sun4m_init_IRQ();
348 		break;
349 
350 	case sun4d:
351 		sun4d_init_IRQ();
352 		break;
353 
354 	case sparc_leon:
355 		leon_init_IRQ();
356 		break;
357 
358 	default:
359 		prom_printf("Cannot initialize IRQs on this Sun machine...");
360 		break;
361 	}
362 }
363 
364