xref: /openbmc/linux/sound/pci/ice1712/delta.c (revision 3635f862)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *   ALSA driver for ICEnsemble ICE1712 (Envy24)
4  *
5  *   Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
6  *			    Audiophile, Digigram VX442
7  *
8  *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
9  */
10 
11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/mutex.h>
16 
17 #include <sound/core.h>
18 #include <sound/cs8427.h>
19 #include <sound/asoundef.h>
20 
21 #include "ice1712.h"
22 #include "delta.h"
23 
24 #define SND_CS8403
25 #include <sound/cs8403.h>
26 
27 
28 /*
29  * CS8427 via SPI mode (for Audiophile), emulated I2C
30  */
31 
32 /* send 8 bits */
ap_cs8427_write_byte(struct snd_ice1712 * ice,unsigned char data,unsigned char tmp)33 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
34 {
35 	int idx;
36 
37 	for (idx = 7; idx >= 0; idx--) {
38 		tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
39 		if (data & (1 << idx))
40 			tmp |= ICE1712_DELTA_AP_DOUT;
41 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
42 		udelay(5);
43 		tmp |= ICE1712_DELTA_AP_CCLK;
44 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
45 		udelay(5);
46 	}
47 }
48 
49 /* read 8 bits */
ap_cs8427_read_byte(struct snd_ice1712 * ice,unsigned char tmp)50 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
51 {
52 	unsigned char data = 0;
53 	int idx;
54 
55 	for (idx = 7; idx >= 0; idx--) {
56 		tmp &= ~ICE1712_DELTA_AP_CCLK;
57 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
58 		udelay(5);
59 		if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
60 			data |= 1 << idx;
61 		tmp |= ICE1712_DELTA_AP_CCLK;
62 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
63 		udelay(5);
64 	}
65 	return data;
66 }
67 
68 /* assert chip select */
ap_cs8427_codec_select(struct snd_ice1712 * ice)69 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
70 {
71 	unsigned char tmp;
72 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
73 	switch (ice->eeprom.subvendor) {
74 	case ICE1712_SUBDEVICE_DELTA1010E:
75 	case ICE1712_SUBDEVICE_DELTA1010LT:
76 		tmp &= ~ICE1712_DELTA_1010LT_CS;
77 		tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
78 		break;
79 	case ICE1712_SUBDEVICE_AUDIOPHILE:
80 	case ICE1712_SUBDEVICE_DELTA410:
81 		tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
82 		tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
83 		break;
84 	case ICE1712_SUBDEVICE_DELTA66E:
85 		tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
86 		       ICE1712_DELTA_66E_CS_CHIP_B;
87 		tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
88 		break;
89 	case ICE1712_SUBDEVICE_VX442:
90 		tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
91 		tmp &= ~ICE1712_VX442_CS_DIGITAL;
92 		break;
93 	}
94 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
95 	udelay(5);
96 	return tmp;
97 }
98 
99 /* deassert chip select */
ap_cs8427_codec_deassert(struct snd_ice1712 * ice,unsigned char tmp)100 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
101 {
102 	switch (ice->eeprom.subvendor) {
103 	case ICE1712_SUBDEVICE_DELTA1010E:
104 	case ICE1712_SUBDEVICE_DELTA1010LT:
105 		tmp &= ~ICE1712_DELTA_1010LT_CS;
106 		tmp |= ICE1712_DELTA_1010LT_CS_NONE;
107 		break;
108 	case ICE1712_SUBDEVICE_AUDIOPHILE:
109 	case ICE1712_SUBDEVICE_DELTA410:
110 		tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
111 		break;
112 	case ICE1712_SUBDEVICE_DELTA66E:
113 		tmp |= ICE1712_DELTA_66E_CS_CS8427;
114 		break;
115 	case ICE1712_SUBDEVICE_VX442:
116 		tmp |= ICE1712_VX442_CS_DIGITAL;
117 		break;
118 	}
119 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
120 }
121 
122 /* sequential write */
ap_cs8427_sendbytes(struct snd_i2c_device * device,unsigned char * bytes,int count)123 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
124 {
125 	struct snd_ice1712 *ice = device->bus->private_data;
126 	int res = count;
127 	unsigned char tmp;
128 
129 	mutex_lock(&ice->gpio_mutex);
130 	tmp = ap_cs8427_codec_select(ice);
131 	ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
132 	while (count-- > 0)
133 		ap_cs8427_write_byte(ice, *bytes++, tmp);
134 	ap_cs8427_codec_deassert(ice, tmp);
135 	mutex_unlock(&ice->gpio_mutex);
136 	return res;
137 }
138 
139 /* sequential read */
ap_cs8427_readbytes(struct snd_i2c_device * device,unsigned char * bytes,int count)140 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
141 {
142 	struct snd_ice1712 *ice = device->bus->private_data;
143 	int res = count;
144 	unsigned char tmp;
145 
146 	mutex_lock(&ice->gpio_mutex);
147 	tmp = ap_cs8427_codec_select(ice);
148 	ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
149 	while (count-- > 0)
150 		*bytes++ = ap_cs8427_read_byte(ice, tmp);
151 	ap_cs8427_codec_deassert(ice, tmp);
152 	mutex_unlock(&ice->gpio_mutex);
153 	return res;
154 }
155 
ap_cs8427_probeaddr(struct snd_i2c_bus * bus,unsigned short addr)156 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
157 {
158 	if (addr == 0x10)
159 		return 1;
160 	return -ENOENT;
161 }
162 
163 static const struct snd_i2c_ops ap_cs8427_i2c_ops = {
164 	.sendbytes = ap_cs8427_sendbytes,
165 	.readbytes = ap_cs8427_readbytes,
166 	.probeaddr = ap_cs8427_probeaddr,
167 };
168 
169 /*
170  */
171 
snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 * ice,unsigned char bits)172 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
173 {
174 	unsigned char tmp, mask1, mask2;
175 	int idx;
176 	/* send byte to transmitter */
177 	mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
178 	mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
179 	mutex_lock(&ice->gpio_mutex);
180 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
181 	for (idx = 7; idx >= 0; idx--) {
182 		tmp &= ~(mask1 | mask2);
183 		if (bits & (1 << idx))
184 			tmp |= mask2;
185 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
186 		udelay(100);
187 		tmp |= mask1;
188 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
189 		udelay(100);
190 	}
191 	tmp &= ~mask1;
192 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
193 	mutex_unlock(&ice->gpio_mutex);
194 }
195 
196 
delta_spdif_default_get(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)197 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
198 {
199 	snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
200 }
201 
delta_spdif_default_put(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)202 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
203 {
204 	unsigned int val;
205 	int change;
206 
207 	val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
208 	spin_lock_irq(&ice->reg_lock);
209 	change = ice->spdif.cs8403_bits != val;
210 	ice->spdif.cs8403_bits = val;
211 	if (change && ice->playback_pro_substream == NULL) {
212 		spin_unlock_irq(&ice->reg_lock);
213 		snd_ice1712_delta_cs8403_spdif_write(ice, val);
214 	} else {
215 		spin_unlock_irq(&ice->reg_lock);
216 	}
217 	return change;
218 }
219 
delta_spdif_stream_get(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)220 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
221 {
222 	snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
223 }
224 
delta_spdif_stream_put(struct snd_ice1712 * ice,struct snd_ctl_elem_value * ucontrol)225 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
226 {
227 	unsigned int val;
228 	int change;
229 
230 	val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
231 	spin_lock_irq(&ice->reg_lock);
232 	change = ice->spdif.cs8403_stream_bits != val;
233 	ice->spdif.cs8403_stream_bits = val;
234 	if (change && ice->playback_pro_substream != NULL) {
235 		spin_unlock_irq(&ice->reg_lock);
236 		snd_ice1712_delta_cs8403_spdif_write(ice, val);
237 	} else {
238 		spin_unlock_irq(&ice->reg_lock);
239 	}
240 	return change;
241 }
242 
243 
244 /*
245  * AK4524 on Delta 44 and 66 to choose the chip mask
246  */
delta_ak4524_lock(struct snd_akm4xxx * ak,int chip)247 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
248 {
249         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
250         struct snd_ice1712 *ice = ak->private_data[0];
251 
252 	snd_ice1712_save_gpio_status(ice);
253 	priv->cs_mask =
254 	priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
255 				    ICE1712_DELTA_CODEC_CHIP_B;
256 }
257 
258 /*
259  * AK4524 on Delta1010LT to choose the chip address
260  */
delta1010lt_ak4524_lock(struct snd_akm4xxx * ak,int chip)261 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
262 {
263         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
264         struct snd_ice1712 *ice = ak->private_data[0];
265 
266 	snd_ice1712_save_gpio_status(ice);
267 	priv->cs_mask = ICE1712_DELTA_1010LT_CS;
268 	priv->cs_addr = chip << 4;
269 }
270 
271 /*
272  * AK4524 on Delta66 rev E to choose the chip address
273  */
delta66e_ak4524_lock(struct snd_akm4xxx * ak,int chip)274 static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
275 {
276 	struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
277 	struct snd_ice1712 *ice = ak->private_data[0];
278 
279 	snd_ice1712_save_gpio_status(ice);
280 	priv->cs_mask =
281 	priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
282 				    ICE1712_DELTA_66E_CS_CHIP_B;
283 }
284 
285 /*
286  * AK4528 on VX442 to choose the chip mask
287  */
vx442_ak4524_lock(struct snd_akm4xxx * ak,int chip)288 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
289 {
290         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
291         struct snd_ice1712 *ice = ak->private_data[0];
292 
293 	snd_ice1712_save_gpio_status(ice);
294 	priv->cs_mask =
295 	priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
296 				    ICE1712_VX442_CODEC_CHIP_B;
297 }
298 
299 /*
300  * change the DFS bit according rate for Delta1010
301  */
delta_1010_set_rate_val(struct snd_ice1712 * ice,unsigned int rate)302 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
303 {
304 	unsigned char tmp, tmp2;
305 
306 	if (rate == 0)	/* no hint - S/PDIF input is master, simply return */
307 		return;
308 
309 	mutex_lock(&ice->gpio_mutex);
310 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
311 	tmp2 = tmp & ~ICE1712_DELTA_DFS;
312 	if (rate > 48000)
313 		tmp2 |= ICE1712_DELTA_DFS;
314 	if (tmp != tmp2)
315 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
316 	mutex_unlock(&ice->gpio_mutex);
317 }
318 
319 /*
320  * change the rate of AK4524 on Delta 44/66, AP, 1010LT
321  */
delta_ak4524_set_rate_val(struct snd_akm4xxx * ak,unsigned int rate)322 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
323 {
324 	unsigned char tmp, tmp2;
325 	struct snd_ice1712 *ice = ak->private_data[0];
326 
327 	if (rate == 0)	/* no hint - S/PDIF input is master, simply return */
328 		return;
329 
330 	/* check before reset ak4524 to avoid unnecessary clicks */
331 	mutex_lock(&ice->gpio_mutex);
332 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
333 	mutex_unlock(&ice->gpio_mutex);
334 	tmp2 = tmp & ~ICE1712_DELTA_DFS;
335 	if (rate > 48000)
336 		tmp2 |= ICE1712_DELTA_DFS;
337 	if (tmp == tmp2)
338 		return;
339 
340 	/* do it again */
341 	snd_akm4xxx_reset(ak, 1);
342 	mutex_lock(&ice->gpio_mutex);
343 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
344 	if (rate > 48000)
345 		tmp |= ICE1712_DELTA_DFS;
346 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
347 	mutex_unlock(&ice->gpio_mutex);
348 	snd_akm4xxx_reset(ak, 0);
349 }
350 
351 /*
352  * change the rate of AK4524 on VX442
353  */
vx442_ak4524_set_rate_val(struct snd_akm4xxx * ak,unsigned int rate)354 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
355 {
356 	unsigned char val;
357 
358 	val = (rate > 48000) ? 0x65 : 0x60;
359 	if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
360 	    snd_akm4xxx_get(ak, 1, 0x02) != val) {
361 		snd_akm4xxx_reset(ak, 1);
362 		snd_akm4xxx_write(ak, 0, 0x02, val);
363 		snd_akm4xxx_write(ak, 1, 0x02, val);
364 		snd_akm4xxx_reset(ak, 0);
365 	}
366 }
367 
368 
369 /*
370  * SPDIF ops for Delta 1010, Dio, 66
371  */
372 
373 /* open callback */
delta_open_spdif(struct snd_ice1712 * ice,struct snd_pcm_substream * substream)374 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
375 {
376 	ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
377 }
378 
379 /* set up */
delta_setup_spdif(struct snd_ice1712 * ice,int rate)380 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
381 {
382 	unsigned long flags;
383 	unsigned int tmp;
384 	int change;
385 
386 	spin_lock_irqsave(&ice->reg_lock, flags);
387 	tmp = ice->spdif.cs8403_stream_bits;
388 	if (tmp & 0x01)		/* consumer */
389 		tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
390 	switch (rate) {
391 	case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
392 	case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
393 	case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
394 	default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
395 	}
396 	change = ice->spdif.cs8403_stream_bits != tmp;
397 	ice->spdif.cs8403_stream_bits = tmp;
398 	spin_unlock_irqrestore(&ice->reg_lock, flags);
399 	if (change)
400 		snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
401 	snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
402 }
403 
404 #define snd_ice1712_delta1010lt_wordclock_status_info \
405 	snd_ctl_boolean_mono_info
406 
snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)407 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
408 			 struct snd_ctl_elem_value *ucontrol)
409 {
410 	char reg = 0x10; /* CS8427 receiver error register */
411 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
412 
413 	if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
414 		dev_err(ice->card->dev,
415 			"unable to send register 0x%x byte to CS8427\n", reg);
416 	snd_i2c_readbytes(ice->cs8427, &reg, 1);
417 	ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
418 	return 0;
419 }
420 
421 static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status =
422 {
423 	.access =	(SNDRV_CTL_ELEM_ACCESS_READ),
424 	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
425 	.name =         "Word Clock Status",
426 	.info =		snd_ice1712_delta1010lt_wordclock_status_info,
427 	.get =		snd_ice1712_delta1010lt_wordclock_status_get,
428 };
429 
430 /*
431  * initialize the chips on M-Audio cards
432  */
433 
434 static const struct snd_akm4xxx akm_audiophile = {
435 	.type = SND_AK4528,
436 	.num_adcs = 2,
437 	.num_dacs = 2,
438 	.ops = {
439 		.set_rate_val = delta_ak4524_set_rate_val
440 	}
441 };
442 
443 static const struct snd_ak4xxx_private akm_audiophile_priv = {
444 	.caddr = 2,
445 	.cif = 0,
446 	.data_mask = ICE1712_DELTA_AP_DOUT,
447 	.clk_mask = ICE1712_DELTA_AP_CCLK,
448 	.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
449 	.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
450 	.cs_none = 0,
451 	.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
452 	.mask_flags = 0,
453 };
454 
455 static const struct snd_akm4xxx akm_delta410 = {
456 	.type = SND_AK4529,
457 	.num_adcs = 2,
458 	.num_dacs = 8,
459 	.ops = {
460 		.set_rate_val = delta_ak4524_set_rate_val
461 	}
462 };
463 
464 static const struct snd_ak4xxx_private akm_delta410_priv = {
465 	.caddr = 0,
466 	.cif = 0,
467 	.data_mask = ICE1712_DELTA_AP_DOUT,
468 	.clk_mask = ICE1712_DELTA_AP_CCLK,
469 	.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
470 	.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
471 	.cs_none = 0,
472 	.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
473 	.mask_flags = 0,
474 };
475 
476 static const struct snd_akm4xxx akm_delta1010lt = {
477 	.type = SND_AK4524,
478 	.num_adcs = 8,
479 	.num_dacs = 8,
480 	.ops = {
481 		.lock = delta1010lt_ak4524_lock,
482 		.set_rate_val = delta_ak4524_set_rate_val
483 	}
484 };
485 
486 static const struct snd_ak4xxx_private akm_delta1010lt_priv = {
487 	.caddr = 2,
488 	.cif = 0, /* the default level of the CIF pin from AK4524 */
489 	.data_mask = ICE1712_DELTA_1010LT_DOUT,
490 	.clk_mask = ICE1712_DELTA_1010LT_CCLK,
491 	.cs_mask = 0,
492 	.cs_addr = 0, /* set later */
493 	.cs_none = ICE1712_DELTA_1010LT_CS_NONE,
494 	.add_flags = 0,
495 	.mask_flags = 0,
496 };
497 
498 static const struct snd_akm4xxx akm_delta66e = {
499 	.type = SND_AK4524,
500 	.num_adcs = 4,
501 	.num_dacs = 4,
502 	.ops = {
503 		.lock = delta66e_ak4524_lock,
504 		.set_rate_val = delta_ak4524_set_rate_val
505 	}
506 };
507 
508 static const struct snd_ak4xxx_private akm_delta66e_priv = {
509 	.caddr = 2,
510 	.cif = 0, /* the default level of the CIF pin from AK4524 */
511 	.data_mask = ICE1712_DELTA_66E_DOUT,
512 	.clk_mask = ICE1712_DELTA_66E_CCLK,
513 	.cs_mask = 0,
514 	.cs_addr = 0, /* set later */
515 	.cs_none = 0,
516 	.add_flags = 0,
517 	.mask_flags = 0,
518 };
519 
520 
521 static const struct snd_akm4xxx akm_delta44 = {
522 	.type = SND_AK4524,
523 	.num_adcs = 4,
524 	.num_dacs = 4,
525 	.ops = {
526 		.lock = delta_ak4524_lock,
527 		.set_rate_val = delta_ak4524_set_rate_val
528 	}
529 };
530 
531 static const struct snd_ak4xxx_private akm_delta44_priv = {
532 	.caddr = 2,
533 	.cif = 0, /* the default level of the CIF pin from AK4524 */
534 	.data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
535 	.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
536 	.cs_mask = 0,
537 	.cs_addr = 0, /* set later */
538 	.cs_none = 0,
539 	.add_flags = 0,
540 	.mask_flags = 0,
541 };
542 
543 static const struct snd_akm4xxx akm_vx442 = {
544 	.type = SND_AK4524,
545 	.num_adcs = 4,
546 	.num_dacs = 4,
547 	.ops = {
548 		.lock = vx442_ak4524_lock,
549 		.set_rate_val = vx442_ak4524_set_rate_val
550 	}
551 };
552 
553 static const struct snd_ak4xxx_private akm_vx442_priv = {
554 	.caddr = 2,
555 	.cif = 0,
556 	.data_mask = ICE1712_VX442_DOUT,
557 	.clk_mask = ICE1712_VX442_CCLK,
558 	.cs_mask = 0,
559 	.cs_addr = 0, /* set later */
560 	.cs_none = 0,
561 	.add_flags = 0,
562 	.mask_flags = 0,
563 };
564 
565 #ifdef CONFIG_PM_SLEEP
snd_ice1712_delta_resume(struct snd_ice1712 * ice)566 static int snd_ice1712_delta_resume(struct snd_ice1712 *ice)
567 {
568 	unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE];
569 	unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE];
570 
571 	/* init spdif */
572 	switch (ice->eeprom.subvendor) {
573 	case ICE1712_SUBDEVICE_AUDIOPHILE:
574 	case ICE1712_SUBDEVICE_DELTA410:
575 	case ICE1712_SUBDEVICE_DELTA1010E:
576 	case ICE1712_SUBDEVICE_DELTA1010LT:
577 	case ICE1712_SUBDEVICE_VX442:
578 	case ICE1712_SUBDEVICE_DELTA66E:
579 		snd_cs8427_init(ice->i2c, ice->cs8427);
580 		break;
581 	case ICE1712_SUBDEVICE_DELTA1010:
582 	case ICE1712_SUBDEVICE_MEDIASTATION:
583 		/* nothing */
584 		break;
585 	case ICE1712_SUBDEVICE_DELTADIO2496:
586 	case ICE1712_SUBDEVICE_DELTA66:
587 		/* Set spdif defaults */
588 		snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
589 		break;
590 	}
591 
592 	/* init codec and restore registers */
593 	if (ice->akm_codecs) {
594 		memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak));
595 		memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak));
596 		snd_akm4xxx_init(ice->akm);
597 		memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak));
598 		memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak));
599 		snd_akm4xxx_reset(ice->akm, 0);
600 	}
601 
602 	return 0;
603 }
604 
snd_ice1712_delta_suspend(struct snd_ice1712 * ice)605 static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice)
606 {
607 	if (ice->akm_codecs) /* reset & mute codec */
608 		snd_akm4xxx_reset(ice->akm, 1);
609 
610 	return 0;
611 }
612 #endif
613 
snd_ice1712_delta_init(struct snd_ice1712 * ice)614 static int snd_ice1712_delta_init(struct snd_ice1712 *ice)
615 {
616 	int err;
617 	struct snd_akm4xxx *ak;
618 	unsigned char tmp;
619 
620 	if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
621 	    ice->eeprom.gpiodir == 0x7b)
622 		ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
623 
624 	if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
625 	    ice->eeprom.gpiodir == 0xfb)
626 	    	ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
627 
628 	/* determine I2C, DACs and ADCs */
629 	switch (ice->eeprom.subvendor) {
630 	case ICE1712_SUBDEVICE_AUDIOPHILE:
631 		ice->num_total_dacs = 2;
632 		ice->num_total_adcs = 2;
633 		break;
634 	case ICE1712_SUBDEVICE_DELTA410:
635 		ice->num_total_dacs = 8;
636 		ice->num_total_adcs = 2;
637 		break;
638 	case ICE1712_SUBDEVICE_DELTA44:
639 	case ICE1712_SUBDEVICE_DELTA66:
640 		ice->num_total_dacs = ice->omni ? 8 : 4;
641 		ice->num_total_adcs = ice->omni ? 8 : 4;
642 		break;
643 	case ICE1712_SUBDEVICE_DELTA1010:
644 	case ICE1712_SUBDEVICE_DELTA1010E:
645 	case ICE1712_SUBDEVICE_DELTA1010LT:
646 	case ICE1712_SUBDEVICE_MEDIASTATION:
647 	case ICE1712_SUBDEVICE_EDIROLDA2496:
648 		ice->num_total_dacs = 8;
649 		ice->num_total_adcs = 8;
650 		break;
651 	case ICE1712_SUBDEVICE_DELTADIO2496:
652 		ice->num_total_dacs = 4;	/* two AK4324 codecs */
653 		break;
654 	case ICE1712_SUBDEVICE_VX442:
655 	case ICE1712_SUBDEVICE_DELTA66E:	/* omni not supported yet */
656 		ice->num_total_dacs = 4;
657 		ice->num_total_adcs = 4;
658 		break;
659 	}
660 #ifdef CONFIG_PM_SLEEP
661 	ice->pm_resume = snd_ice1712_delta_resume;
662 	ice->pm_suspend = snd_ice1712_delta_suspend;
663 	ice->pm_suspend_enabled = 1;
664 #endif
665 	/* initialize the SPI clock to high */
666 	tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
667 	tmp |= ICE1712_DELTA_AP_CCLK;
668 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
669 	udelay(5);
670 
671 	/* initialize spdif */
672 	switch (ice->eeprom.subvendor) {
673 	case ICE1712_SUBDEVICE_AUDIOPHILE:
674 	case ICE1712_SUBDEVICE_DELTA410:
675 	case ICE1712_SUBDEVICE_DELTA1010E:
676 	case ICE1712_SUBDEVICE_DELTA1010LT:
677 	case ICE1712_SUBDEVICE_VX442:
678 	case ICE1712_SUBDEVICE_DELTA66E:
679 		err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
680 		if (err < 0) {
681 			dev_err(ice->card->dev, "unable to create I2C bus\n");
682 			return err;
683 		}
684 		ice->i2c->private_data = ice;
685 		ice->i2c->ops = &ap_cs8427_i2c_ops;
686 		err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
687 		if (err < 0)
688 			return err;
689 		break;
690 	case ICE1712_SUBDEVICE_DELTA1010:
691 	case ICE1712_SUBDEVICE_MEDIASTATION:
692 		ice->gpio.set_pro_rate = delta_1010_set_rate_val;
693 		break;
694 	case ICE1712_SUBDEVICE_DELTADIO2496:
695 		ice->gpio.set_pro_rate = delta_1010_set_rate_val;
696 		fallthrough;
697 	case ICE1712_SUBDEVICE_DELTA66:
698 		ice->spdif.ops.open = delta_open_spdif;
699 		ice->spdif.ops.setup_rate = delta_setup_spdif;
700 		ice->spdif.ops.default_get = delta_spdif_default_get;
701 		ice->spdif.ops.default_put = delta_spdif_default_put;
702 		ice->spdif.ops.stream_get = delta_spdif_stream_get;
703 		ice->spdif.ops.stream_put = delta_spdif_stream_put;
704 		/* Set spdif defaults */
705 		snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
706 		break;
707 	}
708 
709 	/* no analog? */
710 	switch (ice->eeprom.subvendor) {
711 	case ICE1712_SUBDEVICE_DELTA1010:
712 	case ICE1712_SUBDEVICE_DELTA1010E:
713 	case ICE1712_SUBDEVICE_DELTADIO2496:
714 	case ICE1712_SUBDEVICE_MEDIASTATION:
715 		return 0;
716 	}
717 
718 	/* second stage of initialization, analog parts and others */
719 	ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
720 	if (! ak)
721 		return -ENOMEM;
722 	ice->akm_codecs = 1;
723 
724 	switch (ice->eeprom.subvendor) {
725 	case ICE1712_SUBDEVICE_AUDIOPHILE:
726 		err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
727 		break;
728 	case ICE1712_SUBDEVICE_DELTA410:
729 		err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
730 		break;
731 	case ICE1712_SUBDEVICE_DELTA1010LT:
732 	case ICE1712_SUBDEVICE_EDIROLDA2496:
733 		err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
734 		break;
735 	case ICE1712_SUBDEVICE_DELTA66:
736 	case ICE1712_SUBDEVICE_DELTA44:
737 		err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
738 		break;
739 	case ICE1712_SUBDEVICE_VX442:
740 		err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
741 		break;
742 	case ICE1712_SUBDEVICE_DELTA66E:
743 		err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
744 		break;
745 	default:
746 		snd_BUG();
747 		return -EINVAL;
748 	}
749 
750 	return err;
751 }
752 
753 
754 /*
755  * additional controls for M-Audio cards
756  */
757 
758 static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select =
759 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
760 static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select =
761 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
762 static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status =
763 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
764 static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select =
765 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
766 static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status =
767 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
768 
769 
snd_ice1712_delta_add_controls(struct snd_ice1712 * ice)770 static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
771 {
772 	int err;
773 
774 	/* 1010 and dio specific controls */
775 	switch (ice->eeprom.subvendor) {
776 	case ICE1712_SUBDEVICE_DELTA1010:
777 	case ICE1712_SUBDEVICE_MEDIASTATION:
778 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
779 		if (err < 0)
780 			return err;
781 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
782 		if (err < 0)
783 			return err;
784 		break;
785 	case ICE1712_SUBDEVICE_DELTADIO2496:
786 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
787 		if (err < 0)
788 			return err;
789 		break;
790 	case ICE1712_SUBDEVICE_DELTA1010E:
791 	case ICE1712_SUBDEVICE_DELTA1010LT:
792 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
793 		if (err < 0)
794 			return err;
795 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
796 		if (err < 0)
797 			return err;
798 		break;
799 	}
800 
801 	/* normal spdif controls */
802 	switch (ice->eeprom.subvendor) {
803 	case ICE1712_SUBDEVICE_DELTA1010:
804 	case ICE1712_SUBDEVICE_DELTADIO2496:
805 	case ICE1712_SUBDEVICE_DELTA66:
806 	case ICE1712_SUBDEVICE_MEDIASTATION:
807 		err = snd_ice1712_spdif_build_controls(ice);
808 		if (err < 0)
809 			return err;
810 		break;
811 	}
812 
813 	/* spdif status in */
814 	switch (ice->eeprom.subvendor) {
815 	case ICE1712_SUBDEVICE_DELTA1010:
816 	case ICE1712_SUBDEVICE_DELTADIO2496:
817 	case ICE1712_SUBDEVICE_DELTA66:
818 	case ICE1712_SUBDEVICE_MEDIASTATION:
819 		err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
820 		if (err < 0)
821 			return err;
822 		break;
823 	}
824 
825 	/* ak4524 controls */
826 	switch (ice->eeprom.subvendor) {
827 	case ICE1712_SUBDEVICE_DELTA1010LT:
828 	case ICE1712_SUBDEVICE_AUDIOPHILE:
829 	case ICE1712_SUBDEVICE_DELTA410:
830 	case ICE1712_SUBDEVICE_DELTA44:
831 	case ICE1712_SUBDEVICE_DELTA66:
832 	case ICE1712_SUBDEVICE_VX442:
833 	case ICE1712_SUBDEVICE_DELTA66E:
834 	case ICE1712_SUBDEVICE_EDIROLDA2496:
835 		err = snd_ice1712_akm4xxx_build_controls(ice);
836 		if (err < 0)
837 			return err;
838 		break;
839 	}
840 
841 	return 0;
842 }
843 
844 
845 /* entry point */
846 struct snd_ice1712_card_info snd_ice1712_delta_cards[] = {
847 	{
848 		.subvendor = ICE1712_SUBDEVICE_DELTA1010,
849 		.name = "M Audio Delta 1010",
850 		.model = "delta1010",
851 		.chip_init = snd_ice1712_delta_init,
852 		.build_controls = snd_ice1712_delta_add_controls,
853 	},
854 	{
855 		.subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
856 		.name = "M Audio Delta DiO 2496",
857 		.model = "dio2496",
858 		.chip_init = snd_ice1712_delta_init,
859 		.build_controls = snd_ice1712_delta_add_controls,
860 		.no_mpu401 = 1,
861 	},
862 	{
863 		.subvendor = ICE1712_SUBDEVICE_DELTA66,
864 		.name = "M Audio Delta 66",
865 		.model = "delta66",
866 		.chip_init = snd_ice1712_delta_init,
867 		.build_controls = snd_ice1712_delta_add_controls,
868 		.no_mpu401 = 1,
869 	},
870 	{
871 		.subvendor = ICE1712_SUBDEVICE_DELTA44,
872 		.name = "M Audio Delta 44",
873 		.model = "delta44",
874 		.chip_init = snd_ice1712_delta_init,
875 		.build_controls = snd_ice1712_delta_add_controls,
876 		.no_mpu401 = 1,
877 	},
878 	{
879 		.subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
880 		.name = "M Audio Audiophile 24/96",
881 		.model = "audiophile",
882 		.chip_init = snd_ice1712_delta_init,
883 		.build_controls = snd_ice1712_delta_add_controls,
884 	},
885 	{
886 		.subvendor = ICE1712_SUBDEVICE_DELTA410,
887 		.name = "M Audio Delta 410",
888 		.model = "delta410",
889 		.chip_init = snd_ice1712_delta_init,
890 		.build_controls = snd_ice1712_delta_add_controls,
891 	},
892 	{
893 		.subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
894 		.name = "M Audio Delta 1010LT",
895 		.model = "delta1010lt",
896 		.chip_init = snd_ice1712_delta_init,
897 		.build_controls = snd_ice1712_delta_add_controls,
898 	},
899 	{
900 		.subvendor = ICE1712_SUBDEVICE_VX442,
901 		.name = "Digigram VX442",
902 		.model = "vx442",
903 		.chip_init = snd_ice1712_delta_init,
904 		.build_controls = snd_ice1712_delta_add_controls,
905 		.no_mpu401 = 1,
906 	},
907 	{
908 		.subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
909 		.name = "Lionstracs Mediastation",
910 		.model = "mediastation",
911 		.chip_init = snd_ice1712_delta_init,
912 		.build_controls = snd_ice1712_delta_add_controls,
913 	},
914 	{
915 		.subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
916 		.name = "Edirol DA2496",
917 		.model = "da2496",
918 		.chip_init = snd_ice1712_delta_init,
919 		.build_controls = snd_ice1712_delta_add_controls,
920 	},
921 	{ } /* terminator */
922 };
923