1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2015 Google, Inc
4 * Copyright (c) 2011 The Chromium OS Authors.
5 * Copyright (C) 2009 NVIDIA, Corporation
6 * Copyright (C) 2007-2008 SMSC (Steve Glendinning)
7 */
8
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <malloc.h>
13 #include <memalign.h>
14 #include <usb.h>
15 #include <asm/unaligned.h>
16 #include <linux/mii.h>
17 #include "usb_ether.h"
18
19 /* SMSC LAN95xx based USB 2.0 Ethernet Devices */
20
21 /* LED defines */
22 #define LED_GPIO_CFG (0x24)
23 #define LED_GPIO_CFG_SPD_LED (0x01000000)
24 #define LED_GPIO_CFG_LNK_LED (0x00100000)
25 #define LED_GPIO_CFG_FDX_LED (0x00010000)
26
27 /* Tx command words */
28 #define TX_CMD_A_FIRST_SEG_ 0x00002000
29 #define TX_CMD_A_LAST_SEG_ 0x00001000
30
31 /* Rx status word */
32 #define RX_STS_FL_ 0x3FFF0000 /* Frame Length */
33 #define RX_STS_ES_ 0x00008000 /* Error Summary */
34
35 /* SCSRs */
36 #define ID_REV 0x00
37
38 #define INT_STS 0x08
39
40 #define TX_CFG 0x10
41 #define TX_CFG_ON_ 0x00000004
42
43 #define HW_CFG 0x14
44 #define HW_CFG_BIR_ 0x00001000
45 #define HW_CFG_RXDOFF_ 0x00000600
46 #define HW_CFG_MEF_ 0x00000020
47 #define HW_CFG_BCE_ 0x00000002
48 #define HW_CFG_LRST_ 0x00000008
49
50 #define PM_CTRL 0x20
51 #define PM_CTL_PHY_RST_ 0x00000010
52
53 #define AFC_CFG 0x2C
54
55 /*
56 * Hi watermark = 15.5Kb (~10 mtu pkts)
57 * low watermark = 3k (~2 mtu pkts)
58 * backpressure duration = ~ 350us
59 * Apply FC on any frame.
60 */
61 #define AFC_CFG_DEFAULT 0x00F830A1
62
63 #define E2P_CMD 0x30
64 #define E2P_CMD_BUSY_ 0x80000000
65 #define E2P_CMD_READ_ 0x00000000
66 #define E2P_CMD_TIMEOUT_ 0x00000400
67 #define E2P_CMD_LOADED_ 0x00000200
68 #define E2P_CMD_ADDR_ 0x000001FF
69
70 #define E2P_DATA 0x34
71
72 #define BURST_CAP 0x38
73
74 #define INT_EP_CTL 0x68
75 #define INT_EP_CTL_PHY_INT_ 0x00008000
76
77 #define BULK_IN_DLY 0x6C
78
79 /* MAC CSRs */
80 #define MAC_CR 0x100
81 #define MAC_CR_MCPAS_ 0x00080000
82 #define MAC_CR_PRMS_ 0x00040000
83 #define MAC_CR_HPFILT_ 0x00002000
84 #define MAC_CR_TXEN_ 0x00000008
85 #define MAC_CR_RXEN_ 0x00000004
86
87 #define ADDRH 0x104
88
89 #define ADDRL 0x108
90
91 #define MII_ADDR 0x114
92 #define MII_WRITE_ 0x02
93 #define MII_BUSY_ 0x01
94 #define MII_READ_ 0x00 /* ~of MII Write bit */
95
96 #define MII_DATA 0x118
97
98 #define FLOW 0x11C
99
100 #define VLAN1 0x120
101
102 #define COE_CR 0x130
103 #define Tx_COE_EN_ 0x00010000
104 #define Rx_COE_EN_ 0x00000001
105
106 /* Vendor-specific PHY Definitions */
107 #define PHY_INT_SRC 29
108
109 #define PHY_INT_MASK 30
110 #define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040)
111 #define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010)
112 #define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \
113 PHY_INT_MASK_LINK_DOWN_)
114
115 /* USB Vendor Requests */
116 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
117 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
118
119 /* Some extra defines */
120 #define HS_USB_PKT_SIZE 512
121 #define FS_USB_PKT_SIZE 64
122 /* 5/33 is lower limit for BURST_CAP to work */
123 #define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE)
124 #define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE)
125 #define DEFAULT_BULK_IN_DELAY 0x00002000
126 #define MAX_SINGLE_PACKET_SIZE 2048
127 #define EEPROM_MAC_OFFSET 0x01
128 #define SMSC95XX_INTERNAL_PHY_ID 1
129 #define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
130
131 /* local defines */
132 #define SMSC95XX_BASE_NAME "sms"
133 #define USB_CTRL_SET_TIMEOUT 5000
134 #define USB_CTRL_GET_TIMEOUT 5000
135 #define USB_BULK_SEND_TIMEOUT 5000
136 #define USB_BULK_RECV_TIMEOUT 5000
137
138 #define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE
139 #define PHY_CONNECT_TIMEOUT 5000
140
141 #define TURBO_MODE
142
143 #ifndef CONFIG_DM_ETH
144 /* local vars */
145 static int curr_eth_dev; /* index for name of next device detected */
146 #endif
147
148 /* driver private */
149 struct smsc95xx_private {
150 #ifdef CONFIG_DM_ETH
151 struct ueth_data ueth;
152 #endif
153 size_t rx_urb_size; /* maximum USB URB size */
154 u32 mac_cr; /* MAC control register value */
155 int have_hwaddr; /* 1 if we have a hardware MAC address */
156 };
157
158 /*
159 * Smsc95xx infrastructure commands
160 */
smsc95xx_write_reg(struct usb_device * udev,u32 index,u32 data)161 static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
162 {
163 int len;
164 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
165
166 cpu_to_le32s(&data);
167 tmpbuf[0] = data;
168
169 len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
170 USB_VENDOR_REQUEST_WRITE_REGISTER,
171 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
172 0, index, tmpbuf, sizeof(data),
173 USB_CTRL_SET_TIMEOUT);
174 if (len != sizeof(data)) {
175 debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
176 index, data, len);
177 return -EIO;
178 }
179 return 0;
180 }
181
smsc95xx_read_reg(struct usb_device * udev,u32 index,u32 * data)182 static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
183 {
184 int len;
185 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
186
187 len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
188 USB_VENDOR_REQUEST_READ_REGISTER,
189 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
190 0, index, tmpbuf, sizeof(*data),
191 USB_CTRL_GET_TIMEOUT);
192 *data = tmpbuf[0];
193 if (len != sizeof(*data)) {
194 debug("smsc95xx_read_reg failed: index=%d, len=%d",
195 index, len);
196 return -EIO;
197 }
198
199 le32_to_cpus(data);
200 return 0;
201 }
202
203 /* Loop until the read is completed with timeout */
smsc95xx_phy_wait_not_busy(struct usb_device * udev)204 static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
205 {
206 unsigned long start_time = get_timer(0);
207 u32 val;
208
209 do {
210 smsc95xx_read_reg(udev, MII_ADDR, &val);
211 if (!(val & MII_BUSY_))
212 return 0;
213 } while (get_timer(start_time) < 1000);
214
215 return -ETIMEDOUT;
216 }
217
smsc95xx_mdio_read(struct usb_device * udev,int phy_id,int idx)218 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
219 {
220 u32 val, addr;
221
222 /* confirm MII not busy */
223 if (smsc95xx_phy_wait_not_busy(udev)) {
224 debug("MII is busy in smsc95xx_mdio_read\n");
225 return -ETIMEDOUT;
226 }
227
228 /* set the address, index & direction (read from PHY) */
229 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
230 smsc95xx_write_reg(udev, MII_ADDR, addr);
231
232 if (smsc95xx_phy_wait_not_busy(udev)) {
233 debug("Timed out reading MII reg %02X\n", idx);
234 return -ETIMEDOUT;
235 }
236
237 smsc95xx_read_reg(udev, MII_DATA, &val);
238
239 return (u16)(val & 0xFFFF);
240 }
241
smsc95xx_mdio_write(struct usb_device * udev,int phy_id,int idx,int regval)242 static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
243 int regval)
244 {
245 u32 val, addr;
246
247 /* confirm MII not busy */
248 if (smsc95xx_phy_wait_not_busy(udev)) {
249 debug("MII is busy in smsc95xx_mdio_write\n");
250 return;
251 }
252
253 val = regval;
254 smsc95xx_write_reg(udev, MII_DATA, val);
255
256 /* set the address, index & direction (write to PHY) */
257 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
258 smsc95xx_write_reg(udev, MII_ADDR, addr);
259
260 if (smsc95xx_phy_wait_not_busy(udev))
261 debug("Timed out writing MII reg %02X\n", idx);
262 }
263
smsc95xx_eeprom_confirm_not_busy(struct usb_device * udev)264 static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
265 {
266 unsigned long start_time = get_timer(0);
267 u32 val;
268
269 do {
270 smsc95xx_read_reg(udev, E2P_CMD, &val);
271 if (!(val & E2P_CMD_BUSY_))
272 return 0;
273 udelay(40);
274 } while (get_timer(start_time) < 1 * 1000 * 1000);
275
276 debug("EEPROM is busy\n");
277 return -ETIMEDOUT;
278 }
279
smsc95xx_wait_eeprom(struct usb_device * udev)280 static int smsc95xx_wait_eeprom(struct usb_device *udev)
281 {
282 unsigned long start_time = get_timer(0);
283 u32 val;
284
285 do {
286 smsc95xx_read_reg(udev, E2P_CMD, &val);
287 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
288 break;
289 udelay(40);
290 } while (get_timer(start_time) < 1 * 1000 * 1000);
291
292 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
293 debug("EEPROM read operation timeout\n");
294 return -ETIMEDOUT;
295 }
296 return 0;
297 }
298
smsc95xx_read_eeprom(struct usb_device * udev,u32 offset,u32 length,u8 * data)299 static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
300 u8 *data)
301 {
302 u32 val;
303 int i, ret;
304
305 ret = smsc95xx_eeprom_confirm_not_busy(udev);
306 if (ret)
307 return ret;
308
309 for (i = 0; i < length; i++) {
310 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
311 smsc95xx_write_reg(udev, E2P_CMD, val);
312
313 ret = smsc95xx_wait_eeprom(udev);
314 if (ret < 0)
315 return ret;
316
317 smsc95xx_read_reg(udev, E2P_DATA, &val);
318 data[i] = val & 0xFF;
319 offset++;
320 }
321 return 0;
322 }
323
324 /*
325 * mii_nway_restart - restart NWay (autonegotiation) for this interface
326 *
327 * Returns 0 on success, negative on error.
328 */
mii_nway_restart(struct usb_device * udev,struct ueth_data * dev)329 static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
330 {
331 int bmcr;
332 int r = -1;
333
334 /* if autoneg is off, it's an error */
335 bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
336
337 if (bmcr & BMCR_ANENABLE) {
338 bmcr |= BMCR_ANRESTART;
339 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
340 r = 0;
341 }
342 return r;
343 }
344
smsc95xx_phy_initialize(struct usb_device * udev,struct ueth_data * dev)345 static int smsc95xx_phy_initialize(struct usb_device *udev,
346 struct ueth_data *dev)
347 {
348 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
349 smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
350 ADVERTISE_ALL | ADVERTISE_CSMA |
351 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
352
353 /* read to clear */
354 smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
355
356 smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
357 PHY_INT_MASK_DEFAULT_);
358 mii_nway_restart(udev, dev);
359
360 debug("phy initialised succesfully\n");
361 return 0;
362 }
363
smsc95xx_init_mac_address(unsigned char * enetaddr,struct usb_device * udev)364 static int smsc95xx_init_mac_address(unsigned char *enetaddr,
365 struct usb_device *udev)
366 {
367 int ret;
368
369 /* try reading mac address from EEPROM */
370 ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
371 if (ret)
372 return ret;
373
374 if (is_valid_ethaddr(enetaddr)) {
375 /* eeprom values are valid so use them */
376 debug("MAC address read from EEPROM\n");
377 return 0;
378 }
379
380 /*
381 * No eeprom, or eeprom values are invalid. Generating a random MAC
382 * address is not safe. Just return an error.
383 */
384 debug("Invalid MAC address read from EEPROM\n");
385
386 return -ENXIO;
387 }
388
smsc95xx_write_hwaddr_common(struct usb_device * udev,struct smsc95xx_private * priv,unsigned char * enetaddr)389 static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
390 struct smsc95xx_private *priv,
391 unsigned char *enetaddr)
392 {
393 u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
394 u32 addr_hi = get_unaligned_le16(&enetaddr[4]);
395 int ret;
396
397 /* set hardware address */
398 debug("** %s()\n", __func__);
399 ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
400 if (ret < 0)
401 return ret;
402
403 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
404 if (ret < 0)
405 return ret;
406
407 debug("MAC %pM\n", enetaddr);
408 priv->have_hwaddr = 1;
409
410 return 0;
411 }
412
413 /* Enable or disable Tx & Rx checksum offload engines */
smsc95xx_set_csums(struct usb_device * udev,int use_tx_csum,int use_rx_csum)414 static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
415 int use_rx_csum)
416 {
417 u32 read_buf;
418 int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
419 if (ret < 0)
420 return ret;
421
422 if (use_tx_csum)
423 read_buf |= Tx_COE_EN_;
424 else
425 read_buf &= ~Tx_COE_EN_;
426
427 if (use_rx_csum)
428 read_buf |= Rx_COE_EN_;
429 else
430 read_buf &= ~Rx_COE_EN_;
431
432 ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
433 if (ret < 0)
434 return ret;
435
436 debug("COE_CR = 0x%08x\n", read_buf);
437 return 0;
438 }
439
smsc95xx_set_multicast(struct smsc95xx_private * priv)440 static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
441 {
442 /* No multicast in u-boot */
443 priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
444 }
445
446 /* starts the TX path */
smsc95xx_start_tx_path(struct usb_device * udev,struct smsc95xx_private * priv)447 static void smsc95xx_start_tx_path(struct usb_device *udev,
448 struct smsc95xx_private *priv)
449 {
450 u32 reg_val;
451
452 /* Enable Tx at MAC */
453 priv->mac_cr |= MAC_CR_TXEN_;
454
455 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
456
457 /* Enable Tx at SCSRs */
458 reg_val = TX_CFG_ON_;
459 smsc95xx_write_reg(udev, TX_CFG, reg_val);
460 }
461
462 /* Starts the Receive path */
smsc95xx_start_rx_path(struct usb_device * udev,struct smsc95xx_private * priv)463 static void smsc95xx_start_rx_path(struct usb_device *udev,
464 struct smsc95xx_private *priv)
465 {
466 priv->mac_cr |= MAC_CR_RXEN_;
467 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
468 }
469
smsc95xx_init_common(struct usb_device * udev,struct ueth_data * dev,struct smsc95xx_private * priv,unsigned char * enetaddr)470 static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
471 struct smsc95xx_private *priv,
472 unsigned char *enetaddr)
473 {
474 int ret;
475 u32 write_buf;
476 u32 read_buf;
477 u32 burst_cap;
478 int timeout;
479 #define TIMEOUT_RESOLUTION 50 /* ms */
480 int link_detected;
481
482 debug("** %s()\n", __func__);
483 dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */
484
485 write_buf = HW_CFG_LRST_;
486 ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
487 if (ret < 0)
488 return ret;
489
490 timeout = 0;
491 do {
492 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
493 if (ret < 0)
494 return ret;
495 udelay(10 * 1000);
496 timeout++;
497 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
498
499 if (timeout >= 100) {
500 debug("timeout waiting for completion of Lite Reset\n");
501 return -ETIMEDOUT;
502 }
503
504 write_buf = PM_CTL_PHY_RST_;
505 ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
506 if (ret < 0)
507 return ret;
508
509 timeout = 0;
510 do {
511 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
512 if (ret < 0)
513 return ret;
514 udelay(10 * 1000);
515 timeout++;
516 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
517 if (timeout >= 100) {
518 debug("timeout waiting for PHY Reset\n");
519 return -ETIMEDOUT;
520 }
521 #ifndef CONFIG_DM_ETH
522 if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
523 0)
524 priv->have_hwaddr = 1;
525 #endif
526 if (!priv->have_hwaddr) {
527 puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
528 return -EADDRNOTAVAIL;
529 }
530 ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
531 if (ret < 0)
532 return ret;
533
534 #ifdef TURBO_MODE
535 if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
536 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
537 priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
538 } else {
539 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
540 priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
541 }
542 #else
543 burst_cap = 0;
544 priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
545 #endif
546 debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
547
548 ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
549 if (ret < 0)
550 return ret;
551
552 ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
553 if (ret < 0)
554 return ret;
555 debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
556
557 read_buf = DEFAULT_BULK_IN_DELAY;
558 ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
559 if (ret < 0)
560 return ret;
561
562 ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
563 if (ret < 0)
564 return ret;
565 debug("Read Value from BULK_IN_DLY after writing: "
566 "0x%08x\n", read_buf);
567
568 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
569 if (ret < 0)
570 return ret;
571 debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
572
573 #ifdef TURBO_MODE
574 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
575 #endif
576 read_buf &= ~HW_CFG_RXDOFF_;
577
578 #define NET_IP_ALIGN 0
579 read_buf |= NET_IP_ALIGN << 9;
580
581 ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
582 if (ret < 0)
583 return ret;
584
585 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
586 if (ret < 0)
587 return ret;
588 debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
589
590 write_buf = 0xFFFFFFFF;
591 ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
592 if (ret < 0)
593 return ret;
594
595 ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
596 if (ret < 0)
597 return ret;
598 debug("ID_REV = 0x%08x\n", read_buf);
599
600 /* Configure GPIO pins as LED outputs */
601 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
602 LED_GPIO_CFG_FDX_LED;
603 ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
604 if (ret < 0)
605 return ret;
606 debug("LED_GPIO_CFG set\n");
607
608 /* Init Tx */
609 write_buf = 0;
610 ret = smsc95xx_write_reg(udev, FLOW, write_buf);
611 if (ret < 0)
612 return ret;
613
614 read_buf = AFC_CFG_DEFAULT;
615 ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
616 if (ret < 0)
617 return ret;
618
619 ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
620 if (ret < 0)
621 return ret;
622
623 /* Init Rx. Set Vlan */
624 write_buf = (u32)ETH_P_8021Q;
625 ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
626 if (ret < 0)
627 return ret;
628
629 /* Disable checksum offload engines */
630 ret = smsc95xx_set_csums(udev, 0, 0);
631 if (ret < 0) {
632 debug("Failed to set csum offload: %d\n", ret);
633 return ret;
634 }
635 smsc95xx_set_multicast(priv);
636
637 ret = smsc95xx_phy_initialize(udev, dev);
638 if (ret < 0)
639 return ret;
640 ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
641 if (ret < 0)
642 return ret;
643
644 /* enable PHY interrupts */
645 read_buf |= INT_EP_CTL_PHY_INT_;
646
647 ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
648 if (ret < 0)
649 return ret;
650
651 smsc95xx_start_tx_path(udev, priv);
652 smsc95xx_start_rx_path(udev, priv);
653
654 timeout = 0;
655 do {
656 link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
657 & BMSR_LSTATUS;
658 if (!link_detected) {
659 if (timeout == 0)
660 printf("Waiting for Ethernet connection... ");
661 udelay(TIMEOUT_RESOLUTION * 1000);
662 timeout += TIMEOUT_RESOLUTION;
663 }
664 } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
665 if (link_detected) {
666 if (timeout != 0)
667 printf("done.\n");
668 } else {
669 printf("unable to connect.\n");
670 return -EIO;
671 }
672 return 0;
673 }
674
smsc95xx_send_common(struct ueth_data * dev,void * packet,int length)675 static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
676 {
677 int err;
678 int actual_len;
679 u32 tx_cmd_a;
680 u32 tx_cmd_b;
681 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
682 PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
683
684 debug("** %s(), len %d, buf %#x\n", __func__, length,
685 (unsigned int)(ulong)msg);
686 if (length > PKTSIZE)
687 return -ENOSPC;
688
689 tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
690 tx_cmd_b = (u32)length;
691 cpu_to_le32s(&tx_cmd_a);
692 cpu_to_le32s(&tx_cmd_b);
693
694 /* prepend cmd_a and cmd_b */
695 memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
696 memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
697 memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
698 length);
699 err = usb_bulk_msg(dev->pusb_dev,
700 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
701 (void *)msg,
702 length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
703 &actual_len,
704 USB_BULK_SEND_TIMEOUT);
705 debug("Tx: len = %u, actual = %u, err = %d\n",
706 (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
707 (unsigned int)actual_len, err);
708
709 return err;
710 }
711
712 #ifndef CONFIG_DM_ETH
713 /*
714 * Smsc95xx callbacks
715 */
smsc95xx_init(struct eth_device * eth,bd_t * bd)716 static int smsc95xx_init(struct eth_device *eth, bd_t *bd)
717 {
718 struct ueth_data *dev = (struct ueth_data *)eth->priv;
719 struct usb_device *udev = dev->pusb_dev;
720 struct smsc95xx_private *priv =
721 (struct smsc95xx_private *)dev->dev_priv;
722
723 return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
724 }
725
smsc95xx_send(struct eth_device * eth,void * packet,int length)726 static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
727 {
728 struct ueth_data *dev = (struct ueth_data *)eth->priv;
729
730 return smsc95xx_send_common(dev, packet, length);
731 }
732
smsc95xx_recv(struct eth_device * eth)733 static int smsc95xx_recv(struct eth_device *eth)
734 {
735 struct ueth_data *dev = (struct ueth_data *)eth->priv;
736 DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
737 unsigned char *buf_ptr;
738 int err;
739 int actual_len;
740 u32 packet_len;
741 int cur_buf_align;
742
743 debug("** %s()\n", __func__);
744 err = usb_bulk_msg(dev->pusb_dev,
745 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
746 (void *)recv_buf, RX_URB_SIZE, &actual_len,
747 USB_BULK_RECV_TIMEOUT);
748 debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
749 actual_len, err);
750 if (err != 0) {
751 debug("Rx: failed to receive\n");
752 return -err;
753 }
754 if (actual_len > RX_URB_SIZE) {
755 debug("Rx: received too many bytes %d\n", actual_len);
756 return -ENOSPC;
757 }
758
759 buf_ptr = recv_buf;
760 while (actual_len > 0) {
761 /*
762 * 1st 4 bytes contain the length of the actual data plus error
763 * info. Extract data length.
764 */
765 if (actual_len < sizeof(packet_len)) {
766 debug("Rx: incomplete packet length\n");
767 return -EIO;
768 }
769 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
770 le32_to_cpus(&packet_len);
771 if (packet_len & RX_STS_ES_) {
772 debug("Rx: Error header=%#x", packet_len);
773 return -EIO;
774 }
775 packet_len = ((packet_len & RX_STS_FL_) >> 16);
776
777 if (packet_len > actual_len - sizeof(packet_len)) {
778 debug("Rx: too large packet: %d\n", packet_len);
779 return -EIO;
780 }
781
782 /* Notify net stack */
783 net_process_received_packet(buf_ptr + sizeof(packet_len),
784 packet_len - 4);
785
786 /* Adjust for next iteration */
787 actual_len -= sizeof(packet_len) + packet_len;
788 buf_ptr += sizeof(packet_len) + packet_len;
789 cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf;
790
791 if (cur_buf_align & 0x03) {
792 int align = 4 - (cur_buf_align & 0x03);
793
794 actual_len -= align;
795 buf_ptr += align;
796 }
797 }
798 return err;
799 }
800
smsc95xx_halt(struct eth_device * eth)801 static void smsc95xx_halt(struct eth_device *eth)
802 {
803 debug("** %s()\n", __func__);
804 }
805
smsc95xx_write_hwaddr(struct eth_device * eth)806 static int smsc95xx_write_hwaddr(struct eth_device *eth)
807 {
808 struct ueth_data *dev = eth->priv;
809 struct usb_device *udev = dev->pusb_dev;
810 struct smsc95xx_private *priv = dev->dev_priv;
811
812 return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
813 }
814
815 /*
816 * SMSC probing functions
817 */
smsc95xx_eth_before_probe(void)818 void smsc95xx_eth_before_probe(void)
819 {
820 curr_eth_dev = 0;
821 }
822
823 struct smsc95xx_dongle {
824 unsigned short vendor;
825 unsigned short product;
826 };
827
828 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
829 { 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */
830 { 0x0424, 0x9500 }, /* LAN9500 Ethernet */
831 { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */
832 { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */
833 { 0x0424, 0x9e00 }, /* LAN9500A Ethernet */
834 { 0x0000, 0x0000 } /* END - Do not remove */
835 };
836
837 /* Probe to see if a new device is actually an SMSC device */
smsc95xx_eth_probe(struct usb_device * dev,unsigned int ifnum,struct ueth_data * ss)838 int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
839 struct ueth_data *ss)
840 {
841 struct usb_interface *iface;
842 struct usb_interface_descriptor *iface_desc;
843 int i;
844
845 /* let's examine the device now */
846 iface = &dev->config.if_desc[ifnum];
847 iface_desc = &dev->config.if_desc[ifnum].desc;
848
849 for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
850 if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
851 dev->descriptor.idProduct == smsc95xx_dongles[i].product)
852 /* Found a supported dongle */
853 break;
854 }
855 if (smsc95xx_dongles[i].vendor == 0)
856 return 0;
857
858 /* At this point, we know we've got a live one */
859 debug("\n\nUSB Ethernet device detected\n");
860 memset(ss, '\0', sizeof(struct ueth_data));
861
862 /* Initialize the ueth_data structure with some useful info */
863 ss->ifnum = ifnum;
864 ss->pusb_dev = dev;
865 ss->subclass = iface_desc->bInterfaceSubClass;
866 ss->protocol = iface_desc->bInterfaceProtocol;
867
868 /*
869 * We are expecting a minimum of 3 endpoints - in, out (bulk), and int.
870 * We will ignore any others.
871 */
872 for (i = 0; i < iface_desc->bNumEndpoints; i++) {
873 /* is it an BULK endpoint? */
874 if ((iface->ep_desc[i].bmAttributes &
875 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
876 if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
877 ss->ep_in =
878 iface->ep_desc[i].bEndpointAddress &
879 USB_ENDPOINT_NUMBER_MASK;
880 else
881 ss->ep_out =
882 iface->ep_desc[i].bEndpointAddress &
883 USB_ENDPOINT_NUMBER_MASK;
884 }
885
886 /* is it an interrupt endpoint? */
887 if ((iface->ep_desc[i].bmAttributes &
888 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
889 ss->ep_int = iface->ep_desc[i].bEndpointAddress &
890 USB_ENDPOINT_NUMBER_MASK;
891 ss->irqinterval = iface->ep_desc[i].bInterval;
892 }
893 }
894 debug("Endpoints In %d Out %d Int %d\n",
895 ss->ep_in, ss->ep_out, ss->ep_int);
896
897 /* Do some basic sanity checks, and bail if we find a problem */
898 if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
899 !ss->ep_in || !ss->ep_out || !ss->ep_int) {
900 debug("Problems with device\n");
901 return 0;
902 }
903 dev->privptr = (void *)ss;
904
905 /* alloc driver private */
906 ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
907 if (!ss->dev_priv)
908 return 0;
909
910 return 1;
911 }
912
smsc95xx_eth_get_info(struct usb_device * dev,struct ueth_data * ss,struct eth_device * eth)913 int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
914 struct eth_device *eth)
915 {
916 debug("** %s()\n", __func__);
917 if (!eth) {
918 debug("%s: missing parameter.\n", __func__);
919 return 0;
920 }
921 sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
922 eth->init = smsc95xx_init;
923 eth->send = smsc95xx_send;
924 eth->recv = smsc95xx_recv;
925 eth->halt = smsc95xx_halt;
926 eth->write_hwaddr = smsc95xx_write_hwaddr;
927 eth->priv = ss;
928 return 1;
929 }
930 #endif /* !CONFIG_DM_ETH */
931
932 #ifdef CONFIG_DM_ETH
smsc95xx_eth_start(struct udevice * dev)933 static int smsc95xx_eth_start(struct udevice *dev)
934 {
935 struct usb_device *udev = dev_get_parent_priv(dev);
936 struct smsc95xx_private *priv = dev_get_priv(dev);
937 struct eth_pdata *pdata = dev_get_platdata(dev);
938
939 /* Driver-model Ethernet ensures we have this */
940 priv->have_hwaddr = 1;
941
942 return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
943 }
944
smsc95xx_eth_stop(struct udevice * dev)945 void smsc95xx_eth_stop(struct udevice *dev)
946 {
947 debug("** %s()\n", __func__);
948 }
949
smsc95xx_eth_send(struct udevice * dev,void * packet,int length)950 int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
951 {
952 struct smsc95xx_private *priv = dev_get_priv(dev);
953
954 return smsc95xx_send_common(&priv->ueth, packet, length);
955 }
956
smsc95xx_eth_recv(struct udevice * dev,int flags,uchar ** packetp)957 int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
958 {
959 struct smsc95xx_private *priv = dev_get_priv(dev);
960 struct ueth_data *ueth = &priv->ueth;
961 uint8_t *ptr;
962 int ret, len;
963 u32 packet_len;
964
965 len = usb_ether_get_rx_bytes(ueth, &ptr);
966 debug("%s: first try, len=%d\n", __func__, len);
967 if (!len) {
968 if (!(flags & ETH_RECV_CHECK_DEVICE))
969 return -EAGAIN;
970 ret = usb_ether_receive(ueth, RX_URB_SIZE);
971 if (ret == -EAGAIN)
972 return ret;
973
974 len = usb_ether_get_rx_bytes(ueth, &ptr);
975 debug("%s: second try, len=%d\n", __func__, len);
976 }
977
978 /*
979 * 1st 4 bytes contain the length of the actual data plus error info.
980 * Extract data length.
981 */
982 if (len < sizeof(packet_len)) {
983 debug("Rx: incomplete packet length\n");
984 goto err;
985 }
986 memcpy(&packet_len, ptr, sizeof(packet_len));
987 le32_to_cpus(&packet_len);
988 if (packet_len & RX_STS_ES_) {
989 debug("Rx: Error header=%#x", packet_len);
990 goto err;
991 }
992 packet_len = ((packet_len & RX_STS_FL_) >> 16);
993
994 if (packet_len > len - sizeof(packet_len)) {
995 debug("Rx: too large packet: %d\n", packet_len);
996 goto err;
997 }
998
999 *packetp = ptr + sizeof(packet_len);
1000 return packet_len - 4;
1001
1002 err:
1003 usb_ether_advance_rxbuf(ueth, -1);
1004 return -EINVAL;
1005 }
1006
smsc95xx_free_pkt(struct udevice * dev,uchar * packet,int packet_len)1007 static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1008 {
1009 struct smsc95xx_private *priv = dev_get_priv(dev);
1010
1011 packet_len = ALIGN(packet_len + sizeof(u32), 4);
1012 usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1013
1014 return 0;
1015 }
1016
smsc95xx_write_hwaddr(struct udevice * dev)1017 int smsc95xx_write_hwaddr(struct udevice *dev)
1018 {
1019 struct usb_device *udev = dev_get_parent_priv(dev);
1020 struct eth_pdata *pdata = dev_get_platdata(dev);
1021 struct smsc95xx_private *priv = dev_get_priv(dev);
1022
1023 return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1024 }
1025
smsc95xx_read_rom_hwaddr(struct udevice * dev)1026 int smsc95xx_read_rom_hwaddr(struct udevice *dev)
1027 {
1028 struct usb_device *udev = dev_get_parent_priv(dev);
1029 struct eth_pdata *pdata = dev_get_platdata(dev);
1030 int ret;
1031
1032 ret = smsc95xx_init_mac_address(pdata->enetaddr, udev);
1033 if (ret)
1034 memset(pdata->enetaddr, 0, 6);
1035
1036 return 0;
1037 }
1038
smsc95xx_eth_probe(struct udevice * dev)1039 static int smsc95xx_eth_probe(struct udevice *dev)
1040 {
1041 struct smsc95xx_private *priv = dev_get_priv(dev);
1042 struct ueth_data *ueth = &priv->ueth;
1043
1044 return usb_ether_register(dev, ueth, RX_URB_SIZE);
1045 }
1046
1047 static const struct eth_ops smsc95xx_eth_ops = {
1048 .start = smsc95xx_eth_start,
1049 .send = smsc95xx_eth_send,
1050 .recv = smsc95xx_eth_recv,
1051 .free_pkt = smsc95xx_free_pkt,
1052 .stop = smsc95xx_eth_stop,
1053 .write_hwaddr = smsc95xx_write_hwaddr,
1054 .read_rom_hwaddr = smsc95xx_read_rom_hwaddr,
1055 };
1056
1057 U_BOOT_DRIVER(smsc95xx_eth) = {
1058 .name = "smsc95xx_eth",
1059 .id = UCLASS_ETH,
1060 .probe = smsc95xx_eth_probe,
1061 .ops = &smsc95xx_eth_ops,
1062 .priv_auto_alloc_size = sizeof(struct smsc95xx_private),
1063 .platdata_auto_alloc_size = sizeof(struct eth_pdata),
1064 };
1065
1066 static const struct usb_device_id smsc95xx_eth_id_table[] = {
1067 { USB_DEVICE(0x05ac, 0x1402) },
1068 { USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */
1069 { USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */
1070 { USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */
1071 { USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */
1072 { USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */
1073 { } /* Terminating entry */
1074 };
1075
1076 U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);
1077 #endif
1078