1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * ARM specific SMP header, this contains our implementation 4 * details. 5 */ 6 #ifndef __ASMARM_SMP_PLAT_H 7 #define __ASMARM_SMP_PLAT_H 8 9 #include <linux/cpumask.h> 10 #include <linux/err.h> 11 12 #include <asm/cpu.h> 13 #include <asm/cputype.h> 14 15 /* 16 * Return true if we are running on a SMP platform 17 */ is_smp(void)18static inline bool is_smp(void) 19 { 20 #ifndef CONFIG_SMP 21 return false; 22 #elif defined(CONFIG_SMP_ON_UP) 23 extern unsigned int smp_on_up; 24 return !!smp_on_up; 25 #else 26 return true; 27 #endif 28 } 29 30 /** 31 * smp_cpuid_part() - return part id for a given cpu 32 * @cpu: logical cpu id. 33 * 34 * Return: part id of logical cpu passed as argument. 35 */ smp_cpuid_part(int cpu)36static inline unsigned int smp_cpuid_part(int cpu) 37 { 38 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu); 39 40 return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK : 41 read_cpuid_part(); 42 } 43 44 /* all SMP configurations have the extended CPUID registers */ 45 #ifndef CONFIG_MMU 46 #define tlb_ops_need_broadcast() 0 47 #else tlb_ops_need_broadcast(void)48static inline int tlb_ops_need_broadcast(void) 49 { 50 if (!is_smp()) 51 return 0; 52 53 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; 54 } 55 #endif 56 57 #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 58 #define cache_ops_need_broadcast() 0 59 #else cache_ops_need_broadcast(void)60static inline int cache_ops_need_broadcast(void) 61 { 62 if (!is_smp()) 63 return 0; 64 65 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; 66 } 67 #endif 68 69 /* 70 * Logical CPU mapping. 71 */ 72 extern u32 __cpu_logical_map[]; 73 #define cpu_logical_map(cpu) __cpu_logical_map[cpu] 74 /* 75 * Retrieve logical cpu index corresponding to a given MPIDR[23:0] 76 * - mpidr: MPIDR[23:0] to be used for the look-up 77 * 78 * Returns the cpu logical index or -EINVAL on look-up error 79 */ get_logical_index(u32 mpidr)80static inline int get_logical_index(u32 mpidr) 81 { 82 int cpu; 83 for (cpu = 0; cpu < nr_cpu_ids; cpu++) 84 if (cpu_logical_map(cpu) == mpidr) 85 return cpu; 86 return -EINVAL; 87 } 88 89 /* 90 * NOTE ! Assembly code relies on the following 91 * structure memory layout in order to carry out load 92 * multiple from its base address. For more 93 * information check arch/arm/kernel/sleep.S 94 */ 95 struct mpidr_hash { 96 u32 mask; /* used by sleep.S */ 97 u32 shift_aff[3]; /* used by sleep.S */ 98 u32 bits; 99 }; 100 101 extern struct mpidr_hash mpidr_hash; 102 mpidr_hash_size(void)103static inline u32 mpidr_hash_size(void) 104 { 105 return 1 << mpidr_hash.bits; 106 } 107 108 extern int platform_can_secondary_boot(void); 109 extern int platform_can_cpu_hotplug(void); 110 111 #ifdef CONFIG_HOTPLUG_CPU 112 extern int platform_can_hotplug_cpu(unsigned int cpu); 113 #else platform_can_hotplug_cpu(unsigned int cpu)114static inline int platform_can_hotplug_cpu(unsigned int cpu) 115 { 116 return 0; 117 } 118 #endif 119 120 #endif 121