xref: /openbmc/linux/arch/sh/boards/mach-se/7722/setup.c (revision aaf9128a)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * linux/arch/sh/boards/se/7722/setup.c
4  *
5  * Copyright (C) 2007 Nobuhiro Iwamatsu
6  * Copyright (C) 2012 Paul Mundt
7  *
8  * Hitachi UL SolutionEngine 7722 Support.
9  */
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/ata_platform.h>
13 #include <linux/input.h>
14 #include <linux/input/sh_keysc.h>
15 #include <linux/irqdomain.h>
16 #include <linux/smc91x.h>
17 #include <linux/sh_intc.h>
18 #include <mach-se/mach/se7722.h>
19 #include <mach-se/mach/mrshpc.h>
20 #include <asm/machvec.h>
21 #include <asm/clock.h>
22 #include <asm/io.h>
23 #include <asm/heartbeat.h>
24 #include <cpu/sh7722.h>
25 
26 /* Heartbeat */
27 static struct resource heartbeat_resource = {
28 	.start  = PA_LED,
29 	.end    = PA_LED,
30 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
31 };
32 
33 static struct platform_device heartbeat_device = {
34 	.name           = "heartbeat",
35 	.id             = -1,
36 	.num_resources  = 1,
37 	.resource       = &heartbeat_resource,
38 };
39 
40 /* SMC91x */
41 static struct smc91x_platdata smc91x_info = {
42 	.flags = SMC91X_USE_16BIT,
43 };
44 
45 static struct resource smc91x_eth_resources[] = {
46 	[0] = {
47 		.name   = "smc91x-regs" ,
48 		.start  = PA_LAN + 0x300,
49 		.end    = PA_LAN + 0x300 + 0x10 ,
50 		.flags  = IORESOURCE_MEM,
51 	},
52 	[1] = {
53 		/* Filled in later */
54 		.flags  = IORESOURCE_IRQ,
55 	},
56 };
57 
58 static struct platform_device smc91x_eth_device = {
59 	.name           = "smc91x",
60 	.id             = 0,
61 	.dev = {
62 		.dma_mask               = NULL,         /* don't use dma */
63 		.coherent_dma_mask      = 0xffffffff,
64 		.platform_data	= &smc91x_info,
65 	},
66 	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
67 	.resource       = smc91x_eth_resources,
68 };
69 
70 static struct resource cf_ide_resources[] = {
71 	[0] = {
72 		.start  = PA_MRSHPC_IO + 0x1f0,
73 		.end    = PA_MRSHPC_IO + 0x1f0 + 8 ,
74 		.flags  = IORESOURCE_IO,
75 	},
76 	[1] = {
77 		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
78 		.end    = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
79 		.flags  = IORESOURCE_IO,
80 	},
81 	[2] = {
82 		/* Filled in later */
83 		.flags  = IORESOURCE_IRQ,
84 	},
85 };
86 
87 static struct platform_device cf_ide_device  = {
88 	.name           = "pata_platform",
89 	.id             = -1,
90 	.num_resources  = ARRAY_SIZE(cf_ide_resources),
91 	.resource       = cf_ide_resources,
92 };
93 
94 static struct sh_keysc_info sh_keysc_info = {
95 	.mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
96 	.scan_timing = 3,
97 	.delay = 5,
98 	.keycodes = { /* SW1 -> SW30 */
99 		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
100 		KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
101 		KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
102 		KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
103 		KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
104 		KEY_Z,
105 		KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
106 	},
107 };
108 
109 static struct resource sh_keysc_resources[] = {
110 	[0] = {
111 		.start  = 0x044b0000,
112 		.end    = 0x044b000f,
113 		.flags  = IORESOURCE_MEM,
114 	},
115 	[1] = {
116 		.start  = evt2irq(0xbe0),
117 		.flags  = IORESOURCE_IRQ,
118 	},
119 };
120 
121 static struct platform_device sh_keysc_device = {
122 	.name           = "sh_keysc",
123 	.id             = 0, /* "keysc0" clock */
124 	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
125 	.resource       = sh_keysc_resources,
126 	.dev	= {
127 		.platform_data	= &sh_keysc_info,
128 	},
129 };
130 
131 static struct platform_device *se7722_devices[] __initdata = {
132 	&heartbeat_device,
133 	&smc91x_eth_device,
134 	&cf_ide_device,
135 	&sh_keysc_device,
136 };
137 
se7722_devices_setup(void)138 static int __init se7722_devices_setup(void)
139 {
140 	mrshpc_setup_windows();
141 
142 	/* Wire-up dynamic vectors */
143 	cf_ide_resources[2].start = cf_ide_resources[2].end =
144 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
145 
146 	smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
147 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
148 
149 	return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
150 }
151 device_initcall(se7722_devices_setup);
152 
se7722_setup(char ** cmdline_p)153 static void __init se7722_setup(char **cmdline_p)
154 {
155 	__raw_writew(0x010D, FPGA_OUT);    /* FPGA */
156 
157 	__raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
158 	__raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
159 
160 	/* LCDC I/O */
161 	__raw_writew(0x0020, PORT_PSELD);
162 
163 	/* SIOF1*/
164 	__raw_writew(0x0003, PORT_PSELB);
165 	__raw_writew(0xe000, PORT_PSELC);
166 	__raw_writew(0x0000, PORT_PKCR);
167 
168 	/* LCDC */
169 	__raw_writew(0x4020, PORT_PHCR);
170 	__raw_writew(0x0000, PORT_PLCR);
171 	__raw_writew(0x0000, PORT_PMCR);
172 	__raw_writew(0x0002, PORT_PRCR);
173 	__raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
174 
175 	/* KEYSC */
176 	__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
177 	__raw_writew(0x0000, PORT_PYCR);
178 	__raw_writew(0x0000, PORT_PZCR);
179 	__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
180 	__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
181 }
182 
183 /*
184  * The Machine Vector
185  */
186 static struct sh_machine_vector mv_se7722 __initmv = {
187 	.mv_name                = "Solution Engine 7722" ,
188 	.mv_setup               = se7722_setup ,
189 	.mv_init_irq		= init_se7722_IRQ,
190 };
191