1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 */
6
7 #include <common.h>
8 #include <command.h>
9 #include <asm/processor.h>
10 #include <asm/io.h>
11
12 #define STBCR4 0xFFFE040C
13 #define cmt_clock_enable() do {\
14 writeb(readb(STBCR4) & ~0x04, STBCR4);\
15 } while (0)
16 #define scif0_enable() do {\
17 writeb(readb(STBCR4) & ~0x80, STBCR4);\
18 } while (0)
19 #define scif3_enable() do {\
20 writeb(readb(STBCR4) & ~0x10, STBCR4);\
21 } while (0)
22
checkcpu(void)23 int checkcpu(void)
24 {
25 puts("CPU: SH2\n");
26 return 0;
27 }
28
cpu_init(void)29 int cpu_init(void)
30 {
31 /* SCIF enable */
32 #if defined(CONFIG_CONS_SCIF3)
33 scif3_enable();
34 #else
35 scif0_enable();
36 #endif
37 /* CMT clock enable */
38 cmt_clock_enable() ;
39 return 0;
40 }
41
cleanup_before_linux(void)42 int cleanup_before_linux(void)
43 {
44 disable_interrupts();
45 return 0;
46 }
47
do_reset(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])48 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
49 {
50 disable_interrupts();
51 reset_cpu(0);
52 return 0;
53 }
54
flush_cache(unsigned long addr,unsigned long size)55 void flush_cache(unsigned long addr, unsigned long size)
56 {
57
58 }
59
icache_enable(void)60 void icache_enable(void)
61 {
62 }
63
icache_disable(void)64 void icache_disable(void)
65 {
66 }
67
icache_status(void)68 int icache_status(void)
69 {
70 return 0;
71 }
72
dcache_enable(void)73 void dcache_enable(void)
74 {
75 }
76
dcache_disable(void)77 void dcache_disable(void)
78 {
79 }
80
dcache_status(void)81 int dcache_status(void)
82 {
83 return 0;
84 }
85