1 /*
2 * S/390 helpers - system only
3 *
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include "qemu/osdep.h"
22 #include "cpu.h"
23 #include "s390x-internal.h"
24 #include "gdbstub/helpers.h"
25 #include "qemu/timer.h"
26 #include "hw/s390x/ioinst.h"
27 #include "target/s390x/kvm/pv.h"
28 #include "system/hw_accel.h"
29 #include "system/runstate.h"
30 #include "exec/target_page.h"
31 #include "exec/watchpoint.h"
32
s390x_tod_timer(void * opaque)33 void s390x_tod_timer(void *opaque)
34 {
35 cpu_inject_clock_comparator((S390CPU *) opaque);
36 }
37
s390x_cpu_timer(void * opaque)38 void s390x_cpu_timer(void *opaque)
39 {
40 cpu_inject_cpu_timer((S390CPU *) opaque);
41 }
42
s390_cpu_get_phys_page_debug(CPUState * cs,vaddr vaddr)43 hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)
44 {
45 S390CPU *cpu = S390_CPU(cs);
46 CPUS390XState *env = &cpu->env;
47 target_ulong raddr;
48 int prot;
49 uint64_t asc = env->psw.mask & PSW_MASK_ASC;
50 uint64_t tec;
51
52 /* 31-Bit mode */
53 if (!(env->psw.mask & PSW_MASK_64)) {
54 vaddr &= 0x7fffffff;
55 }
56
57 /* We want to read the code (e.g., see what we are single-stepping).*/
58 if (asc != PSW_ASC_HOME) {
59 asc = PSW_ASC_PRIMARY;
60 }
61
62 /*
63 * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead
64 * of MMU_INST_FETCH.
65 */
66 if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) {
67 return -1;
68 }
69 return raddr;
70 }
71
s390_cpu_get_phys_addr_debug(CPUState * cs,vaddr vaddr)72 hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr vaddr)
73 {
74 hwaddr phys_addr;
75 target_ulong page;
76
77 page = vaddr & TARGET_PAGE_MASK;
78 phys_addr = cpu_get_phys_page_debug(cs, page);
79 phys_addr += (vaddr & ~TARGET_PAGE_MASK);
80
81 return phys_addr;
82 }
83
is_special_wait_psw(uint64_t psw_addr)84 static inline bool is_special_wait_psw(uint64_t psw_addr)
85 {
86 /* signal quiesce */
87 return (psw_addr & 0xfffUL) == 0xfffUL;
88 }
89
s390_handle_wait(S390CPU * cpu)90 void s390_handle_wait(S390CPU *cpu)
91 {
92 CPUState *cs = CPU(cpu);
93
94 s390_cpu_halt(cpu);
95
96 if (s390_count_running_cpus() == 0) {
97 if (is_special_wait_psw(cpu->env.psw.addr)) {
98 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
99 } else {
100 cpu->env.crash_reason = S390_CRASH_REASON_DISABLED_WAIT;
101 qemu_system_guest_panicked(cpu_get_crash_info(cs));
102 }
103 }
104 }
105
cpu_map_lowcore(CPUS390XState * env)106 LowCore *cpu_map_lowcore(CPUS390XState *env)
107 {
108 LowCore *lowcore;
109 hwaddr len = sizeof(LowCore);
110
111 lowcore = cpu_physical_memory_map(env->psa, &len, true);
112
113 if (len < sizeof(LowCore)) {
114 cpu_abort(env_cpu(env), "Could not map lowcore\n");
115 }
116
117 return lowcore;
118 }
119
cpu_unmap_lowcore(LowCore * lowcore)120 void cpu_unmap_lowcore(LowCore *lowcore)
121 {
122 cpu_physical_memory_unmap(lowcore, sizeof(LowCore), 1, sizeof(LowCore));
123 }
124
do_restart_interrupt(CPUS390XState * env)125 void do_restart_interrupt(CPUS390XState *env)
126 {
127 uint64_t mask, addr;
128 LowCore *lowcore;
129
130 lowcore = cpu_map_lowcore(env);
131
132 lowcore->restart_old_psw.mask = cpu_to_be64(s390_cpu_get_psw_mask(env));
133 lowcore->restart_old_psw.addr = cpu_to_be64(env->psw.addr);
134 mask = be64_to_cpu(lowcore->restart_new_psw.mask);
135 addr = be64_to_cpu(lowcore->restart_new_psw.addr);
136
137 cpu_unmap_lowcore(lowcore);
138 env->pending_int &= ~INTERRUPT_RESTART;
139
140 s390_cpu_set_psw(env, mask, addr);
141 }
142
s390_cpu_recompute_watchpoints(CPUState * cs)143 void s390_cpu_recompute_watchpoints(CPUState *cs)
144 {
145 const int wp_flags = BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS;
146 CPUS390XState *env = cpu_env(cs);
147
148 /* We are called when the watchpoints have changed. First
149 remove them all. */
150 cpu_watchpoint_remove_all(cs, BP_CPU);
151
152 /* Return if PER is not enabled */
153 if (!(env->psw.mask & PSW_MASK_PER)) {
154 return;
155 }
156
157 /* Return if storage-alteration event is not enabled. */
158 if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) {
159 return;
160 }
161
162 if (env->cregs[10] == 0 && env->cregs[11] == -1LL) {
163 /* We can't create a watchoint spanning the whole memory range, so
164 split it in two parts. */
165 cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL);
166 cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL);
167 } else if (env->cregs[10] > env->cregs[11]) {
168 /* The address range loops, create two watchpoints. */
169 cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10],
170 wp_flags, NULL);
171 cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL);
172
173 } else {
174 /* Default case, create a single watchpoint. */
175 cpu_watchpoint_insert(cs, env->cregs[10],
176 env->cregs[11] - env->cregs[10] + 1,
177 wp_flags, NULL);
178 }
179 }
180
181 typedef struct SigpSaveArea {
182 uint64_t fprs[16]; /* 0x0000 */
183 uint64_t grs[16]; /* 0x0080 */
184 PSW psw; /* 0x0100 */
185 uint8_t pad_0x0110[0x0118 - 0x0110]; /* 0x0110 */
186 uint32_t prefix; /* 0x0118 */
187 uint32_t fpc; /* 0x011c */
188 uint8_t pad_0x0120[0x0124 - 0x0120]; /* 0x0120 */
189 uint32_t todpr; /* 0x0124 */
190 uint64_t cputm; /* 0x0128 */
191 uint64_t ckc; /* 0x0130 */
192 uint8_t pad_0x0138[0x0140 - 0x0138]; /* 0x0138 */
193 uint32_t ars[16]; /* 0x0140 */
194 uint64_t crs[16]; /* 0x0384 */
195 } SigpSaveArea;
196 QEMU_BUILD_BUG_ON(sizeof(SigpSaveArea) != 512);
197
s390_store_status(S390CPU * cpu,hwaddr addr,bool store_arch)198 int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
199 {
200 static const uint8_t ar_id = 1;
201 SigpSaveArea *sa;
202 hwaddr len = sizeof(*sa);
203 int i;
204
205 /* For PVMs storing will occur when this cpu enters SIE again */
206 if (s390_is_pv()) {
207 return 0;
208 }
209
210 sa = cpu_physical_memory_map(addr, &len, true);
211 if (!sa) {
212 return -EFAULT;
213 }
214 if (len != sizeof(*sa)) {
215 cpu_physical_memory_unmap(sa, len, 1, 0);
216 return -EFAULT;
217 }
218
219 if (store_arch) {
220 cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1);
221 }
222 for (i = 0; i < 16; ++i) {
223 sa->fprs[i] = cpu_to_be64(*get_freg(&cpu->env, i));
224 }
225 for (i = 0; i < 16; ++i) {
226 sa->grs[i] = cpu_to_be64(cpu->env.regs[i]);
227 }
228 sa->psw.addr = cpu_to_be64(cpu->env.psw.addr);
229 sa->psw.mask = cpu_to_be64(s390_cpu_get_psw_mask(&cpu->env));
230 sa->prefix = cpu_to_be32(cpu->env.psa);
231 sa->fpc = cpu_to_be32(cpu->env.fpc);
232 sa->todpr = cpu_to_be32(cpu->env.todpr);
233 sa->cputm = cpu_to_be64(cpu->env.cputm);
234 sa->ckc = cpu_to_be64(cpu->env.ckc >> 8);
235 for (i = 0; i < 16; ++i) {
236 sa->ars[i] = cpu_to_be32(cpu->env.aregs[i]);
237 }
238 for (i = 0; i < 16; ++i) {
239 sa->crs[i] = cpu_to_be64(cpu->env.cregs[i]);
240 }
241
242 cpu_physical_memory_unmap(sa, len, 1, len);
243
244 return 0;
245 }
246
247 typedef struct SigpAdtlSaveArea {
248 uint64_t vregs[32][2]; /* 0x0000 */
249 uint8_t pad_0x0200[0x0400 - 0x0200]; /* 0x0200 */
250 uint64_t gscb[4]; /* 0x0400 */
251 uint8_t pad_0x0420[0x1000 - 0x0420]; /* 0x0420 */
252 } SigpAdtlSaveArea;
253 QEMU_BUILD_BUG_ON(sizeof(SigpAdtlSaveArea) != 4096);
254
255 #define ADTL_GS_MIN_SIZE 2048 /* minimal size of adtl save area for GS */
s390_store_adtl_status(S390CPU * cpu,hwaddr addr,hwaddr len)256 int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len)
257 {
258 SigpAdtlSaveArea *sa;
259 hwaddr save = len;
260 int i;
261
262 sa = cpu_physical_memory_map(addr, &save, true);
263 if (!sa) {
264 return -EFAULT;
265 }
266 if (save != len) {
267 cpu_physical_memory_unmap(sa, len, 1, 0);
268 return -EFAULT;
269 }
270
271 if (s390_has_feat(S390_FEAT_VECTOR)) {
272 for (i = 0; i < 32; i++) {
273 sa->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i][0]);
274 sa->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i][1]);
275 }
276 }
277 if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && len >= ADTL_GS_MIN_SIZE) {
278 for (i = 0; i < 4; i++) {
279 sa->gscb[i] = cpu_to_be64(cpu->env.gscb[i]);
280 }
281 }
282
283 cpu_physical_memory_unmap(sa, len, 1, len);
284 return 0;
285 }
286