1 /*
2 * QEMU S/390 CPU
3 *
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
6 * Copyright (c) 2012 SUSE LINUX Products GmbH
7 * Copyright (c) 2012 IBM Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qapi/error.h"
25 #include "cpu.h"
26 #include "s390x-internal.h"
27 #include "kvm/kvm_s390x.h"
28 #include "system/kvm.h"
29 #include "qemu/module.h"
30 #include "trace.h"
31 #include "qapi/qapi-types-machine.h"
32 #include "system/hw_accel.h"
33 #include "hw/qdev-properties.h"
34 #include "hw/qdev-properties-system.h"
35 #include "hw/resettable.h"
36 #include "fpu/softfloat-helpers.h"
37 #include "disas/capstone.h"
38 #include "system/tcg.h"
39 #ifndef CONFIG_USER_ONLY
40 #include "system/reset.h"
41 #endif
42 #include "hw/s390x/cpu-topology.h"
43
44 #define CR0_RESET 0xE0UL
45 #define CR14_RESET 0xC2000000UL;
46
47 #ifndef CONFIG_USER_ONLY
is_early_exception_psw(uint64_t mask,uint64_t addr)48 static bool is_early_exception_psw(uint64_t mask, uint64_t addr)
49 {
50 if (mask & PSW_MASK_RESERVED) {
51 return true;
52 }
53
54 switch (mask & (PSW_MASK_32 | PSW_MASK_64)) {
55 case 0:
56 return addr & ~0xffffffULL;
57 case PSW_MASK_32:
58 return addr & ~0x7fffffffULL;
59 case PSW_MASK_32 | PSW_MASK_64:
60 return false;
61 default: /* PSW_MASK_64 */
62 return true;
63 }
64 }
65 #endif
66
s390_cpu_set_psw(CPUS390XState * env,uint64_t mask,uint64_t addr)67 void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
68 {
69 #ifndef CONFIG_USER_ONLY
70 uint64_t old_mask = env->psw.mask;
71 #endif
72
73 env->psw.addr = addr;
74 env->psw.mask = mask;
75
76 /* KVM will handle all WAITs and trigger a WAIT exit on disabled_wait */
77 if (!tcg_enabled()) {
78 return;
79 }
80 env->cc_op = (mask >> 44) & 3;
81
82 #ifndef CONFIG_USER_ONLY
83 if (is_early_exception_psw(mask, addr)) {
84 env->int_pgm_ilen = 0;
85 trigger_pgm_exception(env, PGM_SPECIFICATION);
86 return;
87 }
88
89 if ((old_mask ^ mask) & PSW_MASK_PER) {
90 s390_cpu_recompute_watchpoints(env_cpu(env));
91 }
92
93 if (mask & PSW_MASK_WAIT) {
94 s390_handle_wait(env_archcpu(env));
95 }
96 #endif
97 }
98
s390_cpu_get_psw_mask(CPUS390XState * env)99 uint64_t s390_cpu_get_psw_mask(CPUS390XState *env)
100 {
101 uint64_t r = env->psw.mask;
102
103 if (tcg_enabled()) {
104 uint64_t cc = calc_cc(env, env->cc_op, env->cc_src,
105 env->cc_dst, env->cc_vr);
106
107 assert(cc <= 3);
108 r &= ~PSW_MASK_CC;
109 r |= cc << 44;
110 }
111
112 return r;
113 }
114
s390_cpu_set_pc(CPUState * cs,vaddr value)115 static void s390_cpu_set_pc(CPUState *cs, vaddr value)
116 {
117 S390CPU *cpu = S390_CPU(cs);
118
119 cpu->env.psw.addr = value;
120 }
121
s390_cpu_get_pc(CPUState * cs)122 static vaddr s390_cpu_get_pc(CPUState *cs)
123 {
124 S390CPU *cpu = S390_CPU(cs);
125
126 return cpu->env.psw.addr;
127 }
128
s390x_cpu_mmu_index(CPUState * cs,bool ifetch)129 static int s390x_cpu_mmu_index(CPUState *cs, bool ifetch)
130 {
131 return s390x_env_mmu_index(cpu_env(cs), ifetch);
132 }
133
s390_query_cpu_fast(CPUState * cpu,CpuInfoFast * value)134 static void s390_query_cpu_fast(CPUState *cpu, CpuInfoFast *value)
135 {
136 S390CPU *s390_cpu = S390_CPU(cpu);
137
138 value->u.s390x.cpu_state = s390_cpu->env.cpu_state;
139 #if !defined(CONFIG_USER_ONLY)
140 if (s390_has_topology()) {
141 value->u.s390x.has_dedicated = true;
142 value->u.s390x.dedicated = s390_cpu->env.dedicated;
143 value->u.s390x.has_entitlement = true;
144 value->u.s390x.entitlement = s390_cpu->env.entitlement;
145 }
146 #endif
147 }
148
149 /* S390CPUClass Resettable reset_hold phase method */
s390_cpu_reset_hold(Object * obj,ResetType type)150 static void s390_cpu_reset_hold(Object *obj, ResetType type)
151 {
152 S390CPU *cpu = S390_CPU(obj);
153 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
154 CPUS390XState *env = &cpu->env;
155
156 if (scc->parent_phases.hold) {
157 scc->parent_phases.hold(obj, type);
158 }
159 cpu->env.sigp_order = 0;
160 s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
161
162 switch (type) {
163 default:
164 /* RESET_TYPE_COLD: power on or "clear" reset */
165 memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields));
166 /* fall through */
167 case RESET_TYPE_S390_CPU_INITIAL:
168 /* initial reset does not clear everything! */
169 memset(&env->start_initial_reset_fields, 0,
170 offsetof(CPUS390XState, start_normal_reset_fields) -
171 offsetof(CPUS390XState, start_initial_reset_fields));
172
173 /* architectured initial value for Breaking-Event-Address register */
174 env->gbea = 1;
175
176 /* architectured initial values for CR 0 and 14 */
177 env->cregs[0] = CR0_RESET;
178 env->cregs[14] = CR14_RESET;
179
180 #if defined(CONFIG_USER_ONLY)
181 /* user mode should always be allowed to use the full FPU */
182 env->cregs[0] |= CR0_AFP;
183 if (s390_has_feat(S390_FEAT_VECTOR)) {
184 env->cregs[0] |= CR0_VECTOR;
185 }
186 #endif
187
188 /* tininess for underflow is detected before rounding */
189 set_float_detect_tininess(float_tininess_before_rounding,
190 &env->fpu_status);
191 set_float_2nan_prop_rule(float_2nan_prop_s_ab, &env->fpu_status);
192 set_float_3nan_prop_rule(float_3nan_prop_s_abc, &env->fpu_status);
193 set_float_infzeronan_rule(float_infzeronan_dnan_always,
194 &env->fpu_status);
195 /* Default NaN value: sign bit clear, frac msb set */
196 set_float_default_nan_pattern(0b01000000, &env->fpu_status);
197 /* fall through */
198 case RESET_TYPE_S390_CPU_NORMAL:
199 env->psw.mask &= ~PSW_MASK_RI;
200 memset(&env->start_normal_reset_fields, 0,
201 offsetof(CPUS390XState, end_reset_fields) -
202 offsetof(CPUS390XState, start_normal_reset_fields));
203
204 env->pfault_token = -1UL;
205 env->bpbc = false;
206 break;
207 }
208
209 /* Reset state inside the kernel that we cannot access yet from QEMU. */
210 if (kvm_enabled()) {
211 switch (type) {
212 default:
213 kvm_s390_reset_vcpu_clear(cpu);
214 break;
215 case RESET_TYPE_S390_CPU_INITIAL:
216 kvm_s390_reset_vcpu_initial(cpu);
217 break;
218 case RESET_TYPE_S390_CPU_NORMAL:
219 kvm_s390_reset_vcpu_normal(cpu);
220 break;
221 }
222 }
223 }
224
s390_cpu_disas_set_info(CPUState * cpu,disassemble_info * info)225 static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
226 {
227 info->mach = bfd_mach_s390_64;
228 info->cap_arch = CS_ARCH_SYSZ;
229 info->endian = BFD_ENDIAN_BIG;
230 info->cap_insn_unit = 2;
231 info->cap_insn_split = 6;
232 }
233
s390_cpu_realizefn(DeviceState * dev,Error ** errp)234 static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
235 {
236 CPUState *cs = CPU(dev);
237 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
238 Error *err = NULL;
239
240 /* the model has to be realized before qemu_init_vcpu() due to kvm */
241 s390_realize_cpu_model(cs, &err);
242 if (err) {
243 goto out;
244 }
245
246 #if !defined(CONFIG_USER_ONLY)
247 if (!s390_cpu_system_realize(dev, &err)) {
248 goto out;
249 }
250 #endif
251
252 cpu_exec_realizefn(cs, &err);
253 if (err != NULL) {
254 goto out;
255 }
256
257 #if !defined(CONFIG_USER_ONLY)
258 qemu_register_reset(s390_cpu_machine_reset_cb, S390_CPU(dev));
259 #endif
260 s390_cpu_gdb_init(cs);
261 qemu_init_vcpu(cs);
262
263 /*
264 * KVM requires the initial CPU reset ioctl to be executed on the target
265 * CPU thread. CPU hotplug under single-threaded TCG will not work with
266 * run_on_cpu(), as run_on_cpu() will not work properly if called while
267 * the main thread is already running but the CPU hasn't been realized.
268 */
269 if (kvm_enabled()) {
270 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
271 } else {
272 cpu_reset(cs);
273 }
274
275 scc->parent_realize(dev, &err);
276 out:
277 error_propagate(errp, err);
278 }
279
s390_cpu_initfn(Object * obj)280 static void s390_cpu_initfn(Object *obj)
281 {
282 CPUState *cs = CPU(obj);
283
284 cs->exception_index = EXCP_HLT;
285
286 #if !defined(CONFIG_USER_ONLY)
287 s390_cpu_system_init(obj);
288 #endif
289 }
290
s390_gdb_arch_name(CPUState * cs)291 static const gchar *s390_gdb_arch_name(CPUState *cs)
292 {
293 return "s390:64-bit";
294 }
295
296 #ifndef CONFIG_USER_ONLY
297 static const Property s390x_cpu_properties[] = {
298 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
299 DEFINE_PROP_INT32("socket-id", S390CPU, env.socket_id, -1),
300 DEFINE_PROP_INT32("book-id", S390CPU, env.book_id, -1),
301 DEFINE_PROP_INT32("drawer-id", S390CPU, env.drawer_id, -1),
302 DEFINE_PROP_BOOL("dedicated", S390CPU, env.dedicated, false),
303 DEFINE_PROP_CPUS390ENTITLEMENT("entitlement", S390CPU, env.entitlement,
304 S390_CPU_ENTITLEMENT_AUTO),
305 };
306 #endif
307
308 #ifdef CONFIG_TCG
309 #include "accel/tcg/cpu-ops.h"
310
cpu_get_tb_cpu_state(CPUS390XState * env,vaddr * pc,uint64_t * cs_base,uint32_t * pflags)311 void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc,
312 uint64_t *cs_base, uint32_t *pflags)
313 {
314 uint32_t flags;
315
316 if (env->psw.addr & 1) {
317 /*
318 * Instructions must be at even addresses.
319 * This needs to be checked before address translation.
320 */
321 env->int_pgm_ilen = 2; /* see s390_cpu_tlb_fill() */
322 tcg_s390_program_interrupt(env, PGM_SPECIFICATION, 0);
323 }
324
325 *pc = env->psw.addr;
326 *cs_base = env->ex_value;
327
328 flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW;
329 if (env->psw.mask & PSW_MASK_PER) {
330 flags |= env->cregs[9] & (FLAG_MASK_PER_BRANCH |
331 FLAG_MASK_PER_IFETCH |
332 FLAG_MASK_PER_IFETCH_NULLIFY);
333 if ((env->cregs[9] & PER_CR9_EVENT_STORE) &&
334 (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) {
335 flags |= FLAG_MASK_PER_STORE_REAL;
336 }
337 }
338 if (env->cregs[0] & CR0_AFP) {
339 flags |= FLAG_MASK_AFP;
340 }
341 if (env->cregs[0] & CR0_VECTOR) {
342 flags |= FLAG_MASK_VECTOR;
343 }
344 *pflags = flags;
345 }
346
347 static const TCGCPUOps s390_tcg_ops = {
348 .initialize = s390x_translate_init,
349 .translate_code = s390x_translate_code,
350 .restore_state_to_opc = s390x_restore_state_to_opc,
351
352 #ifdef CONFIG_USER_ONLY
353 .record_sigsegv = s390_cpu_record_sigsegv,
354 .record_sigbus = s390_cpu_record_sigbus,
355 #else
356 .tlb_fill = s390_cpu_tlb_fill,
357 .cpu_exec_interrupt = s390_cpu_exec_interrupt,
358 .cpu_exec_halt = s390_cpu_has_work,
359 .do_interrupt = s390_cpu_do_interrupt,
360 .debug_excp_handler = s390x_cpu_debug_excp_handler,
361 .do_unaligned_access = s390x_cpu_do_unaligned_access,
362 #endif /* !CONFIG_USER_ONLY */
363 };
364 #endif /* CONFIG_TCG */
365
s390_cpu_class_init(ObjectClass * oc,void * data)366 static void s390_cpu_class_init(ObjectClass *oc, void *data)
367 {
368 S390CPUClass *scc = S390_CPU_CLASS(oc);
369 CPUClass *cc = CPU_CLASS(scc);
370 DeviceClass *dc = DEVICE_CLASS(oc);
371 ResettableClass *rc = RESETTABLE_CLASS(oc);
372
373 device_class_set_parent_realize(dc, s390_cpu_realizefn,
374 &scc->parent_realize);
375 dc->user_creatable = true;
376
377 resettable_class_set_parent_phases(rc, NULL, s390_cpu_reset_hold, NULL,
378 &scc->parent_phases);
379
380 cc->class_by_name = s390_cpu_class_by_name;
381 cc->mmu_index = s390x_cpu_mmu_index;
382 cc->dump_state = s390_cpu_dump_state;
383 cc->query_cpu_fast = s390_query_cpu_fast;
384 cc->set_pc = s390_cpu_set_pc;
385 cc->get_pc = s390_cpu_get_pc;
386 cc->gdb_read_register = s390_cpu_gdb_read_register;
387 cc->gdb_write_register = s390_cpu_gdb_write_register;
388 #ifndef CONFIG_USER_ONLY
389 device_class_set_props(dc, s390x_cpu_properties);
390 s390_cpu_system_class_init(cc);
391 #endif
392 cc->disas_set_info = s390_cpu_disas_set_info;
393 cc->gdb_core_xml_file = "s390x-core64.xml";
394 cc->gdb_arch_name = s390_gdb_arch_name;
395
396 s390_cpu_model_class_register_props(oc);
397
398 #ifdef CONFIG_TCG
399 cc->tcg_ops = &s390_tcg_ops;
400 #endif /* CONFIG_TCG */
401 }
402
403 static const TypeInfo s390_cpu_type_info = {
404 .name = TYPE_S390_CPU,
405 .parent = TYPE_CPU,
406 .instance_size = sizeof(S390CPU),
407 .instance_align = __alignof__(S390CPU),
408 .instance_init = s390_cpu_initfn,
409
410 #ifndef CONFIG_USER_ONLY
411 .instance_finalize = s390_cpu_finalize,
412 #endif /* !CONFIG_USER_ONLY */
413
414 .abstract = true,
415 .class_size = sizeof(S390CPUClass),
416 .class_init = s390_cpu_class_init,
417 };
418
s390_cpu_register_types(void)419 static void s390_cpu_register_types(void)
420 {
421 type_register_static(&s390_cpu_type_info);
422 }
423
424 type_init(s390_cpu_register_types)
425