1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * RTL8XXXU mac80211 USB driver - 8188c/8188r/8192c specific subdriver
4  *
5  * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com>
6  *
7  * Portions, notably calibration code:
8  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
9  *
10  * This driver was written as a replacement for the vendor provided
11  * rtl8723au driver. As the Realtek 8xxx chips are very similar in
12  * their programming interface, I have started adding support for
13  * additional 8xxx chips like the 8192cu, 8188cus, etc.
14  */
15 
16 #include <linux/init.h>
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/errno.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/spinlock.h>
23 #include <linux/list.h>
24 #include <linux/usb.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/wireless.h>
29 #include <linux/firmware.h>
30 #include <linux/moduleparam.h>
31 #include <net/mac80211.h>
32 #include "rtl8xxxu.h"
33 #include "rtl8xxxu_regs.h"
34 
35 #ifdef CONFIG_RTL8XXXU_UNTESTED
36 static struct rtl8xxxu_power_base rtl8192c_power_base = {
37 	.reg_0e00 = 0x07090c0c,
38 	.reg_0e04 = 0x01020405,
39 	.reg_0e08 = 0x00000000,
40 	.reg_086c = 0x00000000,
41 
42 	.reg_0e10 = 0x0b0c0c0e,
43 	.reg_0e14 = 0x01030506,
44 	.reg_0e18 = 0x0b0c0d0e,
45 	.reg_0e1c = 0x01030509,
46 
47 	.reg_0830 = 0x07090c0c,
48 	.reg_0834 = 0x01020405,
49 	.reg_0838 = 0x00000000,
50 	.reg_086c_2 = 0x00000000,
51 
52 	.reg_083c = 0x0b0c0d0e,
53 	.reg_0848 = 0x01030509,
54 	.reg_084c = 0x0b0c0d0e,
55 	.reg_0868 = 0x01030509,
56 };
57 
58 static struct rtl8xxxu_power_base rtl8188r_power_base = {
59 	.reg_0e00 = 0x06080808,
60 	.reg_0e04 = 0x00040406,
61 	.reg_0e08 = 0x00000000,
62 	.reg_086c = 0x00000000,
63 
64 	.reg_0e10 = 0x04060608,
65 	.reg_0e14 = 0x00020204,
66 	.reg_0e18 = 0x04060608,
67 	.reg_0e1c = 0x00020204,
68 
69 	.reg_0830 = 0x06080808,
70 	.reg_0834 = 0x00040406,
71 	.reg_0838 = 0x00000000,
72 	.reg_086c_2 = 0x00000000,
73 
74 	.reg_083c = 0x04060608,
75 	.reg_0848 = 0x00020204,
76 	.reg_084c = 0x04060608,
77 	.reg_0868 = 0x00020204,
78 };
79 
80 static const struct rtl8xxxu_rfregval rtl8192cu_radioa_2t_init_table[] = {
81 	{0x00, 0x00030159}, {0x01, 0x00031284},
82 	{0x02, 0x00098000}, {0x03, 0x00018c63},
83 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
84 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
85 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
86 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
87 	{0x19, 0x00000000}, {0x1a, 0x00010255},
88 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
89 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
90 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
91 	{0x21, 0x0006c000}, {0x22, 0x00000000},
92 	{0x23, 0x00001558}, {0x24, 0x00000060},
93 	{0x25, 0x00000483}, {0x26, 0x0004f000},
94 	{0x27, 0x000ec7d9}, {0x28, 0x000577c0},
95 	{0x29, 0x00004783}, {0x2a, 0x00000001},
96 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
97 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
98 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
99 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
100 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
101 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
102 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
103 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
104 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
105 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
106 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
107 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
108 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
109 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
110 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
111 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
112 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
113 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
114 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
115 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
116 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
117 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
118 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
119 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
120 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
121 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
122 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
123 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
124 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
125 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
126 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
127 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
128 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
129 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
130 	{0x10, 0x00000000}, {0x11, 0x00000000},
131 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
132 	{0x10, 0x0009000f}, {0x11, 0x00023100},
133 	{0x12, 0x00032000}, {0x12, 0x00071000},
134 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
135 	{0x13, 0x000287b3}, {0x13, 0x000244b7},
136 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
137 	{0x13, 0x00018493}, {0x13, 0x0001429b},
138 	{0x13, 0x00010299}, {0x13, 0x0000c29c},
139 	{0x13, 0x000081a0}, {0x13, 0x000040ac},
140 	{0x13, 0x00000020}, {0x14, 0x0001944c},
141 	{0x14, 0x00059444}, {0x14, 0x0009944c},
142 	{0x14, 0x000d9444}, {0x15, 0x0000f424},
143 	{0x15, 0x0004f424}, {0x15, 0x0008f424},
144 	{0x15, 0x000cf424}, {0x16, 0x000e0330},
145 	{0x16, 0x000a0330}, {0x16, 0x00060330},
146 	{0x16, 0x00020330}, {0x00, 0x00010159},
147 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
148 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
149 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
150 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
151 	{0x00, 0x00030159},
152 	{0xff, 0xffffffff}
153 };
154 
155 static const struct rtl8xxxu_rfregval rtl8192cu_radiob_2t_init_table[] = {
156 	{0x00, 0x00030159}, {0x01, 0x00031284},
157 	{0x02, 0x00098000}, {0x03, 0x00018c63},
158 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
159 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
160 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
161 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
162 	{0x12, 0x00032000}, {0x12, 0x00071000},
163 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
164 	{0x13, 0x000287af}, {0x13, 0x000244b7},
165 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
166 	{0x13, 0x00018493}, {0x13, 0x00014297},
167 	{0x13, 0x00010295}, {0x13, 0x0000c298},
168 	{0x13, 0x0000819c}, {0x13, 0x000040a8},
169 	{0x13, 0x0000001c}, {0x14, 0x0001944c},
170 	{0x14, 0x00059444}, {0x14, 0x0009944c},
171 	{0x14, 0x000d9444}, {0x15, 0x0000f424},
172 	{0x15, 0x0004f424}, {0x15, 0x0008f424},
173 	{0x15, 0x000cf424}, {0x16, 0x000e0330},
174 	{0x16, 0x000a0330}, {0x16, 0x00060330},
175 	{0x16, 0x00020330},
176 	{0xff, 0xffffffff}
177 };
178 
179 static const struct rtl8xxxu_rfregval rtl8192cu_radioa_1t_init_table[] = {
180 	{0x00, 0x00030159}, {0x01, 0x00031284},
181 	{0x02, 0x00098000}, {0x03, 0x00018c63},
182 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
183 	{0x0a, 0x0001adb1}, {0x0b, 0x00054867},
184 	{0x0c, 0x0008992e}, {0x0d, 0x0000e52c},
185 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
186 	{0x19, 0x00000000}, {0x1a, 0x00010255},
187 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
188 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
189 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
190 	{0x21, 0x0006c000}, {0x22, 0x00000000},
191 	{0x23, 0x00001558}, {0x24, 0x00000060},
192 	{0x25, 0x00000483}, {0x26, 0x0004f000},
193 	{0x27, 0x000ec7d9}, {0x28, 0x000577c0},
194 	{0x29, 0x00004783}, {0x2a, 0x00000001},
195 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
196 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
197 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
198 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
199 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
200 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
201 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
202 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
203 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
204 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
205 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
206 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
207 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
208 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
209 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
210 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
211 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
212 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
213 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
214 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
215 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
216 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
217 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
218 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
219 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
220 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
221 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
222 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
223 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
224 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
225 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
226 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
227 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
228 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
229 	{0x10, 0x00000000}, {0x11, 0x00000000},
230 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
231 	{0x10, 0x0009000f}, {0x11, 0x00023100},
232 	{0x12, 0x00032000}, {0x12, 0x00071000},
233 	{0x12, 0x000b0000}, {0x12, 0x000fc000},
234 	{0x13, 0x000287b3}, {0x13, 0x000244b7},
235 	{0x13, 0x000204ab}, {0x13, 0x0001c49f},
236 	{0x13, 0x00018493}, {0x13, 0x0001429b},
237 	{0x13, 0x00010299}, {0x13, 0x0000c29c},
238 	{0x13, 0x000081a0}, {0x13, 0x000040ac},
239 	{0x13, 0x00000020}, {0x14, 0x0001944c},
240 	{0x14, 0x00059444}, {0x14, 0x0009944c},
241 	{0x14, 0x000d9444}, {0x15, 0x0000f405},
242 	{0x15, 0x0004f405}, {0x15, 0x0008f405},
243 	{0x15, 0x000cf405}, {0x16, 0x000e0330},
244 	{0x16, 0x000a0330}, {0x16, 0x00060330},
245 	{0x16, 0x00020330}, {0x00, 0x00010159},
246 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
247 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
248 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
249 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
250 	{0x00, 0x00030159},
251 	{0xff, 0xffffffff}
252 };
253 
254 static const struct rtl8xxxu_rfregval rtl8188ru_radioa_1t_highpa_table[] = {
255 	{0x00, 0x00030159}, {0x01, 0x00031284},
256 	{0x02, 0x00098000}, {0x03, 0x00018c63},
257 	{0x04, 0x000210e7}, {0x09, 0x0002044f},
258 	{0x0a, 0x0001adb0}, {0x0b, 0x00054867},
259 	{0x0c, 0x0008992e}, {0x0d, 0x0000e529},
260 	{0x0e, 0x00039ce7}, {0x0f, 0x00000451},
261 	{0x19, 0x00000000}, {0x1a, 0x00000255},
262 	{0x1b, 0x00060a00}, {0x1c, 0x000fc378},
263 	{0x1d, 0x000a1250}, {0x1e, 0x0004445f},
264 	{0x1f, 0x00080001}, {0x20, 0x0000b614},
265 	{0x21, 0x0006c000}, {0x22, 0x0000083c},
266 	{0x23, 0x00001558}, {0x24, 0x00000060},
267 	{0x25, 0x00000483}, {0x26, 0x0004f000},
268 	{0x27, 0x000ec7d9}, {0x28, 0x000977c0},
269 	{0x29, 0x00004783}, {0x2a, 0x00000001},
270 	{0x2b, 0x00021334}, {0x2a, 0x00000000},
271 	{0x2b, 0x00000054}, {0x2a, 0x00000001},
272 	{0x2b, 0x00000808}, {0x2b, 0x00053333},
273 	{0x2c, 0x0000000c}, {0x2a, 0x00000002},
274 	{0x2b, 0x00000808}, {0x2b, 0x0005b333},
275 	{0x2c, 0x0000000d}, {0x2a, 0x00000003},
276 	{0x2b, 0x00000808}, {0x2b, 0x00063333},
277 	{0x2c, 0x0000000d}, {0x2a, 0x00000004},
278 	{0x2b, 0x00000808}, {0x2b, 0x0006b333},
279 	{0x2c, 0x0000000d}, {0x2a, 0x00000005},
280 	{0x2b, 0x00000808}, {0x2b, 0x00073333},
281 	{0x2c, 0x0000000d}, {0x2a, 0x00000006},
282 	{0x2b, 0x00000709}, {0x2b, 0x0005b333},
283 	{0x2c, 0x0000000d}, {0x2a, 0x00000007},
284 	{0x2b, 0x00000709}, {0x2b, 0x00063333},
285 	{0x2c, 0x0000000d}, {0x2a, 0x00000008},
286 	{0x2b, 0x0000060a}, {0x2b, 0x0004b333},
287 	{0x2c, 0x0000000d}, {0x2a, 0x00000009},
288 	{0x2b, 0x0000060a}, {0x2b, 0x00053333},
289 	{0x2c, 0x0000000d}, {0x2a, 0x0000000a},
290 	{0x2b, 0x0000060a}, {0x2b, 0x0005b333},
291 	{0x2c, 0x0000000d}, {0x2a, 0x0000000b},
292 	{0x2b, 0x0000060a}, {0x2b, 0x00063333},
293 	{0x2c, 0x0000000d}, {0x2a, 0x0000000c},
294 	{0x2b, 0x0000060a}, {0x2b, 0x0006b333},
295 	{0x2c, 0x0000000d}, {0x2a, 0x0000000d},
296 	{0x2b, 0x0000060a}, {0x2b, 0x00073333},
297 	{0x2c, 0x0000000d}, {0x2a, 0x0000000e},
298 	{0x2b, 0x0000050b}, {0x2b, 0x00066666},
299 	{0x2c, 0x0000001a}, {0x2a, 0x000e0000},
300 	{0x10, 0x0004000f}, {0x11, 0x000e31fc},
301 	{0x10, 0x0006000f}, {0x11, 0x000ff9f8},
302 	{0x10, 0x0002000f}, {0x11, 0x000203f9},
303 	{0x10, 0x0003000f}, {0x11, 0x000ff500},
304 	{0x10, 0x00000000}, {0x11, 0x00000000},
305 	{0x10, 0x0008000f}, {0x11, 0x0003f100},
306 	{0x10, 0x0009000f}, {0x11, 0x00023100},
307 	{0x12, 0x000d8000}, {0x12, 0x00090000},
308 	{0x12, 0x00051000}, {0x12, 0x00012000},
309 	{0x13, 0x00028fb4}, {0x13, 0x00024fa8},
310 	{0x13, 0x000207a4}, {0x13, 0x0001c3b0},
311 	{0x13, 0x000183a4}, {0x13, 0x00014398},
312 	{0x13, 0x000101a4}, {0x13, 0x0000c198},
313 	{0x13, 0x000080a4}, {0x13, 0x00004098},
314 	{0x13, 0x00000000}, {0x14, 0x0001944c},
315 	{0x14, 0x00059444}, {0x14, 0x0009944c},
316 	{0x14, 0x000d9444}, {0x15, 0x0000f405},
317 	{0x15, 0x0004f405}, {0x15, 0x0008f405},
318 	{0x15, 0x000cf405}, {0x16, 0x000e0330},
319 	{0x16, 0x000a0330}, {0x16, 0x00060330},
320 	{0x16, 0x00020330}, {0x00, 0x00010159},
321 	{0x18, 0x0000f401}, {0xfe, 0x00000000},
322 	{0xfe, 0x00000000}, {0x1f, 0x00080003},
323 	{0xfe, 0x00000000}, {0xfe, 0x00000000},
324 	{0x1e, 0x00044457}, {0x1f, 0x00080000},
325 	{0x00, 0x00030159},
326 	{0xff, 0xffffffff}
327 };
328 
rtl8192cu_identify_chip(struct rtl8xxxu_priv * priv)329 static int rtl8192cu_identify_chip(struct rtl8xxxu_priv *priv)
330 {
331 	struct device *dev = &priv->udev->dev;
332 	u32 val32, bonding, sys_cfg, vendor;
333 	int ret = 0;
334 
335 	sys_cfg = rtl8xxxu_read32(priv, REG_SYS_CFG);
336 	priv->chip_cut = u32_get_bits(sys_cfg, SYS_CFG_CHIP_VERSION_MASK);
337 	if (sys_cfg & SYS_CFG_TRP_VAUX_EN) {
338 		dev_info(dev, "Unsupported test chip\n");
339 		ret = -ENOTSUPP;
340 		goto out;
341 	}
342 
343 	if (sys_cfg & SYS_CFG_TYPE_ID) {
344 		bonding = rtl8xxxu_read32(priv, REG_HPON_FSM);
345 		bonding &= HPON_FSM_BONDING_MASK;
346 		if (bonding == HPON_FSM_BONDING_1T2R) {
347 			strscpy(priv->chip_name, "8191CU", sizeof(priv->chip_name));
348 			priv->tx_paths = 1;
349 			priv->usb_interrupts = 1;
350 			priv->rtl_chip = RTL8191C;
351 		} else {
352 			strscpy(priv->chip_name, "8192CU", sizeof(priv->chip_name));
353 			priv->tx_paths = 2;
354 			priv->usb_interrupts = 0;
355 			priv->rtl_chip = RTL8192C;
356 		}
357 		priv->rf_paths = 2;
358 		priv->rx_paths = 2;
359 	} else {
360 		strscpy(priv->chip_name, "8188CU", sizeof(priv->chip_name));
361 		priv->rf_paths = 1;
362 		priv->rx_paths = 1;
363 		priv->tx_paths = 1;
364 		priv->rtl_chip = RTL8188C;
365 		priv->usb_interrupts = 0;
366 	}
367 	priv->has_wifi = 1;
368 
369 	vendor = sys_cfg & SYS_CFG_VENDOR_ID;
370 	rtl8xxxu_identify_vendor_1bit(priv, vendor);
371 
372 	val32 = rtl8xxxu_read32(priv, REG_GPIO_OUTSTS);
373 	priv->rom_rev = u32_get_bits(val32, GPIO_RF_RL_ID);
374 
375 	rtl8xxxu_config_endpoints_sie(priv);
376 
377 	/*
378 	 * Fallback for devices that do not provide REG_NORMAL_SIE_EP_TX
379 	 */
380 	if (!priv->ep_tx_count)
381 		ret = rtl8xxxu_config_endpoints_no_sie(priv);
382 
383 out:
384 	return ret;
385 }
386 
rtl8192cu_load_firmware(struct rtl8xxxu_priv * priv)387 static int rtl8192cu_load_firmware(struct rtl8xxxu_priv *priv)
388 {
389 	const char *fw_name;
390 	int ret;
391 
392 	if (!priv->vendor_umc)
393 		fw_name = "rtlwifi/rtl8192cufw_TMSC.bin";
394 	else if (priv->chip_cut || priv->rtl_chip == RTL8192C)
395 		fw_name = "rtlwifi/rtl8192cufw_B.bin";
396 	else
397 		fw_name = "rtlwifi/rtl8192cufw_A.bin";
398 
399 	ret = rtl8xxxu_load_firmware(priv, fw_name);
400 
401 	return ret;
402 }
403 
rtl8192cu_parse_efuse(struct rtl8xxxu_priv * priv)404 static int rtl8192cu_parse_efuse(struct rtl8xxxu_priv *priv)
405 {
406 	struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192;
407 
408 	if (efuse->rtl_id != cpu_to_le16(0x8129))
409 		return -EINVAL;
410 
411 	ether_addr_copy(priv->mac_addr, efuse->mac_addr);
412 
413 	memcpy(priv->cck_tx_power_index_A,
414 	       efuse->cck_tx_power_index_A,
415 	       sizeof(efuse->cck_tx_power_index_A));
416 	memcpy(priv->cck_tx_power_index_B,
417 	       efuse->cck_tx_power_index_B,
418 	       sizeof(efuse->cck_tx_power_index_B));
419 
420 	memcpy(priv->ht40_1s_tx_power_index_A,
421 	       efuse->ht40_1s_tx_power_index_A,
422 	       sizeof(efuse->ht40_1s_tx_power_index_A));
423 	memcpy(priv->ht40_1s_tx_power_index_B,
424 	       efuse->ht40_1s_tx_power_index_B,
425 	       sizeof(efuse->ht40_1s_tx_power_index_B));
426 	memcpy(priv->ht40_2s_tx_power_index_diff,
427 	       efuse->ht40_2s_tx_power_index_diff,
428 	       sizeof(efuse->ht40_2s_tx_power_index_diff));
429 
430 	memcpy(priv->ht20_tx_power_index_diff,
431 	       efuse->ht20_tx_power_index_diff,
432 	       sizeof(efuse->ht20_tx_power_index_diff));
433 	memcpy(priv->ofdm_tx_power_index_diff,
434 	       efuse->ofdm_tx_power_index_diff,
435 	       sizeof(efuse->ofdm_tx_power_index_diff));
436 
437 	memcpy(priv->ht40_max_power_offset,
438 	       efuse->ht40_max_power_offset,
439 	       sizeof(efuse->ht40_max_power_offset));
440 	memcpy(priv->ht20_max_power_offset,
441 	       efuse->ht20_max_power_offset,
442 	       sizeof(efuse->ht20_max_power_offset));
443 
444 	priv->power_base = &rtl8192c_power_base;
445 
446 	if (efuse->rf_regulatory & 0x20) {
447 		strscpy(priv->chip_name, "8188RU", sizeof(priv->chip_name));
448 		priv->rtl_chip = RTL8188R;
449 		priv->hi_pa = 1;
450 		priv->no_pape = 1;
451 		priv->power_base = &rtl8188r_power_base;
452 	}
453 
454 	return 0;
455 }
456 
rtl8192cu_init_phy_rf(struct rtl8xxxu_priv * priv)457 static int rtl8192cu_init_phy_rf(struct rtl8xxxu_priv *priv)
458 {
459 	const struct rtl8xxxu_rfregval *rftable;
460 	int ret;
461 
462 	if (priv->rtl_chip == RTL8188R) {
463 		rftable = rtl8188ru_radioa_1t_highpa_table;
464 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
465 	} else if (priv->rf_paths == 1) {
466 		rftable = rtl8192cu_radioa_1t_init_table;
467 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
468 	} else {
469 		rftable = rtl8192cu_radioa_2t_init_table;
470 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A);
471 		if (ret)
472 			goto exit;
473 		rftable = rtl8192cu_radiob_2t_init_table;
474 		ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_B);
475 	}
476 
477 exit:
478 	return ret;
479 }
480 
rtl8192cu_power_on(struct rtl8xxxu_priv * priv)481 static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv)
482 {
483 	u8 val8;
484 	u16 val16;
485 	u32 val32;
486 	int i;
487 
488 	for (i = 100; i; i--) {
489 		val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO);
490 		if (val8 & APS_FSMCO_PFM_ALDN)
491 			break;
492 	}
493 
494 	if (!i) {
495 		pr_info("%s: Poll failed\n", __func__);
496 		return -ENODEV;
497 	}
498 
499 	/*
500 	 * RSV_CTRL 0x001C[7:0] = 0x00, unlock ISO/CLK/Power control register
501 	 */
502 	rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0);
503 	rtl8xxxu_write8(priv, REG_SPS0_CTRL, 0x2b);
504 	udelay(100);
505 
506 	val8 = rtl8xxxu_read8(priv, REG_LDOV12D_CTRL);
507 	if (!(val8 & LDOV12D_ENABLE)) {
508 		pr_info("%s: Enabling LDOV12D (%02x)\n", __func__, val8);
509 		val8 |= LDOV12D_ENABLE;
510 		rtl8xxxu_write8(priv, REG_LDOV12D_CTRL, val8);
511 
512 		udelay(100);
513 
514 		val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL);
515 		val8 &= ~SYS_ISO_MD2PP;
516 		rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8);
517 	}
518 
519 	/*
520 	 * Auto enable WLAN
521 	 */
522 	val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
523 	val16 |= APS_FSMCO_MAC_ENABLE;
524 	rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
525 
526 	for (i = 1000; i; i--) {
527 		val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
528 		if (!(val16 & APS_FSMCO_MAC_ENABLE))
529 			break;
530 	}
531 	if (!i) {
532 		pr_info("%s: FSMCO_MAC_ENABLE poll failed\n", __func__);
533 		return -EBUSY;
534 	}
535 
536 	/*
537 	 * Enable radio, GPIO, LED
538 	 */
539 	val16 = APS_FSMCO_HW_SUSPEND | APS_FSMCO_ENABLE_POWERDOWN |
540 		APS_FSMCO_PFM_ALDN;
541 	rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
542 
543 	/*
544 	 * Release RF digital isolation
545 	 */
546 	val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL);
547 	val16 &= ~SYS_ISO_DIOR;
548 	rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16);
549 
550 	val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
551 	val8 &= ~APSD_CTRL_OFF;
552 	rtl8xxxu_write8(priv, REG_APSD_CTRL, val8);
553 	for (i = 200; i; i--) {
554 		val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL);
555 		if (!(val8 & APSD_CTRL_OFF_STATUS))
556 			break;
557 	}
558 
559 	if (!i) {
560 		pr_info("%s: APSD_CTRL poll failed\n", __func__);
561 		return -EBUSY;
562 	}
563 
564 	/*
565 	 * Enable MAC DMA/WMAC/SCHEDULE/SEC block
566 	 */
567 	val16 = rtl8xxxu_read16(priv, REG_CR);
568 	val16 |= CR_HCI_TXDMA_ENABLE | CR_HCI_RXDMA_ENABLE |
569 		CR_TXDMA_ENABLE | CR_RXDMA_ENABLE | CR_PROTOCOL_ENABLE |
570 		CR_SCHEDULE_ENABLE | CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE;
571 	rtl8xxxu_write16(priv, REG_CR, val16);
572 
573 	rtl8xxxu_write8(priv, 0xfe10, 0x19);
574 
575 	/*
576 	 * Workaround for 8188RU LNA power leakage problem.
577 	 */
578 	if (priv->rtl_chip == RTL8188R) {
579 		val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM);
580 		val32 &= ~BIT(1);
581 		rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32);
582 	}
583 	return 0;
584 }
585 
586 struct rtl8xxxu_fileops rtl8192cu_fops = {
587 	.identify_chip = rtl8192cu_identify_chip,
588 	.parse_efuse = rtl8192cu_parse_efuse,
589 	.load_firmware = rtl8192cu_load_firmware,
590 	.power_on = rtl8192cu_power_on,
591 	.power_off = rtl8xxxu_power_off,
592 	.read_efuse = rtl8xxxu_read_efuse,
593 	.reset_8051 = rtl8xxxu_reset_8051,
594 	.llt_init = rtl8xxxu_init_llt_table,
595 	.init_phy_bb = rtl8xxxu_gen1_init_phy_bb,
596 	.init_phy_rf = rtl8192cu_init_phy_rf,
597 	.phy_lc_calibrate = rtl8723a_phy_lc_calibrate,
598 	.phy_iq_calibrate = rtl8xxxu_gen1_phy_iq_calibrate,
599 	.config_channel = rtl8xxxu_gen1_config_channel,
600 	.parse_rx_desc = rtl8xxxu_parse_rxdesc16,
601 	.parse_phystats = rtl8723au_rx_parse_phystats,
602 	.init_aggregation = rtl8xxxu_gen1_init_aggregation,
603 	.enable_rf = rtl8xxxu_gen1_enable_rf,
604 	.disable_rf = rtl8xxxu_gen1_disable_rf,
605 	.usb_quirks = rtl8xxxu_gen1_usb_quirks,
606 	.set_tx_power = rtl8xxxu_gen1_set_tx_power,
607 	.update_rate_mask = rtl8xxxu_update_rate_mask,
608 	.report_connect = rtl8xxxu_gen1_report_connect,
609 	.report_rssi = rtl8xxxu_gen1_report_rssi,
610 	.fill_txdesc = rtl8xxxu_fill_txdesc_v1,
611 	.cck_rssi = rtl8723a_cck_rssi,
612 	.writeN_block_size = 128,
613 	.rx_agg_buf_size = 16000,
614 	.tx_desc_size = sizeof(struct rtl8xxxu_txdesc32),
615 	.rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16),
616 	.adda_1t_init = 0x0b1b25a0,
617 	.adda_1t_path_on = 0x0bdb25a0,
618 	.adda_2t_path_on_a = 0x04db25a4,
619 	.adda_2t_path_on_b = 0x0b1b25a4,
620 	.trxff_boundary = 0x27ff,
621 	.pbp_rx = PBP_PAGE_SIZE_128,
622 	.pbp_tx = PBP_PAGE_SIZE_128,
623 	.mactable = rtl8xxxu_gen1_mac_init_table,
624 	.total_page_num = TX_TOTAL_PAGE_NUM,
625 	.page_num_hi = TX_PAGE_NUM_HI_PQ,
626 	.page_num_lo = TX_PAGE_NUM_LO_PQ,
627 	.page_num_norm = TX_PAGE_NUM_NORM_PQ,
628 };
629 #endif
630