1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt722-sdca-sdw.c -- rt722 SDCA ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8 
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/soundwire/sdw_registers.h>
15 
16 #include "rt722-sdca.h"
17 #include "rt722-sdca-sdw.h"
18 
rt722_sdca_readable_register(struct device * dev,unsigned int reg)19 static bool rt722_sdca_readable_register(struct device *dev, unsigned int reg)
20 {
21 	switch (reg) {
22 	case 0x2f01 ... 0x2f0a:
23 	case 0x2f35 ... 0x2f36:
24 	case 0x2f50:
25 	case 0x2f54:
26 	case 0x2f58 ... 0x2f5d:
27 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_SELECTED_MODE,
28 			0):
29 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
30 			0):
31 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
32 			0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
33 			RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
34 	case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
35 		return true;
36 	default:
37 		return false;
38 	}
39 }
40 
rt722_sdca_volatile_register(struct device * dev,unsigned int reg)41 static bool rt722_sdca_volatile_register(struct device *dev, unsigned int reg)
42 {
43 	switch (reg) {
44 	case 0x2f01:
45 	case 0x2f54:
46 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_GE49, RT722_SDCA_CTL_DETECTED_MODE,
47 			0):
48 	case SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01, RT722_SDCA_CTL_HIDTX_CURRENT_OWNER,
49 			0) ... SDW_SDCA_CTL(FUNC_NUM_HID, RT722_SDCA_ENT_HID01,
50 			RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
51 	case RT722_BUF_ADDR_HID1 ... RT722_BUF_ADDR_HID2:
52 		return true;
53 	default:
54 		return false;
55 	}
56 }
57 
rt722_sdca_mbq_readable_register(struct device * dev,unsigned int reg)58 static bool rt722_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
59 {
60 	switch (reg) {
61 	case 0x2000000 ... 0x2000024:
62 	case 0x2000029 ... 0x200004a:
63 	case 0x2000051 ... 0x2000052:
64 	case 0x200005a ... 0x200005b:
65 	case 0x2000061 ... 0x2000069:
66 	case 0x200006b:
67 	case 0x2000070:
68 	case 0x200007f:
69 	case 0x2000082 ... 0x200008e:
70 	case 0x2000090 ... 0x2000094:
71 	case 0x3110000:
72 	case 0x5300000 ... 0x5300002:
73 	case 0x5400002:
74 	case 0x5600000 ... 0x5600007:
75 	case 0x5700000 ... 0x5700004:
76 	case 0x5800000 ... 0x5800004:
77 	case 0x5b00003:
78 	case 0x5c00011:
79 	case 0x5d00006:
80 	case 0x5f00000 ... 0x5f0000d:
81 	case 0x5f00030:
82 	case 0x6100000 ... 0x6100051:
83 	case 0x6100055 ... 0x6100057:
84 	case 0x6100062:
85 	case 0x6100064 ... 0x6100065:
86 	case 0x6100067:
87 	case 0x6100070 ... 0x610007c:
88 	case 0x6100080:
89 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
90 			CH_01):
91 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
92 			CH_02):
93 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
94 			CH_03):
95 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT722_SDCA_ENT_USER_FU1E, RT722_SDCA_CTL_FU_VOLUME,
96 			CH_04):
97 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_L):
98 	case SDW_SDCA_CTL(FUNC_NUM_AMP, RT722_SDCA_ENT_USER_FU06, RT722_SDCA_CTL_FU_VOLUME, CH_R):
99 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
100 			CH_L):
101 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU05, RT722_SDCA_CTL_FU_VOLUME,
102 			CH_R):
103 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
104 			CH_L):
105 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_USER_FU0F, RT722_SDCA_CTL_FU_VOLUME,
106 			CH_R):
107 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
108 			RT722_SDCA_CTL_FU_CH_GAIN, CH_L):
109 	case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT722_SDCA_ENT_PLATFORM_FU44,
110 			RT722_SDCA_CTL_FU_CH_GAIN, CH_R):
111 		return true;
112 	default:
113 		return false;
114 	}
115 }
116 
rt722_sdca_mbq_volatile_register(struct device * dev,unsigned int reg)117 static bool rt722_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
118 {
119 	switch (reg) {
120 	case 0x2000000:
121 	case 0x200000d:
122 	case 0x2000019:
123 	case 0x2000020:
124 	case 0x2000030:
125 	case 0x2000046:
126 	case 0x2000067:
127 	case 0x2000084:
128 	case 0x2000086:
129 	case 0x3110000:
130 		return true;
131 	default:
132 		return false;
133 	}
134 }
135 
136 static const struct regmap_config rt722_sdca_regmap = {
137 	.reg_bits = 32,
138 	.val_bits = 8,
139 	.readable_reg = rt722_sdca_readable_register,
140 	.volatile_reg = rt722_sdca_volatile_register,
141 	.max_register = 0x44ffffff,
142 	.reg_defaults = rt722_sdca_reg_defaults,
143 	.num_reg_defaults = ARRAY_SIZE(rt722_sdca_reg_defaults),
144 	.cache_type = REGCACHE_MAPLE,
145 	.use_single_read = true,
146 	.use_single_write = true,
147 };
148 
149 static const struct regmap_config rt722_sdca_mbq_regmap = {
150 	.name = "sdw-mbq",
151 	.reg_bits = 32,
152 	.val_bits = 16,
153 	.readable_reg = rt722_sdca_mbq_readable_register,
154 	.volatile_reg = rt722_sdca_mbq_volatile_register,
155 	.max_register = 0x41000312,
156 	.reg_defaults = rt722_sdca_mbq_defaults,
157 	.num_reg_defaults = ARRAY_SIZE(rt722_sdca_mbq_defaults),
158 	.cache_type = REGCACHE_MAPLE,
159 	.use_single_read = true,
160 	.use_single_write = true,
161 };
162 
rt722_sdca_update_status(struct sdw_slave * slave,enum sdw_slave_status status)163 static int rt722_sdca_update_status(struct sdw_slave *slave,
164 				enum sdw_slave_status status)
165 {
166 	struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
167 
168 	if (status == SDW_SLAVE_UNATTACHED)
169 		rt722->hw_init = false;
170 
171 	if (status == SDW_SLAVE_ATTACHED) {
172 		if (rt722->hs_jack) {
173 		/*
174 		 * Due to the SCP_SDCA_INTMASK will be cleared by any reset, and then
175 		 * if the device attached again, we will need to set the setting back.
176 		 * It could avoid losing the jack detection interrupt.
177 		 * This also could sync with the cache value as the rt722_sdca_jack_init set.
178 		 */
179 			sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK1,
180 				SDW_SCP_SDCA_INTMASK_SDCA_6);
181 			sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INTMASK2,
182 				SDW_SCP_SDCA_INTMASK_SDCA_8);
183 		}
184 	}
185 
186 	/*
187 	 * Perform initialization only if slave status is present and
188 	 * hw_init flag is false
189 	 */
190 	if (rt722->hw_init || status != SDW_SLAVE_ATTACHED)
191 		return 0;
192 
193 	/* perform I/O transfers required for Slave initialization */
194 	return rt722_sdca_io_init(&slave->dev, slave);
195 }
196 
rt722_sdca_read_prop(struct sdw_slave * slave)197 static int rt722_sdca_read_prop(struct sdw_slave *slave)
198 {
199 	struct sdw_slave_prop *prop = &slave->prop;
200 	int nval;
201 	int i, j;
202 	u32 bit;
203 	unsigned long addr;
204 	struct sdw_dpn_prop *dpn;
205 
206 	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
207 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
208 
209 	prop->paging_support = true;
210 
211 	/*
212 	 * port = 1 for headphone playback
213 	 * port = 2 for headset-mic capture
214 	 * port = 3 for speaker playback
215 	 * port = 6 for digital-mic capture
216 	 */
217 	prop->source_ports = BIT(6) | BIT(2); /* BITMAP: 01000100 */
218 	prop->sink_ports = BIT(3) | BIT(1); /* BITMAP:  00001010 */
219 
220 	nval = hweight32(prop->source_ports);
221 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
222 		sizeof(*prop->src_dpn_prop), GFP_KERNEL);
223 	if (!prop->src_dpn_prop)
224 		return -ENOMEM;
225 
226 	i = 0;
227 	dpn = prop->src_dpn_prop;
228 	addr = prop->source_ports;
229 	for_each_set_bit(bit, &addr, 32) {
230 		dpn[i].num = bit;
231 		dpn[i].type = SDW_DPN_FULL;
232 		dpn[i].simple_ch_prep_sm = true;
233 		dpn[i].ch_prep_timeout = 10;
234 		i++;
235 	}
236 
237 	/* do this again for sink now */
238 	nval = hweight32(prop->sink_ports);
239 	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
240 		sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
241 	if (!prop->sink_dpn_prop)
242 		return -ENOMEM;
243 
244 	j = 0;
245 	dpn = prop->sink_dpn_prop;
246 	addr = prop->sink_ports;
247 	for_each_set_bit(bit, &addr, 32) {
248 		dpn[j].num = bit;
249 		dpn[j].type = SDW_DPN_FULL;
250 		dpn[j].simple_ch_prep_sm = true;
251 		dpn[j].ch_prep_timeout = 10;
252 		j++;
253 	}
254 
255 	/* set the timeout values */
256 	prop->clk_stop_timeout = 900;
257 
258 	/* wake-up event */
259 	prop->wake_capable = 1;
260 
261 	return 0;
262 }
263 
rt722_sdca_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)264 static int rt722_sdca_interrupt_callback(struct sdw_slave *slave,
265 					struct sdw_slave_intr_status *status)
266 {
267 	struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
268 	int ret, stat;
269 	int count = 0, retry = 3;
270 	unsigned int sdca_cascade, scp_sdca_stat1, scp_sdca_stat2 = 0;
271 
272 	if (cancel_delayed_work_sync(&rt722->jack_detect_work)) {
273 		dev_warn(&slave->dev, "%s the pending delayed_work was cancelled", __func__);
274 		/* avoid the HID owner doesn't change to device */
275 		if (rt722->scp_sdca_stat2)
276 			scp_sdca_stat2 = rt722->scp_sdca_stat2;
277 	}
278 
279 	/*
280 	 * The critical section below intentionally protects a rather large piece of code.
281 	 * We don't want to allow the system suspend to disable an interrupt while we are
282 	 * processing it, which could be problematic given the quirky SoundWire interrupt
283 	 * scheme. We do want however to prevent new workqueues from being scheduled if
284 	 * the disable_irq flag was set during system suspend.
285 	 */
286 	mutex_lock(&rt722->disable_irq_lock);
287 
288 	ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
289 	if (ret < 0)
290 		goto io_error;
291 	rt722->scp_sdca_stat1 = ret;
292 	ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
293 	if (ret < 0)
294 		goto io_error;
295 	rt722->scp_sdca_stat2 = ret;
296 	if (scp_sdca_stat2)
297 		rt722->scp_sdca_stat2 |= scp_sdca_stat2;
298 	do {
299 		/* clear flag */
300 		ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
301 		if (ret < 0)
302 			goto io_error;
303 		if (ret & SDW_SCP_SDCA_INTMASK_SDCA_0) {
304 			ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
305 				SDW_SCP_SDCA_INT_SDCA_0, SDW_SCP_SDCA_INT_SDCA_0);
306 			if (ret < 0)
307 				goto io_error;
308 		} else if (ret & SDW_SCP_SDCA_INTMASK_SDCA_6) {
309 			ret = sdw_update_no_pm(rt722->slave, SDW_SCP_SDCA_INT1,
310 				SDW_SCP_SDCA_INT_SDCA_6, SDW_SCP_SDCA_INT_SDCA_6);
311 			if (ret < 0)
312 				goto io_error;
313 		}
314 		ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
315 		if (ret < 0)
316 			goto io_error;
317 		if (ret & SDW_SCP_SDCA_INTMASK_SDCA_8) {
318 			ret = sdw_write_no_pm(rt722->slave, SDW_SCP_SDCA_INT2,
319 						SDW_SCP_SDCA_INTMASK_SDCA_8);
320 			if (ret < 0)
321 				goto io_error;
322 		}
323 
324 		/* check if flag clear or not */
325 		ret = sdw_read_no_pm(rt722->slave, SDW_DP0_INT);
326 		if (ret < 0)
327 			goto io_error;
328 		sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
329 
330 		ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT1);
331 		if (ret < 0)
332 			goto io_error;
333 		scp_sdca_stat1 = ret & SDW_SCP_SDCA_INTMASK_SDCA_0;
334 
335 		ret = sdw_read_no_pm(rt722->slave, SDW_SCP_SDCA_INT2);
336 		if (ret < 0)
337 			goto io_error;
338 		scp_sdca_stat2 = ret & SDW_SCP_SDCA_INTMASK_SDCA_8;
339 
340 		stat = scp_sdca_stat1 || scp_sdca_stat2 || sdca_cascade;
341 
342 		count++;
343 	} while (stat != 0 && count < retry);
344 
345 	if (stat)
346 		dev_warn(&slave->dev,
347 			"%s scp_sdca_stat1=0x%x, scp_sdca_stat2=0x%x\n", __func__,
348 			rt722->scp_sdca_stat1, rt722->scp_sdca_stat2);
349 
350 	if (status->sdca_cascade && !rt722->disable_irq)
351 		mod_delayed_work(system_power_efficient_wq,
352 			&rt722->jack_detect_work, msecs_to_jiffies(280));
353 
354 	mutex_unlock(&rt722->disable_irq_lock);
355 
356 	return 0;
357 
358 io_error:
359 	mutex_unlock(&rt722->disable_irq_lock);
360 	pr_err_ratelimited("IO error in %s, ret %d\n", __func__, ret);
361 	return ret;
362 }
363 
364 static struct sdw_slave_ops rt722_sdca_slave_ops = {
365 	.read_prop = rt722_sdca_read_prop,
366 	.interrupt_callback = rt722_sdca_interrupt_callback,
367 	.update_status = rt722_sdca_update_status,
368 };
369 
rt722_sdca_sdw_probe(struct sdw_slave * slave,const struct sdw_device_id * id)370 static int rt722_sdca_sdw_probe(struct sdw_slave *slave,
371 				const struct sdw_device_id *id)
372 {
373 	struct regmap *regmap, *mbq_regmap;
374 
375 	/* Regmap Initialization */
376 	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt722_sdca_mbq_regmap);
377 	if (IS_ERR(mbq_regmap))
378 		return PTR_ERR(mbq_regmap);
379 
380 	regmap = devm_regmap_init_sdw(slave, &rt722_sdca_regmap);
381 	if (IS_ERR(regmap))
382 		return PTR_ERR(regmap);
383 
384 	return rt722_sdca_init(&slave->dev, regmap, mbq_regmap, slave);
385 }
386 
rt722_sdca_sdw_remove(struct sdw_slave * slave)387 static int rt722_sdca_sdw_remove(struct sdw_slave *slave)
388 {
389 	struct rt722_sdca_priv *rt722 = dev_get_drvdata(&slave->dev);
390 
391 	if (rt722->hw_init) {
392 		cancel_delayed_work_sync(&rt722->jack_detect_work);
393 		cancel_delayed_work_sync(&rt722->jack_btn_check_work);
394 	}
395 
396 	if (rt722->first_hw_init)
397 		pm_runtime_disable(&slave->dev);
398 
399 	mutex_destroy(&rt722->calibrate_mutex);
400 	mutex_destroy(&rt722->disable_irq_lock);
401 
402 	return 0;
403 }
404 
405 static const struct sdw_device_id rt722_sdca_id[] = {
406 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x722, 0x3, 0x1, 0),
407 	{},
408 };
409 MODULE_DEVICE_TABLE(sdw, rt722_sdca_id);
410 
rt722_sdca_dev_suspend(struct device * dev)411 static int __maybe_unused rt722_sdca_dev_suspend(struct device *dev)
412 {
413 	struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
414 
415 	if (!rt722->hw_init)
416 		return 0;
417 
418 	cancel_delayed_work_sync(&rt722->jack_detect_work);
419 	cancel_delayed_work_sync(&rt722->jack_btn_check_work);
420 
421 	regcache_cache_only(rt722->regmap, true);
422 	regcache_cache_only(rt722->mbq_regmap, true);
423 
424 	return 0;
425 }
426 
rt722_sdca_dev_system_suspend(struct device * dev)427 static int __maybe_unused rt722_sdca_dev_system_suspend(struct device *dev)
428 {
429 	struct rt722_sdca_priv *rt722_sdca = dev_get_drvdata(dev);
430 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
431 	int ret1, ret2;
432 
433 	if (!rt722_sdca->hw_init)
434 		return 0;
435 
436 	/*
437 	 * prevent new interrupts from being handled after the
438 	 * deferred work completes and before the parent disables
439 	 * interrupts on the link
440 	 */
441 	mutex_lock(&rt722_sdca->disable_irq_lock);
442 	rt722_sdca->disable_irq = true;
443 	ret1 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK1,
444 				SDW_SCP_SDCA_INTMASK_SDCA_0 | SDW_SCP_SDCA_INTMASK_SDCA_6, 0);
445 	ret2 = sdw_update_no_pm(slave, SDW_SCP_SDCA_INTMASK2,
446 				SDW_SCP_SDCA_INTMASK_SDCA_8, 0);
447 	mutex_unlock(&rt722_sdca->disable_irq_lock);
448 
449 	if (ret1 < 0 || ret2 < 0) {
450 		/* log but don't prevent suspend from happening */
451 		dev_dbg(&slave->dev, "%s: could not disable SDCA interrupts\n:", __func__);
452 	}
453 
454 	return rt722_sdca_dev_suspend(dev);
455 }
456 
457 #define RT722_PROBE_TIMEOUT 5000
458 
rt722_sdca_dev_resume(struct device * dev)459 static int __maybe_unused rt722_sdca_dev_resume(struct device *dev)
460 {
461 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
462 	struct rt722_sdca_priv *rt722 = dev_get_drvdata(dev);
463 	unsigned long time;
464 
465 	if (!rt722->first_hw_init)
466 		return 0;
467 
468 	if (!slave->unattach_request) {
469 		mutex_lock(&rt722->disable_irq_lock);
470 		if (rt722->disable_irq == true) {
471 			sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK1, SDW_SCP_SDCA_INTMASK_SDCA_6);
472 			sdw_write_no_pm(slave, SDW_SCP_SDCA_INTMASK2, SDW_SCP_SDCA_INTMASK_SDCA_8);
473 			rt722->disable_irq = false;
474 		}
475 		mutex_unlock(&rt722->disable_irq_lock);
476 		goto regmap_sync;
477 	}
478 
479 	time = wait_for_completion_timeout(&slave->initialization_complete,
480 				msecs_to_jiffies(RT722_PROBE_TIMEOUT));
481 	if (!time) {
482 		dev_err(&slave->dev, "Initialization not complete, timed out\n");
483 		sdw_show_ping_status(slave->bus, true);
484 
485 		return -ETIMEDOUT;
486 	}
487 
488 regmap_sync:
489 	slave->unattach_request = 0;
490 	regcache_cache_only(rt722->regmap, false);
491 	regcache_sync(rt722->regmap);
492 	regcache_cache_only(rt722->mbq_regmap, false);
493 	regcache_sync(rt722->mbq_regmap);
494 	return 0;
495 }
496 
497 static const struct dev_pm_ops rt722_sdca_pm = {
498 	SET_SYSTEM_SLEEP_PM_OPS(rt722_sdca_dev_system_suspend, rt722_sdca_dev_resume)
499 	SET_RUNTIME_PM_OPS(rt722_sdca_dev_suspend, rt722_sdca_dev_resume, NULL)
500 };
501 
502 static struct sdw_driver rt722_sdca_sdw_driver = {
503 	.driver = {
504 		.name = "rt722-sdca",
505 		.owner = THIS_MODULE,
506 		.pm = &rt722_sdca_pm,
507 	},
508 	.probe = rt722_sdca_sdw_probe,
509 	.remove = rt722_sdca_sdw_remove,
510 	.ops = &rt722_sdca_slave_ops,
511 	.id_table = rt722_sdca_id,
512 };
513 module_sdw_driver(rt722_sdca_sdw_driver);
514 
515 MODULE_DESCRIPTION("ASoC RT722 SDCA SDW driver");
516 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
517 MODULE_LICENSE("GPL");
518