1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
4 *
5 * RISC-V privileged architecture defined generic timer driver
6 *
7 * This driver relies on RISC-V platform codes to provide the essential API
8 * riscv_get_time() which is supposed to return the timer counter as defined
9 * by the RISC-V privileged architecture spec.
10 *
11 * This driver can be used in both M-mode and S-mode U-Boot.
12 */
13
14 #include <common.h>
15 #include <dm.h>
16 #include <errno.h>
17 #include <timer.h>
18 #include <asm/io.h>
19
20 /**
21 * riscv_get_time() - get the timer counter
22 *
23 * Platform codes should provide this API in order to make this driver function.
24 *
25 * @time: the 64-bit timer count as defined by the RISC-V privileged
26 * architecture spec.
27 * @return: 0 on success, -ve on error.
28 */
29 extern int riscv_get_time(u64 *time);
30
riscv_timer_get_count(struct udevice * dev,u64 * count)31 static int riscv_timer_get_count(struct udevice *dev, u64 *count)
32 {
33 return riscv_get_time(count);
34 }
35
riscv_timer_probe(struct udevice * dev)36 static int riscv_timer_probe(struct udevice *dev)
37 {
38 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
39
40 /* clock frequency was passed from the cpu driver as driver data */
41 uc_priv->clock_rate = dev->driver_data;
42
43 return 0;
44 }
45
46 static const struct timer_ops riscv_timer_ops = {
47 .get_count = riscv_timer_get_count,
48 };
49
50 U_BOOT_DRIVER(riscv_timer) = {
51 .name = "riscv_timer",
52 .id = UCLASS_TIMER,
53 .probe = riscv_timer_probe,
54 .ops = &riscv_timer_ops,
55 .flags = DM_FLAG_PRE_RELOC,
56 };
57