xref: /openbmc/linux/arch/mips/txx9/rbtx4927/setup.c (revision 21cff2d9)
1 /*
2  * Toshiba rbtx4927 specific setup
3  *
4  * Author: MontaVista Software, Inc.
5  *	   source@mvista.com
6  *
7  * Copyright 2001-2002 MontaVista Software Inc.
8  *
9  * Copyright (C) 1996, 97, 2001, 04  Ralf Baechle (ralf@linux-mips.org)
10  * Copyright (C) 2000 RidgeRun, Inc.
11  * Author: RidgeRun, Inc.
12  *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
13  *
14  * Copyright 2001 MontaVista Software Inc.
15  * Author: jsun@mvista.com or jsun@junsun.net
16  *
17  * Copyright 2002 MontaVista Software Inc.
18  * Author: Michael Pruznick, michael_pruznick@mvista.com
19  *
20  * Copyright (C) 2000-2001 Toshiba Corporation
21  *
22  * Copyright (C) 2004 MontaVista Software Inc.
23  * Author: Manish Lachwani, mlachwani@mvista.com
24  *
25  *  This program is free software; you can redistribute it and/or modify it
26  *  under the terms of the GNU General Public License as published by the
27  *  Free Software Foundation; either version 2 of the License, or (at your
28  *  option) any later version.
29  *
30  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
31  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
32  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
33  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
34  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
36  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
38  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
39  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40  *
41  *  You should have received a copy of the GNU General Public License along
42  *  with this program; if not, write to the Free Software Foundation, Inc.,
43  *  675 Mass Ave, Cambridge, MA 02139, USA.
44  */
45 #include <linux/init.h>
46 #include <linux/kernel.h>
47 #include <linux/types.h>
48 #include <linux/ioport.h>
49 #include <linux/platform_device.h>
50 #include <linux/delay.h>
51 #include <linux/gpio.h>
52 #include <linux/leds.h>
53 #include <asm/io.h>
54 #include <asm/reboot.h>
55 #include <asm/txx9pio.h>
56 #include <asm/txx9/generic.h>
57 #include <asm/txx9/pci.h>
58 #include <asm/txx9/rbtx4927.h>
59 #include <asm/txx9/tx4938.h>	/* for TX4937 */
60 
61 #ifdef CONFIG_PCI
tx4927_pci_setup(void)62 static void __init tx4927_pci_setup(void)
63 {
64 	int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
65 	struct pci_controller *c = &txx9_primary_pcic;
66 
67 	register_pci_controller(c);
68 
69 	if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
70 		txx9_pci_option =
71 			(txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
72 			TXX9_PCI_OPT_CLK_66; /* already configured */
73 
74 	/* Reset PCI Bus */
75 	writeb(1, rbtx4927_pcireset_addr);
76 	/* Reset PCIC */
77 	txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
78 	if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
79 	    TXX9_PCI_OPT_CLK_66)
80 		tx4927_pciclk66_setup();
81 	mdelay(10);
82 	/* clear PCIC reset */
83 	txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
84 	writeb(0, rbtx4927_pcireset_addr);
85 	iob();
86 
87 	tx4927_report_pciclk();
88 	tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
89 	if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
90 	    TXX9_PCI_OPT_CLK_AUTO &&
91 	    txx9_pci66_check(c, 0, 0)) {
92 		/* Reset PCI Bus */
93 		writeb(1, rbtx4927_pcireset_addr);
94 		/* Reset PCIC */
95 		txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
96 		tx4927_pciclk66_setup();
97 		mdelay(10);
98 		/* clear PCIC reset */
99 		txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
100 		writeb(0, rbtx4927_pcireset_addr);
101 		iob();
102 		/* Reinitialize PCIC */
103 		tx4927_report_pciclk();
104 		tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
105 	}
106 	tx4927_setup_pcierr_irq();
107 }
108 
tx4937_pci_setup(void)109 static void __init tx4937_pci_setup(void)
110 {
111 	int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
112 	struct pci_controller *c = &txx9_primary_pcic;
113 
114 	register_pci_controller(c);
115 
116 	if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
117 		txx9_pci_option =
118 			(txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
119 			TXX9_PCI_OPT_CLK_66; /* already configured */
120 
121 	/* Reset PCI Bus */
122 	writeb(1, rbtx4927_pcireset_addr);
123 	/* Reset PCIC */
124 	txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
125 	if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
126 	    TXX9_PCI_OPT_CLK_66)
127 		tx4938_pciclk66_setup();
128 	mdelay(10);
129 	/* clear PCIC reset */
130 	txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
131 	writeb(0, rbtx4927_pcireset_addr);
132 	iob();
133 
134 	tx4938_report_pciclk();
135 	tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
136 	if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
137 	    TXX9_PCI_OPT_CLK_AUTO &&
138 	    txx9_pci66_check(c, 0, 0)) {
139 		/* Reset PCI Bus */
140 		writeb(1, rbtx4927_pcireset_addr);
141 		/* Reset PCIC */
142 		txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
143 		tx4938_pciclk66_setup();
144 		mdelay(10);
145 		/* clear PCIC reset */
146 		txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
147 		writeb(0, rbtx4927_pcireset_addr);
148 		iob();
149 		/* Reinitialize PCIC */
150 		tx4938_report_pciclk();
151 		tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
152 	}
153 	tx4938_setup_pcierr_irq();
154 }
155 #else
tx4927_pci_setup(void)156 static inline void tx4927_pci_setup(void) {}
tx4937_pci_setup(void)157 static inline void tx4937_pci_setup(void) {}
158 #endif /* CONFIG_PCI */
159 
rbtx4927_gpio_init(void)160 static void __init rbtx4927_gpio_init(void)
161 {
162 	/* TX4927-SIO DTR on (PIO[15]) */
163 	gpio_request(15, "sio-dtr");
164 	gpio_direction_output(15, 1);
165 
166 	tx4927_sio_init(0, 0);
167 }
168 
rbtx4927_arch_init(void)169 static void __init rbtx4927_arch_init(void)
170 {
171 	txx9_gpio_init(TX4927_PIO_REG & 0xfffffffffULL, 0, TX4927_NUM_PIO);
172 
173 	rbtx4927_gpio_init();
174 
175 	tx4927_pci_setup();
176 }
177 
rbtx4937_arch_init(void)178 static void __init rbtx4937_arch_init(void)
179 {
180 	txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, TX4938_NUM_PIO);
181 
182 	rbtx4927_gpio_init();
183 
184 	tx4937_pci_setup();
185 }
186 
toshiba_rbtx4927_restart(char * command)187 static void toshiba_rbtx4927_restart(char *command)
188 {
189 	/* enable the s/w reset register */
190 	writeb(1, rbtx4927_softresetlock_addr);
191 
192 	/* wait for enable to be seen */
193 	while (!(readb(rbtx4927_softresetlock_addr) & 1))
194 		;
195 
196 	/* do a s/w reset */
197 	writeb(1, rbtx4927_softreset_addr);
198 
199 	/* fallback */
200 	(*_machine_halt)();
201 }
202 
203 static void __init rbtx4927_clock_init(void);
204 static void __init rbtx4937_clock_init(void);
205 
rbtx4927_mem_setup(void)206 static void __init rbtx4927_mem_setup(void)
207 {
208 	if (TX4927_REV_PCODE() == 0x4927) {
209 		rbtx4927_clock_init();
210 		tx4927_setup();
211 	} else {
212 		rbtx4937_clock_init();
213 		tx4938_setup();
214 	}
215 
216 	_machine_restart = toshiba_rbtx4927_restart;
217 
218 #ifdef CONFIG_PCI
219 	txx9_alloc_pci_controller(&txx9_primary_pcic,
220 				  RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
221 				  RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
222 	txx9_board_pcibios_setup = tx4927_pcibios_setup;
223 #else
224 	set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
225 #endif
226 }
227 
rbtx4927_clock_init(void)228 static void __init rbtx4927_clock_init(void)
229 {
230 	/*
231 	 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
232 	 *
233 	 * For TX4927:
234 	 * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
235 	 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
236 	 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
237 	 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
238 	 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
239 	 * i.e. S9[3]: ON (83MHz), OFF (100MHz)
240 	 */
241 	switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
242 		TX4927_CCFG_PCIDIVMODE_MASK) {
243 	case TX4927_CCFG_PCIDIVMODE_2_5:
244 	case TX4927_CCFG_PCIDIVMODE_5:
245 		txx9_cpu_clock = 166666666;	/* 166MHz */
246 		break;
247 	default:
248 		txx9_cpu_clock = 200000000;	/* 200MHz */
249 	}
250 }
251 
rbtx4937_clock_init(void)252 static void __init rbtx4937_clock_init(void)
253 {
254 	/*
255 	 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
256 	 *
257 	 * For TX4937:
258 	 * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
259 	 * PCIDIVMODE[10] is 0.
260 	 * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
261 	 * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
262 	 * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
263 	 * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
264 	 * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
265 	 * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
266 	 */
267 	switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
268 		TX4938_CCFG_PCIDIVMODE_MASK) {
269 	case TX4938_CCFG_PCIDIVMODE_8:
270 	case TX4938_CCFG_PCIDIVMODE_4:
271 		txx9_cpu_clock = 266666666;	/* 266MHz */
272 		break;
273 	case TX4938_CCFG_PCIDIVMODE_9:
274 	case TX4938_CCFG_PCIDIVMODE_4_5:
275 		txx9_cpu_clock = 300000000;	/* 300MHz */
276 		break;
277 	default:
278 		txx9_cpu_clock = 333333333;	/* 333MHz */
279 	}
280 }
281 
rbtx4927_time_init(void)282 static void __init rbtx4927_time_init(void)
283 {
284 	tx4927_time_init(0);
285 }
286 
toshiba_rbtx4927_rtc_init(void)287 static void __init toshiba_rbtx4927_rtc_init(void)
288 {
289 	struct resource res = {
290 		.start	= RBTX4927_BRAMRTC_BASE - IO_BASE,
291 		.end	= RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
292 		.flags	= IORESOURCE_MEM,
293 	};
294 	platform_device_register_simple("rtc-ds1742", -1, &res, 1);
295 }
296 
rbtx4927_ne_init(void)297 static void __init rbtx4927_ne_init(void)
298 {
299 	struct resource res[] = {
300 		{
301 			.start	= RBTX4927_RTL_8019_BASE,
302 			.end	= RBTX4927_RTL_8019_BASE + 0x20 - 1,
303 			.flags	= IORESOURCE_IO,
304 		}, {
305 			.start	= RBTX4927_RTL_8019_IRQ,
306 			.flags	= IORESOURCE_IRQ,
307 		}
308 	};
309 	platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
310 }
311 
rbtx4927_mtd_init(void)312 static void __init rbtx4927_mtd_init(void)
313 {
314 	int i;
315 
316 	for (i = 0; i < 2; i++)
317 		tx4927_mtd_init(i);
318 }
319 
rbtx4927_gpioled_init(void)320 static void __init rbtx4927_gpioled_init(void)
321 {
322 	static const struct gpio_led leds[] = {
323 		{ .name = "gpioled:green:0", .gpio = 0, .active_low = 1, },
324 		{ .name = "gpioled:green:1", .gpio = 1, .active_low = 1, },
325 	};
326 	static struct gpio_led_platform_data pdata = {
327 		.num_leds = ARRAY_SIZE(leds),
328 		.leds = leds,
329 	};
330 	struct platform_device *pdev = platform_device_alloc("leds-gpio", 0);
331 
332 	if (!pdev)
333 		return;
334 	pdev->dev.platform_data = &pdata;
335 	if (platform_device_add(pdev))
336 		platform_device_put(pdev);
337 }
338 
rbtx4927_device_init(void)339 static void __init rbtx4927_device_init(void)
340 {
341 	toshiba_rbtx4927_rtc_init();
342 	rbtx4927_ne_init();
343 	tx4927_wdt_init();
344 	rbtx4927_mtd_init();
345 	if (TX4927_REV_PCODE() == 0x4927) {
346 		tx4927_dmac_init(2);
347 		tx4927_aclc_init(0, 1);
348 	} else {
349 		tx4938_dmac_init(0, 2);
350 		tx4938_aclc_init();
351 	}
352 	platform_device_register_simple("txx9aclc-generic", -1, NULL, 0);
353 	txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL);
354 	rbtx4927_gpioled_init();
355 }
356 
357 struct txx9_board_vec rbtx4927_vec __initdata = {
358 	.system = "Toshiba RBTX4927",
359 	.prom_init = rbtx4927_prom_init,
360 	.mem_setup = rbtx4927_mem_setup,
361 	.irq_setup = rbtx4927_irq_setup,
362 	.time_init = rbtx4927_time_init,
363 	.device_init = rbtx4927_device_init,
364 	.arch_init = rbtx4927_arch_init,
365 #ifdef CONFIG_PCI
366 	.pci_map_irq = rbtx4927_pci_map_irq,
367 #endif
368 };
369 struct txx9_board_vec rbtx4937_vec __initdata = {
370 	.system = "Toshiba RBTX4937",
371 	.prom_init = rbtx4927_prom_init,
372 	.mem_setup = rbtx4927_mem_setup,
373 	.irq_setup = rbtx4927_irq_setup,
374 	.time_init = rbtx4927_time_init,
375 	.device_init = rbtx4927_device_init,
376 	.arch_init = rbtx4937_arch_init,
377 #ifdef CONFIG_PCI
378 	.pci_map_irq = rbtx4927_pci_map_irq,
379 #endif
380 };
381