xref: /openbmc/linux/include/linux/mmc/card.h (revision bb94f1ad)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  linux/include/linux/mmc/card.h
4  *
5  *  Card driver specific definitions.
6  */
7 #ifndef LINUX_MMC_CARD_H
8 #define LINUX_MMC_CARD_H
9 
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 
13 struct mmc_cid {
14 	unsigned int		manfid;
15 	char			prod_name[8];
16 	unsigned char		prv;
17 	unsigned int		serial;
18 	unsigned short		oemid;
19 	unsigned short		year;
20 	unsigned char		hwrev;
21 	unsigned char		fwrev;
22 	unsigned char		month;
23 };
24 
25 struct mmc_csd {
26 	unsigned char		structure;
27 	unsigned char		mmca_vsn;
28 	unsigned short		cmdclass;
29 	unsigned short		taac_clks;
30 	unsigned int		taac_ns;
31 	unsigned int		c_size;
32 	unsigned int		r2w_factor;
33 	unsigned int		max_dtr;
34 	unsigned int		erase_size;		/* In sectors */
35 	unsigned int		read_blkbits;
36 	unsigned int		write_blkbits;
37 	unsigned int		capacity;
38 	unsigned int		read_partial:1,
39 				read_misalign:1,
40 				write_partial:1,
41 				write_misalign:1,
42 				dsr_imp:1;
43 };
44 
45 struct mmc_ext_csd {
46 	u8			rev;
47 	u8			erase_group_def;
48 	u8			sec_feature_support;
49 	u8			rel_sectors;
50 	u8			rel_param;
51 	bool			enhanced_rpmb_supported;
52 	u8			part_config;
53 	u8			cache_ctrl;
54 	u8			rst_n_function;
55 	u8			max_packed_writes;
56 	u8			max_packed_reads;
57 	u8			packed_event_en;
58 	unsigned int		part_time;		/* Units: ms */
59 	unsigned int		sa_timeout;		/* Units: 100ns */
60 	unsigned int		generic_cmd6_time;	/* Units: 10ms */
61 	unsigned int            power_off_longtime;     /* Units: ms */
62 	u8			power_off_notification;	/* state */
63 	unsigned int		hs_max_dtr;
64 	unsigned int		hs200_max_dtr;
65 #define MMC_HIGH_26_MAX_DTR	26000000
66 #define MMC_HIGH_52_MAX_DTR	52000000
67 #define MMC_HIGH_DDR_MAX_DTR	52000000
68 #define MMC_HS200_MAX_DTR	200000000
69 	unsigned int		sectors;
70 	unsigned int		hc_erase_size;		/* In sectors */
71 	unsigned int		hc_erase_timeout;	/* In milliseconds */
72 	unsigned int		sec_trim_mult;	/* Secure trim multiplier  */
73 	unsigned int		sec_erase_mult;	/* Secure erase multiplier */
74 	unsigned int		trim_timeout;		/* In milliseconds */
75 	bool			partition_setting_completed;	/* enable bit */
76 	unsigned long long	enhanced_area_offset;	/* Units: Byte */
77 	unsigned int		enhanced_area_size;	/* Units: KB */
78 	unsigned int		cache_size;		/* Units: KB */
79 	bool			hpi_en;			/* HPI enablebit */
80 	bool			hpi;			/* HPI support bit */
81 	unsigned int		hpi_cmd;		/* cmd used as HPI */
82 	bool			bkops;		/* background support bit */
83 	bool			man_bkops_en;	/* manual bkops enable bit */
84 	bool			auto_bkops_en;	/* auto bkops enable bit */
85 	unsigned int            data_sector_size;       /* 512 bytes or 4KB */
86 	unsigned int            data_tag_unit_size;     /* DATA TAG UNIT size */
87 	unsigned int		boot_ro_lock;		/* ro lock support */
88 	bool			boot_ro_lockable;
89 	bool			ffu_capable;	/* Firmware upgrade support */
90 	bool			cmdq_en;	/* Command Queue enabled */
91 	bool			cmdq_support;	/* Command Queue supported */
92 	unsigned int		cmdq_depth;	/* Command Queue depth */
93 #define MMC_FIRMWARE_LEN 8
94 	u8			fwrev[MMC_FIRMWARE_LEN];  /* FW version */
95 	u8			raw_exception_status;	/* 54 */
96 	u8			raw_partition_support;	/* 160 */
97 	u8			raw_rpmb_size_mult;	/* 168 */
98 	u8			raw_erased_mem_count;	/* 181 */
99 	u8			strobe_support;		/* 184 */
100 	u8			raw_ext_csd_structure;	/* 194 */
101 	u8			raw_card_type;		/* 196 */
102 	u8			raw_driver_strength;	/* 197 */
103 	u8			out_of_int_time;	/* 198 */
104 	u8			raw_pwr_cl_52_195;	/* 200 */
105 	u8			raw_pwr_cl_26_195;	/* 201 */
106 	u8			raw_pwr_cl_52_360;	/* 202 */
107 	u8			raw_pwr_cl_26_360;	/* 203 */
108 	u8			raw_s_a_timeout;	/* 217 */
109 	u8			raw_hc_erase_gap_size;	/* 221 */
110 	u8			raw_erase_timeout_mult;	/* 223 */
111 	u8			raw_hc_erase_grp_size;	/* 224 */
112 	u8			raw_boot_mult;		/* 226 */
113 	u8			raw_sec_trim_mult;	/* 229 */
114 	u8			raw_sec_erase_mult;	/* 230 */
115 	u8			raw_sec_feature_support;/* 231 */
116 	u8			raw_trim_mult;		/* 232 */
117 	u8			raw_pwr_cl_200_195;	/* 236 */
118 	u8			raw_pwr_cl_200_360;	/* 237 */
119 	u8			raw_pwr_cl_ddr_52_195;	/* 238 */
120 	u8			raw_pwr_cl_ddr_52_360;	/* 239 */
121 	u8			raw_pwr_cl_ddr_200_360;	/* 253 */
122 	u8			raw_bkops_status;	/* 246 */
123 	u8			raw_sectors[4];		/* 212 - 4 bytes */
124 	u8			pre_eol_info;		/* 267 */
125 	u8			device_life_time_est_typ_a;	/* 268 */
126 	u8			device_life_time_est_typ_b;	/* 269 */
127 
128 	unsigned int            feature_support;
129 #define MMC_DISCARD_FEATURE	BIT(0)                  /* CMD38 feature */
130 };
131 
132 struct sd_scr {
133 	unsigned char		sda_vsn;
134 	unsigned char		sda_spec3;
135 	unsigned char		sda_spec4;
136 	unsigned char		sda_specx;
137 	unsigned char		bus_widths;
138 #define SD_SCR_BUS_WIDTH_1	(1<<0)
139 #define SD_SCR_BUS_WIDTH_4	(1<<2)
140 	unsigned char		cmds;
141 #define SD_SCR_CMD20_SUPPORT   (1<<0)
142 #define SD_SCR_CMD23_SUPPORT   (1<<1)
143 #define SD_SCR_CMD48_SUPPORT   (1<<2)
144 #define SD_SCR_CMD58_SUPPORT   (1<<3)
145 };
146 
147 struct sd_ssr {
148 	unsigned int		au;			/* In sectors */
149 	unsigned int		erase_timeout;		/* In milliseconds */
150 	unsigned int		erase_offset;		/* In milliseconds */
151 };
152 
153 struct sd_switch_caps {
154 	unsigned int		hs_max_dtr;
155 	unsigned int		uhs_max_dtr;
156 #define HIGH_SPEED_MAX_DTR	50000000
157 #define UHS_SDR104_MAX_DTR	208000000
158 #define UHS_SDR50_MAX_DTR	100000000
159 #define UHS_DDR50_MAX_DTR	50000000
160 #define UHS_SDR25_MAX_DTR	UHS_DDR50_MAX_DTR
161 #define UHS_SDR12_MAX_DTR	25000000
162 #define DEFAULT_SPEED_MAX_DTR	UHS_SDR12_MAX_DTR
163 	unsigned int		sd3_bus_mode;
164 #define UHS_SDR12_BUS_SPEED	0
165 #define HIGH_SPEED_BUS_SPEED	1
166 #define UHS_SDR25_BUS_SPEED	1
167 #define UHS_SDR50_BUS_SPEED	2
168 #define UHS_SDR104_BUS_SPEED	3
169 #define UHS_DDR50_BUS_SPEED	4
170 
171 #define SD_MODE_HIGH_SPEED	(1 << HIGH_SPEED_BUS_SPEED)
172 #define SD_MODE_UHS_SDR12	(1 << UHS_SDR12_BUS_SPEED)
173 #define SD_MODE_UHS_SDR25	(1 << UHS_SDR25_BUS_SPEED)
174 #define SD_MODE_UHS_SDR50	(1 << UHS_SDR50_BUS_SPEED)
175 #define SD_MODE_UHS_SDR104	(1 << UHS_SDR104_BUS_SPEED)
176 #define SD_MODE_UHS_DDR50	(1 << UHS_DDR50_BUS_SPEED)
177 	unsigned int		sd3_drv_type;
178 #define SD_DRIVER_TYPE_B	0x01
179 #define SD_DRIVER_TYPE_A	0x02
180 #define SD_DRIVER_TYPE_C	0x04
181 #define SD_DRIVER_TYPE_D	0x08
182 	unsigned int		sd3_curr_limit;
183 #define SD_SET_CURRENT_LIMIT_200	0
184 #define SD_SET_CURRENT_LIMIT_400	1
185 #define SD_SET_CURRENT_LIMIT_600	2
186 #define SD_SET_CURRENT_LIMIT_800	3
187 #define SD_SET_CURRENT_NO_CHANGE	(-1)
188 
189 #define SD_MAX_CURRENT_200	(1 << SD_SET_CURRENT_LIMIT_200)
190 #define SD_MAX_CURRENT_400	(1 << SD_SET_CURRENT_LIMIT_400)
191 #define SD_MAX_CURRENT_600	(1 << SD_SET_CURRENT_LIMIT_600)
192 #define SD_MAX_CURRENT_800	(1 << SD_SET_CURRENT_LIMIT_800)
193 };
194 
195 struct sd_ext_reg {
196 	u8			fno;
197 	u8			page;
198 	u16			offset;
199 	u8			rev;
200 	u8			feature_enabled;
201 	u8			feature_support;
202 /* Power Management Function. */
203 #define SD_EXT_POWER_OFF_NOTIFY	(1<<0)
204 #define SD_EXT_POWER_SUSTENANCE	(1<<1)
205 #define SD_EXT_POWER_DOWN_MODE	(1<<2)
206 /* Performance Enhancement Function. */
207 #define SD_EXT_PERF_FX_EVENT	(1<<0)
208 #define SD_EXT_PERF_CARD_MAINT	(1<<1)
209 #define SD_EXT_PERF_HOST_MAINT	(1<<2)
210 #define SD_EXT_PERF_CACHE	(1<<3)
211 #define SD_EXT_PERF_CMD_QUEUE	(1<<4)
212 };
213 
214 struct sdio_cccr {
215 	unsigned int		sdio_vsn;
216 	unsigned int		sd_vsn;
217 	unsigned int		multi_block:1,
218 				low_speed:1,
219 				wide_bus:1,
220 				high_power:1,
221 				high_speed:1,
222 				disable_cd:1,
223 				enable_async_irq:1;
224 };
225 
226 struct sdio_cis {
227 	unsigned short		vendor;
228 	unsigned short		device;
229 	unsigned short		blksize;
230 	unsigned int		max_dtr;
231 };
232 
233 struct mmc_host;
234 struct sdio_func;
235 struct sdio_func_tuple;
236 struct mmc_queue_req;
237 
238 #define SDIO_MAX_FUNCS		7
239 
240 /* The number of MMC physical partitions.  These consist of:
241  * boot partitions (2), general purpose partitions (4) and
242  * RPMB partition (1) in MMC v4.4.
243  */
244 #define MMC_NUM_BOOT_PARTITION	2
245 #define MMC_NUM_GP_PARTITION	4
246 #define MMC_NUM_PHY_PARTITION	7
247 #define MAX_MMC_PART_NAME_LEN	20
248 
249 /*
250  * MMC Physical partitions
251  */
252 struct mmc_part {
253 	u64		size;	/* partition size (in bytes) */
254 	unsigned int	part_cfg;	/* partition type */
255 	char	name[MAX_MMC_PART_NAME_LEN];
256 	bool	force_ro;	/* to make boot parts RO by default */
257 	unsigned int	area_type;
258 #define MMC_BLK_DATA_AREA_MAIN	(1<<0)
259 #define MMC_BLK_DATA_AREA_BOOT	(1<<1)
260 #define MMC_BLK_DATA_AREA_GP	(1<<2)
261 #define MMC_BLK_DATA_AREA_RPMB	(1<<3)
262 };
263 
264 /*
265  * MMC device
266  */
267 struct mmc_card {
268 	struct mmc_host		*host;		/* the host this device belongs to */
269 	struct device		dev;		/* the device */
270 	u32			ocr;		/* the current OCR setting */
271 	unsigned int		rca;		/* relative card address of device */
272 	unsigned int		type;		/* card type */
273 #define MMC_TYPE_MMC		0		/* MMC card */
274 #define MMC_TYPE_SD		1		/* SD card */
275 #define MMC_TYPE_SDIO		2		/* SDIO card */
276 #define MMC_TYPE_SD_COMBO	3		/* SD combo (IO+mem) card */
277 	unsigned int		state;		/* (our) card state */
278 	unsigned int		quirks; 	/* card quirks */
279 	unsigned int		quirk_max_rate;	/* max rate set by quirks */
280 #define MMC_QUIRK_LENIENT_FN0	(1<<0)		/* allow SDIO FN0 writes outside of the VS CCCR range */
281 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)	/* use func->cur_blksize */
282 						/* for byte mode */
283 #define MMC_QUIRK_NONSTD_SDIO	(1<<2)		/* non-standard SDIO card attached */
284 						/* (missing CIA registers) */
285 #define MMC_QUIRK_NONSTD_FUNC_IF (1<<4)		/* SDIO card has nonstd function interfaces */
286 #define MMC_QUIRK_DISABLE_CD	(1<<5)		/* disconnect CD/DAT[3] resistor */
287 #define MMC_QUIRK_INAND_CMD38	(1<<6)		/* iNAND devices have broken CMD38 */
288 #define MMC_QUIRK_BLK_NO_CMD23	(1<<7)		/* Avoid CMD23 for regular multiblock */
289 #define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8)	/* Avoid sending 512 bytes in */
290 						/* byte mode */
291 #define MMC_QUIRK_LONG_READ_TIME (1<<9)		/* Data read time > CSD says */
292 #define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10)	/* Skip secure for erase/trim */
293 #define MMC_QUIRK_BROKEN_IRQ_POLLING	(1<<11)	/* Polling SDIO_CCCR_INTx could create a fake interrupt */
294 #define MMC_QUIRK_TRIM_BROKEN	(1<<12)		/* Skip trim */
295 #define MMC_QUIRK_BROKEN_HPI	(1<<13)		/* Disable broken HPI support */
296 #define MMC_QUIRK_BROKEN_SD_DISCARD	(1<<14)	/* Disable broken SD discard support */
297 #define MMC_QUIRK_BROKEN_SD_CACHE	(1<<15)	/* Disable broken SD cache support */
298 #define MMC_QUIRK_BROKEN_CACHE_FLUSH	(1<<16)	/* Don't flush cache until the write has occurred */
299 
300 	bool			written_flag;	/* Indicates eMMC has been written since power on */
301 	bool			reenable_cmdq;	/* Re-enable Command Queue */
302 
303 	unsigned int		erase_size;	/* erase size in sectors */
304  	unsigned int		erase_shift;	/* if erase unit is power 2 */
305  	unsigned int		pref_erase;	/* in sectors */
306 	unsigned int		eg_boundary;	/* don't cross erase-group boundaries */
307 	unsigned int		erase_arg;	/* erase / trim / discard */
308  	u8			erased_byte;	/* value of erased bytes */
309 
310 	u32			raw_cid[4];	/* raw card CID */
311 	u32			raw_csd[4];	/* raw card CSD */
312 	u32			raw_scr[2];	/* raw card SCR */
313 	u32			raw_ssr[16];	/* raw card SSR */
314 	struct mmc_cid		cid;		/* card identification */
315 	struct mmc_csd		csd;		/* card specific */
316 	struct mmc_ext_csd	ext_csd;	/* mmc v4 extended card specific */
317 	struct sd_scr		scr;		/* extra SD information */
318 	struct sd_ssr		ssr;		/* yet more SD information */
319 	struct sd_switch_caps	sw_caps;	/* switch (CMD6) caps */
320 	struct sd_ext_reg	ext_power;	/* SD extension reg for PM */
321 	struct sd_ext_reg	ext_perf;	/* SD extension reg for PERF */
322 
323 	unsigned int		sdio_funcs;	/* number of SDIO functions */
324 	atomic_t		sdio_funcs_probed; /* number of probed SDIO funcs */
325 	struct sdio_cccr	cccr;		/* common card info */
326 	struct sdio_cis		cis;		/* common tuple info */
327 	struct sdio_func	*sdio_func[SDIO_MAX_FUNCS]; /* SDIO functions (devices) */
328 	struct sdio_func	*sdio_single_irq; /* SDIO function when only one IRQ active */
329 	u8			major_rev;	/* major revision number */
330 	u8			minor_rev;	/* minor revision number */
331 	unsigned		num_info;	/* number of info strings */
332 	const char		**info;		/* info strings */
333 	struct sdio_func_tuple	*tuples;	/* unknown common tuples */
334 
335 	unsigned int		sd_bus_speed;	/* Bus Speed Mode set for the card */
336 	unsigned int		mmc_avail_type;	/* supported device type by both host and card */
337 	unsigned int		drive_strength;	/* for UHS-I, HS200 or HS400 */
338 
339 	struct dentry		*debugfs_root;
340 	struct mmc_part	part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
341 	unsigned int    nr_parts;
342 
343 	struct workqueue_struct *complete_wq;	/* Private workqueue */
344 };
345 
mmc_large_sector(struct mmc_card * card)346 static inline bool mmc_large_sector(struct mmc_card *card)
347 {
348 	return card->ext_csd.data_sector_size == 4096;
349 }
350 
mmc_card_enable_async_irq(struct mmc_card * card)351 static inline int mmc_card_enable_async_irq(struct mmc_card *card)
352 {
353 	return card->cccr.enable_async_irq;
354 }
355 
356 bool mmc_card_is_blockaddr(struct mmc_card *card);
357 
358 #define mmc_card_mmc(c)		((c)->type == MMC_TYPE_MMC)
359 #define mmc_card_sd(c)		((c)->type == MMC_TYPE_SD)
360 #define mmc_card_sdio(c)	((c)->type == MMC_TYPE_SDIO)
361 #define mmc_card_sd_combo(c)	((c)->type == MMC_TYPE_SD_COMBO)
362 
363 #endif /* LINUX_MMC_CARD_H */
364