1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32 
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 
40 #include <drm/drm_device.h>
41 #include <drm/drm_file.h>
42 #include <drm/drm_prime.h>
43 #include <drm/radeon_drm.h>
44 #include <drm/ttm/ttm_bo.h>
45 #include <drm/ttm/ttm_placement.h>
46 #include <drm/ttm/ttm_range_manager.h>
47 #include <drm/ttm/ttm_tt.h>
48 
49 #include "radeon_reg.h"
50 #include "radeon.h"
51 #include "radeon_ttm.h"
52 
53 static void radeon_ttm_debugfs_init(struct radeon_device *rdev);
54 
55 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
56 			      struct ttm_resource *bo_mem);
57 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
58 
radeon_get_rdev(struct ttm_device * bdev)59 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
60 {
61 	struct radeon_mman *mman;
62 	struct radeon_device *rdev;
63 
64 	mman = container_of(bdev, struct radeon_mman, bdev);
65 	rdev = container_of(mman, struct radeon_device, mman);
66 	return rdev;
67 }
68 
radeon_ttm_init_vram(struct radeon_device * rdev)69 static int radeon_ttm_init_vram(struct radeon_device *rdev)
70 {
71 	return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
72 				  false, rdev->mc.real_vram_size >> PAGE_SHIFT);
73 }
74 
radeon_ttm_init_gtt(struct radeon_device * rdev)75 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
76 {
77 	return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
78 				  true, rdev->mc.gtt_size >> PAGE_SHIFT);
79 }
80 
radeon_evict_flags(struct ttm_buffer_object * bo,struct ttm_placement * placement)81 static void radeon_evict_flags(struct ttm_buffer_object *bo,
82 				struct ttm_placement *placement)
83 {
84 	static const struct ttm_place placements = {
85 		.fpfn = 0,
86 		.lpfn = 0,
87 		.mem_type = TTM_PL_SYSTEM,
88 		.flags = 0
89 	};
90 
91 	struct radeon_bo *rbo;
92 
93 	if (!radeon_ttm_bo_is_radeon_bo(bo)) {
94 		placement->placement = &placements;
95 		placement->busy_placement = &placements;
96 		placement->num_placement = 1;
97 		placement->num_busy_placement = 1;
98 		return;
99 	}
100 	rbo = container_of(bo, struct radeon_bo, tbo);
101 	switch (bo->resource->mem_type) {
102 	case TTM_PL_VRAM:
103 		if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
104 			radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
105 		else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
106 			 bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
107 			unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
108 			int i;
109 
110 			/* Try evicting to the CPU inaccessible part of VRAM
111 			 * first, but only set GTT as busy placement, so this
112 			 * BO will be evicted to GTT rather than causing other
113 			 * BOs to be evicted from VRAM
114 			 */
115 			radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
116 							 RADEON_GEM_DOMAIN_GTT);
117 			rbo->placement.num_busy_placement = 0;
118 			for (i = 0; i < rbo->placement.num_placement; i++) {
119 				if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
120 					if (rbo->placements[i].fpfn < fpfn)
121 						rbo->placements[i].fpfn = fpfn;
122 				} else {
123 					rbo->placement.busy_placement =
124 						&rbo->placements[i];
125 					rbo->placement.num_busy_placement = 1;
126 				}
127 			}
128 		} else
129 			radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
130 		break;
131 	case TTM_PL_TT:
132 	default:
133 		radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
134 	}
135 	*placement = rbo->placement;
136 }
137 
radeon_move_blit(struct ttm_buffer_object * bo,bool evict,struct ttm_resource * new_mem,struct ttm_resource * old_mem)138 static int radeon_move_blit(struct ttm_buffer_object *bo,
139 			bool evict,
140 			struct ttm_resource *new_mem,
141 			struct ttm_resource *old_mem)
142 {
143 	struct radeon_device *rdev;
144 	uint64_t old_start, new_start;
145 	struct radeon_fence *fence;
146 	unsigned num_pages;
147 	int r, ridx;
148 
149 	rdev = radeon_get_rdev(bo->bdev);
150 	ridx = radeon_copy_ring_index(rdev);
151 	old_start = (u64)old_mem->start << PAGE_SHIFT;
152 	new_start = (u64)new_mem->start << PAGE_SHIFT;
153 
154 	switch (old_mem->mem_type) {
155 	case TTM_PL_VRAM:
156 		old_start += rdev->mc.vram_start;
157 		break;
158 	case TTM_PL_TT:
159 		old_start += rdev->mc.gtt_start;
160 		break;
161 	default:
162 		DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
163 		return -EINVAL;
164 	}
165 	switch (new_mem->mem_type) {
166 	case TTM_PL_VRAM:
167 		new_start += rdev->mc.vram_start;
168 		break;
169 	case TTM_PL_TT:
170 		new_start += rdev->mc.gtt_start;
171 		break;
172 	default:
173 		DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
174 		return -EINVAL;
175 	}
176 	if (!rdev->ring[ridx].ready) {
177 		DRM_ERROR("Trying to move memory with ring turned off.\n");
178 		return -EINVAL;
179 	}
180 
181 	BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
182 
183 	num_pages = PFN_UP(new_mem->size) * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
184 	fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
185 	if (IS_ERR(fence))
186 		return PTR_ERR(fence);
187 
188 	r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
189 	radeon_fence_unref(&fence);
190 	return r;
191 }
192 
radeon_bo_move(struct ttm_buffer_object * bo,bool evict,struct ttm_operation_ctx * ctx,struct ttm_resource * new_mem,struct ttm_place * hop)193 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
194 			  struct ttm_operation_ctx *ctx,
195 			  struct ttm_resource *new_mem,
196 			  struct ttm_place *hop)
197 {
198 	struct ttm_resource *old_mem = bo->resource;
199 	struct radeon_device *rdev;
200 	struct radeon_bo *rbo;
201 	int r;
202 
203 	if (new_mem->mem_type == TTM_PL_TT) {
204 		r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
205 		if (r)
206 			return r;
207 	}
208 
209 	r = ttm_bo_wait_ctx(bo, ctx);
210 	if (r)
211 		return r;
212 
213 	rbo = container_of(bo, struct radeon_bo, tbo);
214 	rdev = radeon_get_rdev(bo->bdev);
215 	if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM &&
216 			 bo->ttm == NULL)) {
217 		ttm_bo_move_null(bo, new_mem);
218 		goto out;
219 	}
220 	if (old_mem->mem_type == TTM_PL_SYSTEM &&
221 	    new_mem->mem_type == TTM_PL_TT) {
222 		ttm_bo_move_null(bo, new_mem);
223 		goto out;
224 	}
225 
226 	if (old_mem->mem_type == TTM_PL_TT &&
227 	    new_mem->mem_type == TTM_PL_SYSTEM) {
228 		radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
229 		ttm_resource_free(bo, &bo->resource);
230 		ttm_bo_assign_mem(bo, new_mem);
231 		goto out;
232 	}
233 	if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
234 	    rdev->asic->copy.copy != NULL) {
235 		if ((old_mem->mem_type == TTM_PL_SYSTEM &&
236 		     new_mem->mem_type == TTM_PL_VRAM) ||
237 		    (old_mem->mem_type == TTM_PL_VRAM &&
238 		     new_mem->mem_type == TTM_PL_SYSTEM)) {
239 			hop->fpfn = 0;
240 			hop->lpfn = 0;
241 			hop->mem_type = TTM_PL_TT;
242 			hop->flags = 0;
243 			return -EMULTIHOP;
244 		}
245 
246 		r = radeon_move_blit(bo, evict, new_mem, old_mem);
247 	} else {
248 		r = -ENODEV;
249 	}
250 
251 	if (r) {
252 		r = ttm_bo_move_memcpy(bo, ctx, new_mem);
253 		if (r)
254 			return r;
255 	}
256 
257 out:
258 	/* update statistics */
259 	atomic64_add(bo->base.size, &rdev->num_bytes_moved);
260 	radeon_bo_move_notify(bo);
261 	return 0;
262 }
263 
radeon_ttm_io_mem_reserve(struct ttm_device * bdev,struct ttm_resource * mem)264 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem)
265 {
266 	struct radeon_device *rdev = radeon_get_rdev(bdev);
267 	size_t bus_size = (size_t)mem->size;
268 
269 	switch (mem->mem_type) {
270 	case TTM_PL_SYSTEM:
271 		/* system memory */
272 		return 0;
273 	case TTM_PL_TT:
274 #if IS_ENABLED(CONFIG_AGP)
275 		if (rdev->flags & RADEON_IS_AGP) {
276 			/* RADEON_IS_AGP is set only if AGP is active */
277 			mem->bus.offset = (mem->start << PAGE_SHIFT) +
278 				rdev->mc.agp_base;
279 			mem->bus.is_iomem = !rdev->agp->cant_use_aperture;
280 			mem->bus.caching = ttm_write_combined;
281 		}
282 #endif
283 		break;
284 	case TTM_PL_VRAM:
285 		mem->bus.offset = mem->start << PAGE_SHIFT;
286 		/* check if it's visible */
287 		if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
288 			return -EINVAL;
289 		mem->bus.offset += rdev->mc.aper_base;
290 		mem->bus.is_iomem = true;
291 		mem->bus.caching = ttm_write_combined;
292 #ifdef __alpha__
293 		/*
294 		 * Alpha: use bus.addr to hold the ioremap() return,
295 		 * so we can modify bus.base below.
296 		 */
297 		mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
298 		if (!mem->bus.addr)
299 			return -ENOMEM;
300 
301 		/*
302 		 * Alpha: Use just the bus offset plus
303 		 * the hose/domain memory base for bus.base.
304 		 * It then can be used to build PTEs for VRAM
305 		 * access, as done in ttm_bo_vm_fault().
306 		 */
307 		mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
308 			rdev->hose->dense_mem_base;
309 #endif
310 		break;
311 	default:
312 		return -EINVAL;
313 	}
314 	return 0;
315 }
316 
317 /*
318  * TTM backend functions.
319  */
320 struct radeon_ttm_tt {
321 	struct ttm_tt		ttm;
322 	u64				offset;
323 
324 	uint64_t			userptr;
325 	struct mm_struct		*usermm;
326 	uint32_t			userflags;
327 	bool bound;
328 };
329 
330 /* prepare the sg table with the user pages */
radeon_ttm_tt_pin_userptr(struct ttm_device * bdev,struct ttm_tt * ttm)331 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
332 {
333 	struct radeon_device *rdev = radeon_get_rdev(bdev);
334 	struct radeon_ttm_tt *gtt = (void *)ttm;
335 	unsigned pinned = 0;
336 	int r;
337 
338 	int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
339 	enum dma_data_direction direction = write ?
340 		DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
341 
342 	if (current->mm != gtt->usermm)
343 		return -EPERM;
344 
345 	if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
346 		/* check that we only pin down anonymous memory
347 		   to prevent problems with writeback */
348 		unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE;
349 		struct vm_area_struct *vma;
350 		vma = find_vma(gtt->usermm, gtt->userptr);
351 		if (!vma || vma->vm_file || vma->vm_end < end)
352 			return -EPERM;
353 	}
354 
355 	do {
356 		unsigned num_pages = ttm->num_pages - pinned;
357 		uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
358 		struct page **pages = ttm->pages + pinned;
359 
360 		r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
361 				   pages);
362 		if (r < 0)
363 			goto release_pages;
364 
365 		pinned += r;
366 
367 	} while (pinned < ttm->num_pages);
368 
369 	r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
370 				      (u64)ttm->num_pages << PAGE_SHIFT,
371 				      GFP_KERNEL);
372 	if (r)
373 		goto release_sg;
374 
375 	r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
376 	if (r)
377 		goto release_sg;
378 
379 	drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
380 				       ttm->num_pages);
381 
382 	return 0;
383 
384 release_sg:
385 	kfree(ttm->sg);
386 
387 release_pages:
388 	release_pages(ttm->pages, pinned);
389 	return r;
390 }
391 
radeon_ttm_tt_unpin_userptr(struct ttm_device * bdev,struct ttm_tt * ttm)392 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm)
393 {
394 	struct radeon_device *rdev = radeon_get_rdev(bdev);
395 	struct radeon_ttm_tt *gtt = (void *)ttm;
396 	struct sg_page_iter sg_iter;
397 
398 	int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
399 	enum dma_data_direction direction = write ?
400 		DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
401 
402 	/* double check that we don't free the table twice */
403 	if (!ttm->sg || !ttm->sg->sgl)
404 		return;
405 
406 	/* free the sg table and pages again */
407 	dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
408 
409 	for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
410 		struct page *page = sg_page_iter_page(&sg_iter);
411 		if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
412 			set_page_dirty(page);
413 
414 		mark_page_accessed(page);
415 		put_page(page);
416 	}
417 
418 	sg_free_table(ttm->sg);
419 }
420 
radeon_ttm_backend_is_bound(struct ttm_tt * ttm)421 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
422 {
423 	struct radeon_ttm_tt *gtt = (void*)ttm;
424 
425 	return (gtt->bound);
426 }
427 
radeon_ttm_backend_bind(struct ttm_device * bdev,struct ttm_tt * ttm,struct ttm_resource * bo_mem)428 static int radeon_ttm_backend_bind(struct ttm_device *bdev,
429 				   struct ttm_tt *ttm,
430 				   struct ttm_resource *bo_mem)
431 {
432 	struct radeon_ttm_tt *gtt = (void*)ttm;
433 	struct radeon_device *rdev = radeon_get_rdev(bdev);
434 	uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
435 		RADEON_GART_PAGE_WRITE;
436 	int r;
437 
438 	if (gtt->bound)
439 		return 0;
440 
441 	if (gtt->userptr) {
442 		radeon_ttm_tt_pin_userptr(bdev, ttm);
443 		flags &= ~RADEON_GART_PAGE_WRITE;
444 	}
445 
446 	gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
447 	if (!ttm->num_pages) {
448 		WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
449 		     ttm->num_pages, bo_mem, ttm);
450 	}
451 	if (ttm->caching == ttm_cached)
452 		flags |= RADEON_GART_PAGE_SNOOP;
453 	r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
454 			     ttm->pages, gtt->ttm.dma_address, flags);
455 	if (r) {
456 		DRM_ERROR("failed to bind %u pages at 0x%08X\n",
457 			  ttm->num_pages, (unsigned)gtt->offset);
458 		return r;
459 	}
460 	gtt->bound = true;
461 	return 0;
462 }
463 
radeon_ttm_backend_unbind(struct ttm_device * bdev,struct ttm_tt * ttm)464 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
465 {
466 	struct radeon_ttm_tt *gtt = (void *)ttm;
467 	struct radeon_device *rdev = radeon_get_rdev(bdev);
468 
469 	if (gtt->userptr)
470 		radeon_ttm_tt_unpin_userptr(bdev, ttm);
471 
472 	if (!gtt->bound)
473 		return;
474 
475 	radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
476 
477 	gtt->bound = false;
478 }
479 
radeon_ttm_backend_destroy(struct ttm_device * bdev,struct ttm_tt * ttm)480 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm)
481 {
482 	struct radeon_ttm_tt *gtt = (void *)ttm;
483 
484 	ttm_tt_fini(&gtt->ttm);
485 	kfree(gtt);
486 }
487 
radeon_ttm_tt_create(struct ttm_buffer_object * bo,uint32_t page_flags)488 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
489 					   uint32_t page_flags)
490 {
491 	struct radeon_ttm_tt *gtt;
492 	enum ttm_caching caching;
493 	struct radeon_bo *rbo;
494 #if IS_ENABLED(CONFIG_AGP)
495 	struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
496 
497 	if (rdev->flags & RADEON_IS_AGP) {
498 		return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags);
499 	}
500 #endif
501 	rbo = container_of(bo, struct radeon_bo, tbo);
502 
503 	gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
504 	if (gtt == NULL) {
505 		return NULL;
506 	}
507 
508 	if (rbo->flags & RADEON_GEM_GTT_UC)
509 		caching = ttm_uncached;
510 	else if (rbo->flags & RADEON_GEM_GTT_WC)
511 		caching = ttm_write_combined;
512 	else
513 		caching = ttm_cached;
514 
515 	if (ttm_sg_tt_init(&gtt->ttm, bo, page_flags, caching)) {
516 		kfree(gtt);
517 		return NULL;
518 	}
519 	return &gtt->ttm;
520 }
521 
radeon_ttm_tt_to_gtt(struct radeon_device * rdev,struct ttm_tt * ttm)522 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
523 						  struct ttm_tt *ttm)
524 {
525 #if IS_ENABLED(CONFIG_AGP)
526 	if (rdev->flags & RADEON_IS_AGP)
527 		return NULL;
528 #endif
529 
530 	if (!ttm)
531 		return NULL;
532 	return container_of(ttm, struct radeon_ttm_tt, ttm);
533 }
534 
radeon_ttm_tt_populate(struct ttm_device * bdev,struct ttm_tt * ttm,struct ttm_operation_ctx * ctx)535 static int radeon_ttm_tt_populate(struct ttm_device *bdev,
536 				  struct ttm_tt *ttm,
537 				  struct ttm_operation_ctx *ctx)
538 {
539 	struct radeon_device *rdev = radeon_get_rdev(bdev);
540 	struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
541 	bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
542 
543 	if (gtt && gtt->userptr) {
544 		ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
545 		if (!ttm->sg)
546 			return -ENOMEM;
547 
548 		ttm->page_flags |= TTM_TT_FLAG_EXTERNAL;
549 		return 0;
550 	}
551 
552 	if (slave && ttm->sg) {
553 		drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
554 					       ttm->num_pages);
555 		return 0;
556 	}
557 
558 	return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
559 }
560 
radeon_ttm_tt_unpopulate(struct ttm_device * bdev,struct ttm_tt * ttm)561 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm)
562 {
563 	struct radeon_device *rdev = radeon_get_rdev(bdev);
564 	struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
565 	bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
566 
567 	radeon_ttm_tt_unbind(bdev, ttm);
568 
569 	if (gtt && gtt->userptr) {
570 		kfree(ttm->sg);
571 		ttm->page_flags &= ~TTM_TT_FLAG_EXTERNAL;
572 		return;
573 	}
574 
575 	if (slave)
576 		return;
577 
578 	return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
579 }
580 
radeon_ttm_tt_set_userptr(struct radeon_device * rdev,struct ttm_tt * ttm,uint64_t addr,uint32_t flags)581 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
582 			      struct ttm_tt *ttm, uint64_t addr,
583 			      uint32_t flags)
584 {
585 	struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
586 
587 	if (gtt == NULL)
588 		return -EINVAL;
589 
590 	gtt->userptr = addr;
591 	gtt->usermm = current->mm;
592 	gtt->userflags = flags;
593 	return 0;
594 }
595 
radeon_ttm_tt_is_bound(struct ttm_device * bdev,struct ttm_tt * ttm)596 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev,
597 			    struct ttm_tt *ttm)
598 {
599 #if IS_ENABLED(CONFIG_AGP)
600 	struct radeon_device *rdev = radeon_get_rdev(bdev);
601 	if (rdev->flags & RADEON_IS_AGP)
602 		return ttm_agp_is_bound(ttm);
603 #endif
604 	return radeon_ttm_backend_is_bound(ttm);
605 }
606 
radeon_ttm_tt_bind(struct ttm_device * bdev,struct ttm_tt * ttm,struct ttm_resource * bo_mem)607 static int radeon_ttm_tt_bind(struct ttm_device *bdev,
608 			      struct ttm_tt *ttm,
609 			      struct ttm_resource *bo_mem)
610 {
611 #if IS_ENABLED(CONFIG_AGP)
612 	struct radeon_device *rdev = radeon_get_rdev(bdev);
613 #endif
614 
615 	if (!bo_mem)
616 		return -EINVAL;
617 #if IS_ENABLED(CONFIG_AGP)
618 	if (rdev->flags & RADEON_IS_AGP)
619 		return ttm_agp_bind(ttm, bo_mem);
620 #endif
621 
622 	return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
623 }
624 
radeon_ttm_tt_unbind(struct ttm_device * bdev,struct ttm_tt * ttm)625 static void radeon_ttm_tt_unbind(struct ttm_device *bdev,
626 				 struct ttm_tt *ttm)
627 {
628 #if IS_ENABLED(CONFIG_AGP)
629 	struct radeon_device *rdev = radeon_get_rdev(bdev);
630 
631 	if (rdev->flags & RADEON_IS_AGP) {
632 		ttm_agp_unbind(ttm);
633 		return;
634 	}
635 #endif
636 	radeon_ttm_backend_unbind(bdev, ttm);
637 }
638 
radeon_ttm_tt_destroy(struct ttm_device * bdev,struct ttm_tt * ttm)639 static void radeon_ttm_tt_destroy(struct ttm_device *bdev,
640 				  struct ttm_tt *ttm)
641 {
642 #if IS_ENABLED(CONFIG_AGP)
643 	struct radeon_device *rdev = radeon_get_rdev(bdev);
644 
645 	if (rdev->flags & RADEON_IS_AGP) {
646 		ttm_agp_destroy(ttm);
647 		return;
648 	}
649 #endif
650 	radeon_ttm_backend_destroy(bdev, ttm);
651 }
652 
radeon_ttm_tt_has_userptr(struct radeon_device * rdev,struct ttm_tt * ttm)653 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
654 			       struct ttm_tt *ttm)
655 {
656 	struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
657 
658 	if (gtt == NULL)
659 		return false;
660 
661 	return !!gtt->userptr;
662 }
663 
radeon_ttm_tt_is_readonly(struct radeon_device * rdev,struct ttm_tt * ttm)664 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
665 			       struct ttm_tt *ttm)
666 {
667 	struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
668 
669 	if (gtt == NULL)
670 		return false;
671 
672 	return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
673 }
674 
675 static struct ttm_device_funcs radeon_bo_driver = {
676 	.ttm_tt_create = &radeon_ttm_tt_create,
677 	.ttm_tt_populate = &radeon_ttm_tt_populate,
678 	.ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
679 	.ttm_tt_destroy = &radeon_ttm_tt_destroy,
680 	.eviction_valuable = ttm_bo_eviction_valuable,
681 	.evict_flags = &radeon_evict_flags,
682 	.move = &radeon_bo_move,
683 	.io_mem_reserve = &radeon_ttm_io_mem_reserve,
684 };
685 
radeon_ttm_init(struct radeon_device * rdev)686 int radeon_ttm_init(struct radeon_device *rdev)
687 {
688 	int r;
689 
690 	/* No others user of address space so set it to 0 */
691 	r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
692 			       rdev->ddev->anon_inode->i_mapping,
693 			       rdev->ddev->vma_offset_manager,
694 			       rdev->need_swiotlb,
695 			       dma_addressing_limited(&rdev->pdev->dev));
696 	if (r) {
697 		DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
698 		return r;
699 	}
700 	rdev->mman.initialized = true;
701 
702 	r = radeon_ttm_init_vram(rdev);
703 	if (r) {
704 		DRM_ERROR("Failed initializing VRAM heap.\n");
705 		return r;
706 	}
707 	/* Change the size here instead of the init above so only lpfn is affected */
708 	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
709 
710 	r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
711 			     RADEON_GEM_DOMAIN_VRAM, 0, NULL,
712 			     NULL, &rdev->stolen_vga_memory);
713 	if (r) {
714 		return r;
715 	}
716 	r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
717 	if (r)
718 		return r;
719 	r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
720 	radeon_bo_unreserve(rdev->stolen_vga_memory);
721 	if (r) {
722 		radeon_bo_unref(&rdev->stolen_vga_memory);
723 		return r;
724 	}
725 	DRM_INFO("radeon: %uM of VRAM memory ready\n",
726 		 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
727 
728 	r = radeon_ttm_init_gtt(rdev);
729 	if (r) {
730 		DRM_ERROR("Failed initializing GTT heap.\n");
731 		return r;
732 	}
733 	DRM_INFO("radeon: %uM of GTT memory ready.\n",
734 		 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
735 
736 	radeon_ttm_debugfs_init(rdev);
737 
738 	return 0;
739 }
740 
radeon_ttm_fini(struct radeon_device * rdev)741 void radeon_ttm_fini(struct radeon_device *rdev)
742 {
743 	int r;
744 
745 	if (!rdev->mman.initialized)
746 		return;
747 
748 	if (rdev->stolen_vga_memory) {
749 		r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
750 		if (r == 0) {
751 			radeon_bo_unpin(rdev->stolen_vga_memory);
752 			radeon_bo_unreserve(rdev->stolen_vga_memory);
753 		}
754 		radeon_bo_unref(&rdev->stolen_vga_memory);
755 	}
756 	ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
757 	ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
758 	ttm_device_fini(&rdev->mman.bdev);
759 	radeon_gart_fini(rdev);
760 	rdev->mman.initialized = false;
761 	DRM_INFO("radeon: ttm finalized\n");
762 }
763 
764 /* this should only be called at bootup or when userspace
765  * isn't running */
radeon_ttm_set_active_vram_size(struct radeon_device * rdev,u64 size)766 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
767 {
768 	struct ttm_resource_manager *man;
769 
770 	if (!rdev->mman.initialized)
771 		return;
772 
773 	man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
774 	/* this just adjusts TTM size idea, which sets lpfn to the correct value */
775 	man->size = size >> PAGE_SHIFT;
776 }
777 
778 #if defined(CONFIG_DEBUG_FS)
779 
radeon_ttm_page_pool_show(struct seq_file * m,void * data)780 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data)
781 {
782 	struct radeon_device *rdev = m->private;
783 
784 	return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
785 }
786 
787 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool);
788 
radeon_ttm_vram_open(struct inode * inode,struct file * filep)789 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
790 {
791 	struct radeon_device *rdev = inode->i_private;
792 	i_size_write(inode, rdev->mc.mc_vram_size);
793 	filep->private_data = inode->i_private;
794 	return 0;
795 }
796 
radeon_ttm_vram_read(struct file * f,char __user * buf,size_t size,loff_t * pos)797 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
798 				    size_t size, loff_t *pos)
799 {
800 	struct radeon_device *rdev = f->private_data;
801 	ssize_t result = 0;
802 	int r;
803 
804 	if (size & 0x3 || *pos & 0x3)
805 		return -EINVAL;
806 
807 	while (size) {
808 		unsigned long flags;
809 		uint32_t value;
810 
811 		if (*pos >= rdev->mc.mc_vram_size)
812 			return result;
813 
814 		spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
815 		WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
816 		if (rdev->family >= CHIP_CEDAR)
817 			WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
818 		value = RREG32(RADEON_MM_DATA);
819 		spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
820 
821 		r = put_user(value, (uint32_t __user *)buf);
822 		if (r)
823 			return r;
824 
825 		result += 4;
826 		buf += 4;
827 		*pos += 4;
828 		size -= 4;
829 	}
830 
831 	return result;
832 }
833 
834 static const struct file_operations radeon_ttm_vram_fops = {
835 	.owner = THIS_MODULE,
836 	.open = radeon_ttm_vram_open,
837 	.read = radeon_ttm_vram_read,
838 	.llseek = default_llseek
839 };
840 
radeon_ttm_gtt_open(struct inode * inode,struct file * filep)841 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
842 {
843 	struct radeon_device *rdev = inode->i_private;
844 	i_size_write(inode, rdev->mc.gtt_size);
845 	filep->private_data = inode->i_private;
846 	return 0;
847 }
848 
radeon_ttm_gtt_read(struct file * f,char __user * buf,size_t size,loff_t * pos)849 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
850 				   size_t size, loff_t *pos)
851 {
852 	struct radeon_device *rdev = f->private_data;
853 	ssize_t result = 0;
854 	int r;
855 
856 	while (size) {
857 		loff_t p = *pos / PAGE_SIZE;
858 		unsigned off = *pos & ~PAGE_MASK;
859 		size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
860 		struct page *page;
861 		void *ptr;
862 
863 		if (p >= rdev->gart.num_cpu_pages)
864 			return result;
865 
866 		page = rdev->gart.pages[p];
867 		if (page) {
868 			ptr = kmap_local_page(page);
869 			ptr += off;
870 
871 			r = copy_to_user(buf, ptr, cur_size);
872 			kunmap_local(ptr);
873 		} else
874 			r = clear_user(buf, cur_size);
875 
876 		if (r)
877 			return -EFAULT;
878 
879 		result += cur_size;
880 		buf += cur_size;
881 		*pos += cur_size;
882 		size -= cur_size;
883 	}
884 
885 	return result;
886 }
887 
888 static const struct file_operations radeon_ttm_gtt_fops = {
889 	.owner = THIS_MODULE,
890 	.open = radeon_ttm_gtt_open,
891 	.read = radeon_ttm_gtt_read,
892 	.llseek = default_llseek
893 };
894 
895 #endif
896 
radeon_ttm_debugfs_init(struct radeon_device * rdev)897 static void radeon_ttm_debugfs_init(struct radeon_device *rdev)
898 {
899 #if defined(CONFIG_DEBUG_FS)
900 	struct drm_minor *minor = rdev->ddev->primary;
901 	struct dentry *root = minor->debugfs_root;
902 
903 	debugfs_create_file("radeon_vram", 0444, root, rdev,
904 			    &radeon_ttm_vram_fops);
905 	debugfs_create_file("radeon_gtt", 0444, root, rdev,
906 			    &radeon_ttm_gtt_fops);
907 	debugfs_create_file("ttm_page_pool", 0444, root, rdev,
908 			    &radeon_ttm_page_pool_fops);
909 	ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev,
910 							     TTM_PL_VRAM),
911 					    root, "radeon_vram_mm");
912 	ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev,
913 							     TTM_PL_TT),
914 					    root, "radeon_gtt_mm");
915 #endif
916 }
917